blob: 566a1d9e01e638eab8b59cd0463831d4372d2b52 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
|
#!/bin/bash
. ./flashpro.sh
. ../utils.sh
. ../yup_comm.sh
TMPDIR=/tmp/testing
COM_PORT=COM5
FPGA_DATA_ARR_FROM='./fpga_data/TutorKit1FlashRom1_v1004_Top - 2018-05-28_ARR_FROM.stp'
FPGA_DATA_ARR='./fpga_data/TutorKit1FlashRom1_v1004_Top - 2018-05-28_ARR.stp'
FPGA_DATA_FROM='./fpga_data/FlashRom1kbitPattern01_80 - 2018-07-27.stp'
operator_msg()
{
if [ $# -ne 1 -a $# -ne 2 ]; then
error "operator_msg: invalid number of arguments"
fi
case "$1" in
"DM" | "FPRO" | "")
;;
*)
error "operator_msg: invalid first argument: $1"
;;
esac
case "$2" in
"KIT_VJTAG_ON" | "KIT_VJTAG_OFF" | "")
;;
*)
error "operator_msg: invalid second argument: $2"
;;
esac
action_index=1
echo
echo "+----------------------------------------------------------------+"
echo "| |"
if [ "$2" = "KIT_VJTAG_ON" ]; then
echo "| ${action_index}) On the Starter Kit switch on VJTAG and VPUMP voltages |"
echo "| (JP9 and JP12, pins 2 and 3) |"
echo "| |"
action_index=$(( $action_index + 1 ))
elif [ "$2" = "KIT_VJTAG_OFF" ]; then
echo "| ${action_index}) On the Starter Kit switch off VJTAG and VPUMP voltages |"
echo "| (JP9 and JP12, pins 3 and 4) |"
echo "| |"
action_index=$(( $action_index + 1 ))
fi
if [ "$1" = "DM" ]; then
echo "| ${action_index}) Connect Diagnostic Module to the Starter Kit |"
echo "| |"
action_index=$(( $action_index + 1 ))
elif [ "$1" = "FPRO" ]; then
echo "| ${action_index}) Connect FlashPro4 to the Starter Kit |"
echo "| |"
action_index=$(( $action_index + 1 ))
fi
echo "| ${action_index}) Press Enter to continue |"
echo "| |"
echo "+----------------------------------------------------------------+"
read
}
execute_DMAppFpgaProg()
{
info "Executing DMAppFpgaProg"
basedir=1_execute_DMAppFpgaProg
operator_msg DM KIT_VJTAG_OFF
yup_comm_execute_dm_cmd $basedir/1_cmd_get_id $TMPDIR/reply
check_retval $? "Cannot get ID of a DM program"
if cmp --silent $TMPDIR/reply $basedir/1_reply_DMAppFpgaProg ; then
info "DMAppFpgaProg is already running"
return
elif ! cmp --silent $TMPDIR/reply $basedir/1_reply_DMBootloader ; then
error "DMAppFpgaProg nor DMBootloader is running"
fi
info "Executing DMAppFpgaProg by DMBootloader"
yup_comm_execute_dm_cmd $basedir/2_cmd_execute_DMAppFpgaProg $TMPDIR/reply
check_retval $? "Cannot send command to DMBootloader for execution of DMAppFpgaProg"
if ! cmp --silent $TMPDIR/reply $basedir/2_reply ; then
error "Cannot execute DMAppFpgaProg by DMBootloader"
fi
info "OK"
}
test_command_properties()
{
info "Testing basic command properties"
basedir=2_basic
list_commands_and_replies $basedir/1 | test $TMPDIR
check_retval $?
# Result of the gettext should be checked by size
msg "./$basedir/2/25_cmd_get_text $TMPDIR/reply"
yup_comm_execute_dm_cmd ./$basedir/2/25_cmd_get_text $TMPDIR/reply
[ $(du -b $TMPDIR/reply | cut -f1) -ge 2 ]
check_retval $?
list_commands_and_replies $basedir/3 | test $TMPDIR
check_retval $?
info "OK"
}
test_write_verify_erase_array_from()
{
info "Testing writing, verification and erasing of ARRAY and FROM"
basedir=3_write_verify_erase_array_from
operator_msg "" KIT_VJTAG_ON
list_commands_and_replies $basedir/1_write | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/2_verify | test $TMPDIR
check_retval $?
operator_msg FPRO
flashpro VERIFY "$FPGA_DATA_ARR_FROM" 0 $TMPDIR
check_retval $?
operator_msg DM
list_commands_and_replies $basedir/3_erase | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/4_verify | test $TMPDIR
check_retval $?
operator_msg FPRO
flashpro VERIFY "$FPGA_DATA_ARR_FROM" 1 $TMPDIR
check_retval $?
info "OK"
}
test_write_verify_erase_from()
{
info "Testing writing, verification and erasing of FROM"
basedir=4_write_verify_erase_from
operator_msg DM
list_commands_and_replies $basedir/1_write_array | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/2_erase_from | test $TMPDIR
check_retval $?
operator_msg FPRO
flashpro VERIFY "$FPGA_DATA_ARR" 0 $TMPDIR
check_retval $?
flashpro VERIFY "$FPGA_DATA_FROM" 1 $TMPDIR
check_retval $?
operator_msg DM
list_commands_and_replies $basedir/3_write_from | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/4_verify_array | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/5_verify_from | test $TMPDIR
check_retval $?
operator_msg FPRO
flashpro VERIFY "$FPGA_DATA_ARR" 0 $TMPDIR
check_retval $?
flashpro VERIFY "$FPGA_DATA_FROM" 0 $TMPDIR
check_retval $?
operator_msg DM
list_commands_and_replies $basedir/6_erase_from | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/7_verify_array | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/8_verify_from | test $TMPDIR
check_retval $?
operator_msg FPRO
flashpro VERIFY "$FPGA_DATA_ARR" 0 $TMPDIR
check_retval $?
flashpro VERIFY "$FPGA_DATA_FROM" 1 $TMPDIR
check_retval $?
info "OK"
}
test_write_verify_erase_array()
{
info "Testing writing, verification and erasing of ARRAY"
basedir=5_write_verify_erase_array
operator_msg DM
list_commands_and_replies $basedir/1_erase_array | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/2_write_from | test $TMPDIR
check_retval $?
operator_msg FPRO
flashpro VERIFY "$FPGA_DATA_ARR" 1 $TMPDIR
check_retval $?
flashpro VERIFY "$FPGA_DATA_FROM" 0 $TMPDIR
check_retval $?
operator_msg DM
list_commands_and_replies $basedir/3_write_array | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/4_verify_array | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/5_verify_from | test $TMPDIR
check_retval $?
operator_msg FPRO
flashpro VERIFY "$FPGA_DATA_ARR" 0 $TMPDIR
check_retval $?
flashpro VERIFY "$FPGA_DATA_FROM" 0 $TMPDIR
check_retval $?
operator_msg DM
list_commands_and_replies $basedir/6_erase_array | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/7_verify_array | test $TMPDIR
check_retval $?
list_commands_and_replies $basedir/8_verify_from | test $TMPDIR
check_retval $?
operator_msg FPRO
flashpro VERIFY "$FPGA_DATA_ARR" 1 $TMPDIR
check_retval $?
flashpro VERIFY "$FPGA_DATA_FROM" 0 $TMPDIR
check_retval $?
info "OK"
}
#-----------------------------------------------------------------------------
# MAIN
#-----------------------------------------------------------------------------
yup_comm_start_server $COM_PORT
check_retval $? "Cannot start YUP communication utility server"
init_tmp_dir $TMPDIR
execute_DMAppFpgaProg
test_command_properties
test_write_verify_erase_array_from
test_write_verify_erase_from
test_write_verify_erase_array
yup_comm_stop_server
exit 0
|