diff options
Diffstat (limited to 'impl/DMAppFpgaProg')
45 files changed, 17699 insertions, 0 deletions
diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg.atsln b/impl/DMAppFpgaProg/DMAppFpgaProg.atsln new file mode 100644 index 0000000..3302041 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg.atsln @@ -0,0 +1,19 @@ + +Microsoft Visual Studio Solution File, Format Version 12.00 +# Atmel Studio Solution File, Format Version 11.00 +VisualStudioVersion = 14.0.23107.0 +MinimumVisualStudioVersion = 10.0.40219.1 +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "DMAppFpgaProg", "DMAppFpgaProg\DMAppFpgaProg.cproj", "{DCE6C7E3-EE26-4D79-826B-08594B9AD897}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Release|AVR = Release|AVR + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|AVR.ActiveCfg = Release|AVR + {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|AVR.Build.0 = Release|AVR + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DMAppFpgaProg.componentinfo.xml b/impl/DMAppFpgaProg/DMAppFpgaProg/DMAppFpgaProg.componentinfo.xml new file mode 100644 index 0000000..e275755 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DMAppFpgaProg.componentinfo.xml @@ -0,0 +1,4 @@ +<?xml version="1.0" encoding="utf-8"?> +<Store xmlns:i="http://www.w3.org/2001/XMLSchema-instance" xmlns="AtmelPackComponentManagement"> + <ProjectComponents /> +</Store>
\ No newline at end of file diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DMAppFpgaProg.cproj b/impl/DMAppFpgaProg/DMAppFpgaProg/DMAppFpgaProg.cproj new file mode 100644 index 0000000..f87681e --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DMAppFpgaProg.cproj @@ -0,0 +1,242 @@ +<?xml version="1.0" encoding="utf-8"?> +<Project DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003" ToolsVersion="14.0"> + <PropertyGroup> + <SchemaVersion>2.0</SchemaVersion> + <ProjectVersion>7.0</ProjectVersion> + <ToolchainName>com.Atmel.AVRGCC32.C</ToolchainName> + <ProjectGuid>dce6c7e3-ee26-4d79-826b-08594b9ad897</ProjectGuid> + <avrdevice>AT32UC3C2512C</avrdevice> + <avrdeviceseries>none</avrdeviceseries> + <OutputType>Executable</OutputType> + <Language>C</Language> + <OutputFileName>$(MSBuildProjectName)</OutputFileName> + <OutputFileExtension>.elf</OutputFileExtension> + <OutputDirectory>$(MSBuildProjectDirectory)\$(Configuration)</OutputDirectory> + <AssemblyName>DMAppFpgaProg</AssemblyName> + <Name>DMAppFpgaProg</Name> + <RootNamespace>DMAppFpgaProg</RootNamespace> + <ToolchainFlavour>Native</ToolchainFlavour> + <KeepTimersRunning>true</KeepTimersRunning> + <OverrideVtor>false</OverrideVtor> + <CacheFlash>true</CacheFlash> + <ProgFlashFromRam>true</ProgFlashFromRam> + <RamSnippetAddress>0x20000000</RamSnippetAddress> + <UncachedRange /> + <preserveEEPROM>true</preserveEEPROM> + <OverrideVtorValue>exception_table</OverrideVtorValue> + <BootSegment>2</BootSegment> + <ResetRule>0</ResetRule> + <eraseonlaunchrule>0</eraseonlaunchrule> + <EraseKey /> + <AsfFrameworkConfig> + <framework-data xmlns=""> + <options /> + <configurations /> + <files /> + <documentation help="" /> + <offline-documentation help="" /> + <dependencies> + <content-extension eid="atmel.asf" uuidref="Atmel.ASF" version="3.35.1" /> + </dependencies> + </framework-data> + </AsfFrameworkConfig> + </PropertyGroup> + <PropertyGroup Condition=" '$(Configuration)' == 'Release' "> + <ToolchainSettings> + <Avr32Gcc> + <avr32gcc.common.outputfiles.hex>True</avr32gcc.common.outputfiles.hex> + <avr32gcc.common.outputfiles.lss>True</avr32gcc.common.outputfiles.lss> + <avr32gcc.common.outputfiles.eep>True</avr32gcc.common.outputfiles.eep> + <avr32gcc.common.outputfiles.srec>True</avr32gcc.common.outputfiles.srec> + <avr32gcc.compiler.symbols.DefSymbols> + <ListValues> + <Value>NDEBUG</Value> + </ListValues> + </avr32gcc.compiler.symbols.DefSymbols> + <avr32gcc.compiler.directories.IncludePaths> + <ListValues> + <Value>%24(PackRepoDir)\atmel\UC3C_DFP\1.0.49\include\AT32UC3C2512C</Value> + <Value>../../../DiagnosticModule/DiagnosticModule</Value> + <Value>..</Value> + <Value>../DirectC</Value> + <Value>../DirectC/RTG4Algo</Value> + <Value>../DirectC/JTAG</Value> + <Value>../DirectC/G5Algo</Value> + <Value>../DirectC/G4Algo</Value> + <Value>../DirectC/G3Algo</Value> + </ListValues> + </avr32gcc.compiler.directories.IncludePaths> + <avr32gcc.compiler.optimization.level>Optimize (-O1)</avr32gcc.compiler.optimization.level> + <avr32gcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</avr32gcc.compiler.optimization.PrepareFunctionsForGarbageCollection> + <avr32gcc.compiler.optimization.UseAssemblerForPseudoInstructions>True</avr32gcc.compiler.optimization.UseAssemblerForPseudoInstructions> + <avr32gcc.compiler.warnings.AllWarnings>True</avr32gcc.compiler.warnings.AllWarnings> + <avr32gcc.compiler.warnings.ExtraWarnings>True</avr32gcc.compiler.warnings.ExtraWarnings> + <avr32gcc.compiler.warnings.Undefined>True</avr32gcc.compiler.warnings.Undefined> + <avr32gcc.compiler.warnings.WarningsAsErrors>True</avr32gcc.compiler.warnings.WarningsAsErrors> + <avr32gcc.linker.libraries.Libraries> + <ListValues> + <Value>libm</Value> + <Value>libDiagnosticModule.a</Value> + </ListValues> + </avr32gcc.linker.libraries.Libraries> + <avr32gcc.linker.libraries.LibrarySearchPaths> + <ListValues> + <Value>../../../DiagnosticModule/DiagnosticModule/Release</Value> + </ListValues> + </avr32gcc.linker.libraries.LibrarySearchPaths> + <avr32gcc.linker.optimization.GarbageCollectUnusedSections>True</avr32gcc.linker.optimization.GarbageCollectUnusedSections> + <avr32gcc.linker.optimization.PutReadOnlyDataInWritableDataSection>True</avr32gcc.linker.optimization.PutReadOnlyDataInWritableDataSection> + <avr32gcc.linker.optimization.AllowDirectReferencesToDataSection>True</avr32gcc.linker.optimization.AllowDirectReferencesToDataSection> + <avr32gcc.linker.miscellaneous.OtherOptions> + <ListValues> + <Value>-T..\..\..\DMAppFpgaProg\linker_script.x</Value> + </ListValues> + </avr32gcc.linker.miscellaneous.OtherOptions> + <avr32gcc.assembler.general.IncludePaths> + <ListValues> + <Value>%24(PackRepoDir)\atmel\UC3C_DFP\1.0.49\include\AT32UC3C2512C</Value> + </ListValues> + </avr32gcc.assembler.general.IncludePaths> + <avr32gcc.preprocessingassembler.general.IncludePaths> + <ListValues> + <Value>%24(PackRepoDir)\atmel\UC3C_DFP\1.0.49\include\AT32UC3C2512C</Value> + </ListValues> + </avr32gcc.preprocessingassembler.general.IncludePaths> +</Avr32Gcc> + </ToolchainSettings> + <PreBuildEvent> + </PreBuildEvent> + <PostBuildEvent>"$(ToolchainDir)\avr32-objcopy.exe" -O binary $(OutputDirectory)\$(OutputFileName)$(OutputFileExtension) $(OutputDirectory)\$(OutputFileName).bin</PostBuildEvent> + </PropertyGroup> + <ItemGroup> + <Compile Include="application_state.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="application_state.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\dpalg.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\dpalg.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\dpcom.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\dpcom.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\dpuser.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\dpuser.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\dputil.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\dputil.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G3Algo\dpcore.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G3Algo\dpcore.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G3Algo\dpfrom.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G3Algo\dpfrom.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G3Algo\dpG3alg.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G3Algo\dpG3alg.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G3Algo\dpnvm.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G3Algo\dpnvm.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G3Algo\dpsecurity.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G3Algo\dpsecurity.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G4Algo\dpG4alg.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G4Algo\dpG4alg.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G5Algo\dpG5alg.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\G5Algo\dpG5alg.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\JTAG\dpchain.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\JTAG\dpchain.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\JTAG\dpjtag.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\JTAG\dpjtag.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\RTG4Algo\dpRTG4alg.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="DirectC\RTG4Algo\dpRTG4alg.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="directc_wrapper.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="directc_wrapper.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="fpga.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="fpga.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="main.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="protocol.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="protocol.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="protocol_return_codes.h"> + <SubType>compile</SubType> + </Compile> + <Compile Include="setjmp_buffers.c"> + <SubType>compile</SubType> + </Compile> + <Compile Include="setjmp_buffers.h"> + <SubType>compile</SubType> + </Compile> + </ItemGroup> + <ItemGroup> + <Folder Include="DirectC\" /> + <Folder Include="DirectC\G3Algo\" /> + <Folder Include="DirectC\G4Algo\" /> + <Folder Include="DirectC\G5Algo\" /> + <Folder Include="DirectC\JTAG\" /> + <Folder Include="DirectC\RTG4Algo\" /> + </ItemGroup> + <Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" /> +</Project>
\ No newline at end of file diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpG3alg.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpG3alg.c new file mode 100644 index 0000000..2a26af1 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpG3alg.c @@ -0,0 +1,3439 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpG3alg.c */ +/* */ +/* Description: Contains initialization and data checking functions. */ +/* */ +/* ************************************************************************ */ + +#include "dpuser.h" +#ifdef ENABLE_G3_SUPPORT + +#include "dputil.h" +#include "dpcom.h" +#include "dpalg.h" +#include "dpG3alg.h" +#include "dpcore.h" +#include "dpfrom.h" +#include "dpnvm.h" +#include "dpsecurity.h" +#include "dpjtag.h" + +#ifdef ENABLE_IAP_SUPPORT +#include "urow_iap.h" +#endif + + +#ifndef ENABLE_CODE_SPACE_OPTIMIZATION +DPUCHAR dat_version; +#endif + +/* +* General purpose Global variables needed in the program +*/ +DPUCHAR AES_mode_value; /* Holds the value of the AES mode for dual key devices */ + + +/* Device exception is to test for 015 vs 030 devices. +* The value is read out from the data file +*/ +DPUCHAR device_exception; +DPUINT device_rows; /* Device specific number of rows */ +DPUCHAR device_SD; /* Device specific number of SD tiles */ + +/* dat_support_status contains the support and encryption status of the +* different features in the data file. +*/ +DPUINT dat_support_status; +/* device_security_flags contains the security (pass key and encryption) +* bit status of the device +*/ +DPULONG device_security_flags; + +/**************************************************************************** +* Purpose: main entry function +* This function needs to be called from the main application function with +* the approppriate action code set to intiate the desired action. +****************************************************************************/ +DPUCHAR dp_top_g3 (void) +{ + dp_init_G3_vars(); + if ((hardware_interface != GPIO_SEL) && (hardware_interface != IAP_SEL)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nHardware interface is not selected. Please assign hardware_interface to either IAP_SEL or GPIO_SEL prior to calling dp_top."); + #endif + + error_code = DPE_HARDWARE_NOT_SELECTED; + } + if (hardware_interface == GPIO_SEL) + { + #ifndef ENABLE_GPIO_SUPPORT + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nENABLE_GPIO_SUPPORT compile switch must be enabled to perform extrnal device programming."); + #endif + error_code = DPE_HARDWARE_NOT_SELECTED; + #endif + } + if (hardware_interface == IAP_SEL) + { + #ifndef ENABLE_IAP_SUPPORT + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nENABLE_IAP_SUPPORT compile switch must be enabled to perform IAP programming."); + #endif + error_code = DPE_HARDWARE_NOT_SELECTED; + #endif + } + + if (error_code == DPE_SUCCESS) + { + if (!( + (Action_code == DP_READ_USERCODE_ACTION_CODE) || + (Action_code == DP_IS_CORE_CONFIGURED_ACTION_CODE) || + (Action_code == DP_READ_IDCODE_ACTION_CODE) + )) + { + dp_check_image_crc(); + if (error_code == DPE_SUCCESS) + { + dp_check_dat_support_version(); + if (error_code == DPE_SUCCESS) + { + dp_get_dat_support_status(); + } + } + } + dp_perform_action(); + } + return error_code; +} + +void dp_init_G3_vars(void) +{ + #ifndef ENABLE_CODE_SPACE_OPTIMIZATION + dat_version = 0u; + #endif + + device_security_flags = 0u; + return; +} + +void dp_get_dat_support_status(void) +{ + + global_uint1 = 1u; + dat_support_status = 0u; + for (global_ulong1 = 0u;global_ulong1 < 16u ;global_ulong1 ++) + { + global_uchar1=(DPUCHAR) dp_get_bytes( Header_ID, + DAT_SUPPORT_STATUS_OFFSET + global_ulong1,1u); + if (global_uchar1) + { + dat_support_status |= global_uint1; + } + global_uint1 <<= 1u; + } + + return; +} + +void dp_check_dat_support_version(void) +{ + + global_uchar1 = (DPUCHAR) dp_get_bytes(Header_ID, HEADER_SIZE_OFFSET, 1u); + /* The header size of files generated from designer V8.6 is 69 vs. 56 from datgen and version 8.5 */ + if (global_uchar1 == 56u) + { + #ifdef ENABLE_CODE_SPACE_OPTIMIZATION + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: data file loaded is generated from Designer verion V8.5 or stand alone datgen utility. This version of the data file is not supported with ENABLE_CODE_SPACE_OPTIMIZATION compile switch enabled. Disable ENABLE_CODE_SPACE_OPTIMIZATION compile switch in dpuser.h and try again."); + #endif + error_code = DPE_DAT_VERSION_MISMATCH; + #else + dat_version = V85_DAT; + #endif + } + + + return; +} + +/**************************************************************************** +* Purpose: Checks the requested action against the compile options of the +* DirectC Code and the data file features. If the data file has support +* for a feature that is not supported by the DirectC code because the +* corresponding compile option is disabled, this function will generate +* depending on the requested action. +****************************************************************************/ +#ifndef ENABLE_CODE_SPACE_OPTIMIZATION +void dp_check_action(void) +{ + if ( (Action_code == DP_VERIFY_DEVICE_INFO_ACTION_CODE) || + (Action_code == DP_IS_CORE_CONFIGURED_ACTION_CODE) ) + { + } + else if ((Action_code == DP_READ_IDCODE_ACTION_CODE) || + (Action_code == DP_DEVICE_INFO_ACTION_CODE)) + { + #ifndef ENABLE_DISPLAY + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + else if (Action_code == DP_ERASE_ACTION_CODE) + { + if (((dat_support_status & CORE_DAT_SUPPORT_BIT) == 0U) && + ((dat_support_status & FROM_DAT_SUPPORT_BIT) == 0U) && + ((dat_support_status & SEC_DAT_SUPPORT_BIT) == 0U)) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + #ifdef ENABLE_IAP_SUPPORT + if ( (hardware_interface == IAP_SEL) && (device_ID == A2F200_ID) ) + { + if (dat_support_status & FROM_DAT_SUPPORT_BIT) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFROM erase is not supported with IAP on A2F200 devices. Refer to user guide for more information."); + #endif + error_code = DPE_ACTION_NOT_SUPPORTED; + } + } + if ( (hardware_interface == IAP_SEL)) + { + if (dat_support_status & SEC_DAT_SUPPORT_BIT) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nSecurity erase is not supported with IAP. Refer to user guide for more information."); + #endif + error_code = DPE_ACTION_NOT_SUPPORTED; + } + } + #endif + } + else if (Action_code == DP_PROGRAM_ACTION_CODE) + { + if (dat_support_status & CORE_DAT_SUPPORT_BIT) + { + #ifndef CORE_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + #ifndef CORE_ENCRYPT + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + /* Checking if core plain is enabled */ + else + { + #ifndef CORE_PLAIN + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + } + if (dat_support_status & FROM_DAT_SUPPORT_BIT) + { + #ifndef FROM_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + if (dat_support_status & FROM_DAT_ENCRYPTION_BIT) + { + #ifndef FROM_ENCRYPT + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + else + { + #ifndef FROM_PLAIN + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + #ifdef ENABLE_IAP_SUPPORT + if ( (hardware_interface == IAP_SEL) && (device_ID == A2F200_ID) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFROM programming is not supported with IAP on A2F200 devices. Refer to user guide for more information."); + #endif + error_code = DPE_ACTION_NOT_SUPPORTED; + } + #endif + } + if (dat_support_status & SEC_DAT_SUPPORT_BIT) + { + #ifndef SECURITY_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + #ifdef ENABLE_IAP_SUPPORT + if ( (hardware_interface == IAP_SEL) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nSecurity programming is not supported with IAP. Refer to user guide for more information."); + #endif + error_code = DPE_ACTION_NOT_SUPPORTED; + } + #endif + } + if ((dat_support_status & + (NVM0_DAT_ENCRYPTION_BIT | NVM1_DAT_ENCRYPTION_BIT | + NVM2_DAT_ENCRYPTION_BIT | NVM3_DAT_ENCRYPTION_BIT))) + { + #ifndef NVM_ENCRYPT + error_code = DPE_CODE_NOT_ENABLED; + #endif + if (((dat_support_status & NVM0_DAT_ENCRYPTION_BIT) == 0U) || + ((dat_support_status & NVM1_DAT_ENCRYPTION_BIT) == 0U) || + ((dat_support_status & NVM2_DAT_ENCRYPTION_BIT) == 0U) || + ((dat_support_status & NVM3_DAT_ENCRYPTION_BIT) == 0U)) + { + #ifndef NVM_PLAIN + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + else if (Action_code == DP_VERIFY_NVM_ACTION_CODE) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + else + { + } + } + } + else if (Action_code == DP_VERIFY_ACTION_CODE) + { + if (((dat_support_status & CORE_DAT_SUPPORT_BIT) == 0U) && + (((dat_support_status & FROM_DAT_SUPPORT_BIT) == 0U) || + (dat_support_status & FROM_DAT_ENCRYPTION_BIT)) && + ((dat_support_status & NVM_DAT_VERIFY_SUPPORT_BIT) == 0U)) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + if (dat_support_status & CORE_DAT_SUPPORT_BIT) + { + #ifndef CORE_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + #ifndef CORE_ENCRYPT + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + /* Checking if core plain is enabled */ + else + { + #ifndef CORE_PLAIN + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + } + if (dat_support_status & FROM_DAT_SUPPORT_BIT) + { + #ifndef FROM_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + if ((dat_support_status & FROM_DAT_ENCRYPTION_BIT) == 0U) + { + #ifndef FROM_PLAIN + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + } + if (dat_support_status & NVM_DAT_VERIFY_SUPPORT_BIT) + { + #ifndef NVM_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + #ifndef NVM_PLAIN + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + } + /* Core Code and Data support check */ + else if ((Action_code == DP_ERASE_ARRAY_ACTION_CODE) || + (Action_code == DP_PROGRAM_ARRAY_ACTION_CODE) || + (Action_code == DP_VERIFY_ARRAY_ACTION_CODE)) + { + if ((dat_support_status & CORE_DAT_SUPPORT_BIT) == 0U) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + /* Checking if the core support is enabled */ + #ifndef CORE_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + #ifndef CORE_ENCRYPT + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + /* Checking if core plain is enabled */ + else + { + #ifndef CORE_PLAIN + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + } + else if (Action_code == DP_ENC_DATA_AUTHENTICATION_ACTION_CODE) + { + if ( (dat_support_status & CORE_DAT_ENCRYPTION_BIT) == 0U) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + #ifndef CORE_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + #ifndef CORE_ENCRYPT + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + /* FROM Code and Data support check */ + else if ( (Action_code == DP_ERASE_FROM_ACTION_CODE) || + (Action_code == DP_PROGRAM_FROM_ACTION_CODE) || + (Action_code == DP_VERIFY_FROM_ACTION_CODE) ) + { + if ((dat_support_status & FROM_DAT_SUPPORT_BIT) == 0U) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + #ifndef FROM_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + if (dat_support_status & FROM_DAT_ENCRYPTION_BIT) + { + #ifndef FROM_ENCRYPT + error_code = DPE_CODE_NOT_ENABLED; + #endif + if (Action_code == DP_VERIFY_FROM_ACTION_CODE) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + } + /* Checking if FROM plain is enabled */ + else + { + #ifndef FROM_PLAIN + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + #ifdef ENABLE_IAP_SUPPORT + if ( (hardware_interface == IAP_SEL) && (device_ID == A2F200_ID) ) + { + if ( ( Action_code == DP_ERASE_FROM_ACTION_CODE) || + ( Action_code == DP_PROGRAM_FROM_ACTION_CODE) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFROM programming is not supported with IAP on A2F200 devices. Refer to user guide for more information."); + #endif + error_code = DPE_ACTION_NOT_SUPPORTED; + } + } + #endif + } + else if ( (Action_code == DP_PROGRAM_NVM_ACTION_CODE) || (Action_code == DP_VERIFY_NVM_ACTION_CODE) || + (Action_code == DP_PROGRAM_PRIVATE_CLIENTS_ACTION_CODE) || (Action_code == DP_VERIFY_PRIVATE_CLIENTS_ACTION_CODE)) + { + if ( (dat_support_status & (NVM0_DAT_SUPPORT_BIT | + NVM1_DAT_SUPPORT_BIT | + NVM2_DAT_SUPPORT_BIT | + NVM3_DAT_SUPPORT_BIT)) == 0U) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + #ifndef NVM_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + if ((dat_support_status & + (NVM0_DAT_ENCRYPTION_BIT | NVM1_DAT_ENCRYPTION_BIT | + NVM2_DAT_ENCRYPTION_BIT | NVM3_DAT_ENCRYPTION_BIT))) + { + #ifndef NVM_ENCRYPT + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + else if ( ( (dat_support_status & NVM0_DAT_ENCRYPTION_BIT) == 0U ) || + ( (dat_support_status & NVM1_DAT_ENCRYPTION_BIT) == 0U ) || + ( (dat_support_status & NVM2_DAT_ENCRYPTION_BIT) == 0U ) || + ( (dat_support_status & NVM3_DAT_ENCRYPTION_BIT) == 0U ) ) + { + #ifndef NVM_PLAIN + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + else if (Action_code == DP_VERIFY_NVM_ACTION_CODE) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + else + { + } + } + else if ( (Action_code == DP_PROGRAM_PRIVATE_CLIENTS_ACTION_CODE) || + (Action_code == DP_VERIFY_PRIVATE_CLIENTS_ACTION_CODE) ) + { + if ( (dat_support_status & NVM0_DAT_SUPPORT_BIT ) == 0U) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + #ifndef NVM_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + if (dat_support_status & NVM0_DAT_ENCRYPTION_BIT) + { + #ifndef NVM_ENCRYPT + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + else if ((dat_support_status & NVM0_DAT_ENCRYPTION_BIT) == 0U ) + { + #ifndef NVM_PLAIN + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + else if (Action_code == DP_VERIFY_PRIVATE_CLIENTS_ACTION_CODE) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + else + { + } + } + else if ( (Action_code == DP_ERASE_SECURITY_ACTION_CODE) || + (Action_code == DP_PROGRAM_SECURITY_ACTION_CODE) ) + { + if ((dat_support_status & SEC_DAT_SUPPORT_BIT) == 0U) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + } + #ifndef SECURITY_SUPPORT + error_code = DPE_CODE_NOT_ENABLED; + #endif + #ifdef ENABLE_IAP_SUPPORT + if (hardware_interface == IAP_SEL) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nSecurity programming is not supported with IAP. Refer to user guide for more information."); + #endif + error_code = DPE_ACTION_NOT_SUPPORTED; + } + #endif + } + else + { + error_code = DPE_ACTION_NOT_FOUND; + } + + #ifdef ENABLE_DISPLAY + if (error_code == DPE_ACTION_NOT_FOUND) + { + dp_display_text("\r\nUser Error: Action not found..."); + } + else if (error_code == DPE_ACTION_NOT_SUPPORTED) + { + dp_display_text("\r\nUser Error: Data file does not contain the data needed to support requested action. Check original STAPL file configuration."); + } + else if (error_code == DPE_CODE_NOT_ENABLED) + { + dp_display_text("\r\nUser Error: Compiled code does not support the requesed action. Re-compile the code with the arropriate compile option enabled..."); + } + else + { + } + #endif + + return; +} +#else +void dp_check_action(void) +{ + DPUINT dat_status=0u; + /* Construct code support */ + #ifdef ENABLE_GPIO_SUPPORT + const DPUINT code_status = CORE_CODE_PLAIN_SUPPORT_BIT | + CORE_CODE_ENCRYPTION_BIT | + FROM_CODE_PLAIN_SUPPORT_BIT | + FROM_CODE_ENCRYPTION_BIT | + NVM_CODE_PLAIN_SUPPORT_BITS | + NVM_CODE_ENCRYPTION_BITS | + SEC_CODE_SUPPORT_BIT; + #endif + #ifdef ENABLE_IAP_SUPPORT + const DPUINT a2f200_iap_code_status = CORE_CODE_PLAIN_SUPPORT_BIT | + CORE_CODE_ENCRYPTION_BIT | + NVM_CODE_PLAIN_SUPPORT_BITS | + NVM_CODE_ENCRYPTION_BITS; + const DPUINT a2f500_iap_code_status = CORE_CODE_PLAIN_SUPPORT_BIT | + CORE_CODE_ENCRYPTION_BIT | + FROM_CODE_PLAIN_SUPPORT_BIT | + FROM_CODE_ENCRYPTION_BIT | + NVM_CODE_PLAIN_SUPPORT_BITS | + NVM_CODE_ENCRYPTION_BITS; + #endif + + /* The data file bit mapping is as follows. + bit 0: CORE support, + bit 1: FROM support, + bit 2: NVM support, any NVM block will cause this flag to be set. + bit 3: NVM0 support, + bit 4: NVM1 support, + bit 5: NVM2 support, + bit 6: NVM3 support, + bit 7: NVM verify support. It is set if any of the blocks are not encrypted. + bit 8: Pass key. + bit 9: AES ket. + bit 10: CORE Encryption status + bit 11: FROM Encryption status + bit 12: NVM0 Encryption status + bit 13: NVM1 Encryption status + bit 14: NVM2 Encryption status + bit 15: NVM3 Encryption status + + These bits need to be mapped as follows: + bit 0: CORE plain status, + bit 1: FROM plain status, + bit 2: NVM0 plain status, + bit 3: NVM1 plain status, + bit 4: NVM2 plain status, + bit 5: NVM3 plain status, + bit 6: Do not care + bit 7: Do not care + bit 8: Pass key. + bit 9: Do not care + bit 10: CORE Encryption status + bit 11: FROM Encryption status + bit 12: NVM0 Encryption status + bit 13: NVM1 Encryption status + bit 14: NVM2 Encryption status + bit 15: NVM3 Encryption status + + */ + /* Need to line up the support bits to line up with encrypt status bits so + that support bits can be switched to plain support bits instead */ + + if(hardware_interface == GPIO_SEL) + { + dat_status = (dat_support_status & 0x0003u) | + ((dat_support_status & 0x0078u) >> 1u); + /* This statments flips the support bits to plain support bits */ + dat_status = dat_status ^ (dat_support_status >> 10); + + /* This statment add the encypt bits for comparisson. The mask value lines + * up with the definitions above*/ + dat_status |= (dat_support_status & 0xFD00u); + + /* test for compatiblity */ + #ifdef ENABLE_GPIO_SUPPORT + if (hardware_interface == GPIO_SEL) + { + dat_status = dat_status & (dat_status ^ code_status); + } + #endif + #ifdef ENABLE_IAP_SUPPORT + if (hardware_interface == IAP_SEL) + { + if (device_ID == A2F200_ID) + { + dat_status = dat_status & (dat_status ^ a2f200_iap_code_status); + } + else + { + dat_status = dat_status & (dat_status ^ a2f500_iap_code_status); + } + } + #endif + + if (dat_status) + { + #ifdef ENABLE_DISPLAY + #ifdef ENABLE_IAP_SUPPORT + if (hardware_interface == IAP_SEL) + { + if (device_ID == A2F200_ID) + { + dp_display_text("\r\nUser Error: IAP does not support FROM or security programming on A2F200 devices. Regenerate data file without FROM and security support."); + } + else + { + dp_display_text("\r\nUser Error: IAP does not support security programming on A2F500. Regenerate data file without security support."); + } + } + #endif + dp_display_text("\r\nUser Error: Compiled code does not support the requesed action. Re-compile the code with the arropriate compile option enabled..."); + #endif + error_code = DPE_CODE_NOT_ENABLED; + } + } + + return; +} +#endif + +void dp_perform_action (void) +{ + /* Check device ID against the ID in the data file. Assign parameters */ + if (!( + (Action_code == DP_READ_USERCODE_ACTION_CODE) || + (Action_code == DP_IS_CORE_CONFIGURED_ACTION_CODE) || + (Action_code == DP_READ_IDCODE_ACTION_CODE) + )) + { + #ifdef ENABLE_CODE_SPACE_OPTIMIZATION + dp_check_device_ID(); + #else + if (dat_version == V85_DAT) + { + dp_check_device_ID_V85_DAT(); + } + else + { + dp_check_device_ID(); + } + #endif + } + if (error_code == DPE_SUCCESS) + { + if (Action_code == DP_IS_CORE_CONFIGURED_ACTION_CODE) + { + dp_is_core_configured(); + Action_done = TRUE; + } + /* This action is valid for security and device feature combinations */ + #ifdef ENABLE_DISPLAY + if (Action_code == DP_READ_USERCODE_ACTION_CODE) + { + dp_read_usercode_action(); + Action_done = TRUE; + } + if (Action_code == DP_READ_IDCODE_ACTION_CODE) + { + dp_read_idcode_action(); + Action_done = TRUE; + } + #endif + #ifdef NVM_SUPPORT + #ifndef DISABLE_NVM_SPECIFIC_ACTIONS + if (Action_done == FALSE) + { + if ( + (Action_code == DP_PROGRAM_NVM_ACTIVE_ARRAY_ACTION_CODE) || + (Action_code == DP_VERIFY_NVM_ACTIVE_ARRAY_ACTION_CODE) || + (Action_code == DP_PROGRAM_PRIVATE_CLIENTS_ACTIVE_ARRAY_ACTION_CODE) || + (Action_code == DP_VERIFY_PRIVATE_CLIENTS_ACTIVE_ARRAY_ACTION_CODE) + ) + { + dp_check_device_and_rev(); + if (error_code == DPE_SUCCESS) + { + dp_initialize_access_nvm(); + if (error_code == DPE_SUCCESS) + { + if (Action_code == DP_PROGRAM_NVM_ACTIVE_ARRAY_ACTION_CODE) + { + if (dat_support_status & + (NVM0_DAT_SUPPORT_BIT | NVM1_DAT_SUPPORT_BIT | + NVM2_DAT_SUPPORT_BIT | NVM3_DAT_SUPPORT_BIT)) + { + dp_program_nvm_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + } + else if (Action_code == DP_VERIFY_NVM_ACTIVE_ARRAY_ACTION_CODE) + { + #ifdef NVM_PLAIN + if (dat_support_status & NVM_DAT_VERIFY_SUPPORT_BIT) + { + dp_verify_nvm_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + #endif + } + else if (Action_code == DP_PROGRAM_PRIVATE_CLIENTS_ACTIVE_ARRAY_ACTION_CODE) + { + if (dat_support_status & + (NVM0_DAT_SUPPORT_BIT | NVM1_DAT_SUPPORT_BIT | + NVM2_DAT_SUPPORT_BIT | NVM3_DAT_SUPPORT_BIT)) + { + dp_program_nvm_private_clients_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + } + else + { + #ifdef NVM_PLAIN + if (dat_support_status & NVM_DAT_VERIFY_SUPPORT_BIT) + { + dp_verify_nvm_private_clients_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + #endif + } + + } + dp_exit_access_nvm(); + } + Action_done = TRUE; + } + } + #endif + #endif + /* Enter programming mode and load BSR */ + if (Action_done == FALSE) + { + #ifdef NVM_SUPPORT + if ( + ((device_family & SFS_BIT) == SFS_BIT) && + (dat_support_status | (NVM0_DAT_SUPPORT_BIT | NVM1_DAT_SUPPORT_BIT | NVM2_DAT_SUPPORT_BIT | NVM3_DAT_SUPPORT_BIT)) && + ( + (Action_code == DP_PROGRAM_ACTION_CODE) || + (Action_code == DP_VERIFY_ACTION_CODE) || + (Action_code == DP_PROGRAM_NVM_ACTION_CODE) || + (Action_code == DP_VERIFY_NVM_ACTION_CODE) || + (Action_code == DP_PROGRAM_PRIVATE_CLIENTS_ACTION_CODE) || + (Action_code == DP_VERIFY_PRIVATE_CLIENTS_ACTION_CODE) || + ( + ((device_family & SFS_BIT) == SFS_BIT) && + ((Action_code == DP_PROGRAM_ARRAY_ACTION_CODE) ||(Action_code == DP_VERIFY_ARRAY_ACTION_CODE)) + ) + ) + ) + { + if (hardware_interface == GPIO_SEL) + { + dp_initialize_access_nvm(); + } + } + #endif + if (error_code == DPE_SUCCESS) + { + dp_initialize(); + } + if (error_code == DPE_SUCCESS) + { + /* Read the security bit settings of the target device */ + dp_read_device_security(); + + if ((Action_code != DP_READ_IDCODE_ACTION_CODE) && + (Action_code != DP_DEVICE_INFO_ACTION_CODE) && + (Action_code != DP_VERIFY_DEVICE_INFO_ACTION_CODE)) + { + /* Match security bit settings against the data file */ + dp_check_security_settings(); + if (error_code == DPE_SUCCESS) + { + #ifdef ENABLE_CODE_SPACE_OPTIMIZATION + dp_get_dat_dual_key_flag(); + #else + if (dat_version != V85_DAT) + { + dp_get_dat_dual_key_flag(); + } + #endif + #if ((!defined ENABLE_CODE_SPACE_OPTIMIZATION)) + /* Check if the target device is a dual key device */ + dp_check_dual_key(); + if (error_code == DPE_SUCCESS) + #endif + { + #ifndef ENABLE_CODE_SPACE_OPTIMIZATION + /* Identify arm enabled devices */ + dp_verify_id_dmk(); + if (error_code == DPE_SUCCESS) + #endif + { + /* Check requested action against the data file and compile options of DirectC */ + dp_check_action(); + if (error_code == DPE_SUCCESS) + { + #ifdef NVM_SUPPORT + /* Check for calibration over lap */ + if ((Action_code == DP_PROGRAM_NVM_ACTION_CODE) || (Action_code == DP_PROGRAM_ACTION_CODE) ) + { + if (dat_support_status & NVM0_DAT_SUPPORT_BIT) + { + #ifdef NVM_ENCRYPT + if (dat_support_status & NVM0_DAT_ENCRYPTION_BIT) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: If you are programming a calibrated device, please regenerate the analog system configuration file with Libero 8.2 SP1 or greater."); + #endif + } + #endif + #ifdef NVM_PLAIN + if ((dat_support_status & NVM0_DAT_ENCRYPTION_BIT) == 0U) + { + dp_verify_calibration(); + } + #endif + } + } + #endif + } + } + } + } + } + /* Perform the action */ + if (error_code == DPE_SUCCESS) + { + switch (Action_code) + { + #ifdef ENABLE_DISPLAY + case DP_DEVICE_INFO_ACTION_CODE: + dp_device_info_action(); + break; + case DP_VERIFY_DEVICE_INFO_ACTION_CODE: + dp_verify_device_info_action(); + break; + #endif + case DP_ERASE_ACTION_CODE: + dp_erase_action(); + break; + case DP_PROGRAM_ACTION_CODE: + dp_program_action(); + break; + case DP_VERIFY_ACTION_CODE: + if ( (dat_support_status & CORE_DAT_SUPPORT_BIT) || + ( (dat_support_status & FROM_DAT_SUPPORT_BIT) && + ( (dat_support_status & FROM_DAT_ENCRYPTION_BIT) == 0U)) || + (dat_support_status & NVM_DAT_VERIFY_SUPPORT_BIT)) + { + dp_verify_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + #ifndef DISABLE_CORE_SPECIFIC_ACTIONS + #ifdef CORE_SUPPORT + case DP_ERASE_ARRAY_ACTION_CODE: + if (dat_support_status & CORE_DAT_SUPPORT_BIT) + { + dp_erase_array_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + case DP_PROGRAM_ARRAY_ACTION_CODE: + if (dat_support_status & CORE_DAT_SUPPORT_BIT) + { + dp_program_array_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + case DP_VERIFY_ARRAY_ACTION_CODE: + if (dat_support_status & CORE_DAT_SUPPORT_BIT) + { + dp_verify_array_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + #ifdef CORE_ENCRYPT + case DP_ENC_DATA_AUTHENTICATION_ACTION_CODE: + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + dp_enc_data_authentication_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + #endif + #endif + #endif + #ifndef DISABLE_FROM_SPECIFIC_ACTIONS + #ifdef FROM_SUPPORT + case DP_ERASE_FROM_ACTION_CODE: + if (dat_support_status & FROM_DAT_SUPPORT_BIT) + { + dp_erase_from_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + case DP_PROGRAM_FROM_ACTION_CODE: + if (dat_support_status & FROM_DAT_SUPPORT_BIT) + { + dp_program_from_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + case DP_VERIFY_FROM_ACTION_CODE: + if ((dat_support_status & FROM_DAT_SUPPORT_BIT) && + ((dat_support_status & FROM_DAT_ENCRYPTION_BIT) == 0U)) + { + dp_verify_from_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + #endif + #endif + #ifndef DISABLE_NVM_SPECIFIC_ACTIONS + #ifdef NVM_SUPPORT + case DP_PROGRAM_NVM_ACTION_CODE: + if (dat_support_status & (NVM0_DAT_SUPPORT_BIT | NVM1_DAT_SUPPORT_BIT | NVM2_DAT_SUPPORT_BIT | NVM3_DAT_SUPPORT_BIT)) + { + dp_program_nvm_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + case DP_PROGRAM_PRIVATE_CLIENTS_ACTION_CODE: + if (dat_support_status & NVM0_DAT_SUPPORT_BIT ) + { + dp_program_nvm_private_clients_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + #ifdef NVM_PLAIN + case DP_VERIFY_NVM_ACTION_CODE: + if (dat_support_status & NVM_DAT_VERIFY_SUPPORT_BIT) + { + dp_verify_nvm_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + case DP_VERIFY_PRIVATE_CLIENTS_ACTION_CODE: + if (dat_support_status & NVM_DAT_VERIFY_SUPPORT_BIT) + { + dp_verify_nvm_private_clients_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + #endif + #endif + #endif + #ifndef DISABLE_SEC_SPECIFIC_ACTIONS + #ifdef SECURITY_SUPPORT + case DP_ERASE_SECURITY_ACTION_CODE: + if (dat_support_status & SEC_DAT_SUPPORT_BIT) + { + dp_erase_security_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + case DP_PROGRAM_SECURITY_ACTION_CODE: + if (dat_support_status & SEC_DAT_SUPPORT_BIT) + { + dp_program_security_action(); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + break; + #endif + #endif + default: + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nAction not found..."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + break; + } + } + dp_exit(); + } + } + } + return; +} +/**************************************************************************** +* Purpose: Reads the target device ID and checks it against the data file. +* Assign device specific parameters. +****************************************************************************/ +#ifndef ENABLE_CODE_SPACE_OPTIMIZATION +void dp_check_device_ID_V85_DAT(void) +{ + + opcode = IDCODE; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + DRSCAN_out(IDCODE_LENGTH, (DPUCHAR*)DPNULL, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + + device_ID = ((DPULONG) global_buf1 [0]) | (((DPULONG) global_buf1 [1]) <<8) | (((DPULONG) global_buf1 [2]) <<16) | (((DPULONG) global_buf1 [3]) <<24); + device_rev = (DPUCHAR) (device_ID >> 28); + + + + /* DataIndex is a variable used for loading the array data but not used now. + * Therefore, it can be used to store the Data file ID for */ + DataIndex = dp_get_bytes(Header_ID,ID_OFFSET,4u); + + /* Identifying target device and setting its parms */ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nActID = "); + dp_display_value(device_ID,HEX); + dp_display_text(" ExpID = "); + dp_display_value(DataIndex,HEX); + dp_display_text("\r\nDevice Rev = "); + dp_display_value(device_rev,HEX); + #endif + + if ( ((device_ID & AXXE600X_ID_MASK) == (AXXE600X_ID & AXXE600X_ID_MASK)) && ((device_ID & AXXE600X_ID_MASK) == (DataIndex & AXXE600X_ID_MASK)) ) + { + device_ID &= AXXE600X_ID_MASK; + device_SD = AXXE600X_SD; + device_rows = AXXE600X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AXXE600X_BSR_BIT_LENGTH; + } + else if (((device_ID & AXXE1500X_ID_MASK) == (AXXE1500X_ID & AXXE1500X_ID_MASK)) && ((device_ID & AXXE1500X_ID_MASK) == (DataIndex & AXXE1500X_ID_MASK))) + { + device_ID &= AXXE1500X_ID_MASK; + device_SD = AXXE1500X_SD; + device_rows = AXXE1500X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AXXE1500X_BSR_BIT_LENGTH; + } + else if (((device_ID & AXXE3000X_ID_MASK) == (AXXE3000X_ID & AXXE3000X_ID_MASK)) && ((device_ID & AXXE3000X_ID_MASK) == (DataIndex & AXXE3000X_ID_MASK))) + { + device_ID &= AXXE3000X_ID_MASK; + device_SD = AXXE3000X_SD; + device_rows = AXXE3000X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AXXE3000X_BSR_BIT_LENGTH; + } + else if (((device_ID & AXX030X_ID_MASK) == (AXX030X_ID & AXX030X_ID_MASK)) && ((device_ID & AXX030X_ID_MASK) == (DataIndex & AXX030X_ID_MASK))) + { + device_ID &= AXX030X_ID_MASK; + device_SD = AXX030X_SD; + device_rows = AXX030X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AXX030X_BSR_BIT_LENGTH; + } + else if (((device_ID & AXX060X_ID_MASK) == (AXX060X_ID & AXX060X_ID_MASK)) && ((device_ID & AXX060X_ID_MASK) == (DataIndex & AXX060X_ID_MASK))) + { + device_ID &= AXX060X_ID_MASK; + device_SD = AXX060X_SD; + device_rows = AXX060X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AXX060X_BSR_BIT_LENGTH; + } + else if (((device_ID & AXX125X_ID_MASK) == (AXX125X_ID & AXX125X_ID_MASK)) && ((device_ID & AXX125X_ID_MASK) == (DataIndex & AXX125X_ID_MASK))) + { + device_ID &= AXX125X_ID_MASK; + device_SD = AXX125X_SD; + device_rows = AXX125X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AXX125X_BSR_BIT_LENGTH; + } + else if (((device_ID & AXX250X_ID_MASK) == (AXX250X_ID & AXX250X_ID_MASK)) && ((device_ID & AXX250X_ID_MASK) == (DataIndex & AXX250X_ID_MASK))) + { + device_ID &= AXX250X_ID_MASK; + device_SD = AXX250X_SD; + device_rows = AXX250X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AXX250X_BSR_BIT_LENGTH; + } + else if (((device_ID & AXX400X_ID_MASK) == (AXX400X_ID & AXX400X_ID_MASK)) && ((device_ID & AXX400X_ID_MASK) == (DataIndex & AXX400X_ID_MASK))) + { + device_ID &= AXX400X_ID_MASK; + device_SD = AXX400X_SD; + device_rows = AXX400X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AXX400X_BSR_BIT_LENGTH; + } + else if (((device_ID & AXX600X_ID_MASK) == (AXX600X_ID & AXX600X_ID_MASK)) && ((device_ID & AXX600X_ID_MASK) == (DataIndex & AXX600X_ID_MASK))) + { + device_ID &= AXX600X_ID_MASK; + device_SD = AXX600X_SD; + device_rows = AXX600X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AXX600X_BSR_BIT_LENGTH; + } + else if (((device_ID & AXX1000X_ID_MASK) == (AXX1000X_ID & AXX1000X_ID_MASK)) && ((device_ID & AXX1000X_ID_MASK) == (DataIndex & AXX1000X_ID_MASK))) + { + device_ID &= AXX1000X_ID_MASK; + device_SD = AXX1000X_SD; + device_rows = AXX1000X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AXX1000X_BSR_BIT_LENGTH; + } + else if (((device_ID & AGLP030X_ID_MASK) == (AGLP030X_ID & AGLP030X_ID_MASK)) && ((device_ID & AGLP030X_ID_MASK) == (DataIndex & AGLP030X_ID_MASK))) + { + device_ID &= AGLP030X_ID_MASK; + device_SD = AGLP030X_SD; + device_rows = AGLP030X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AGLP030X_BSR_BIT_LENGTH; + } + else if (((device_ID & AGLP060X_ID_MASK) == (AGLP060X_ID & AGLP060X_ID_MASK)) && ((device_ID & AGLP060X_ID_MASK) == (DataIndex & AGLP060X_ID_MASK))) + { + device_ID &= AGLP060X_ID_MASK; + device_SD = AGLP060X_SD; + device_rows = AGLP060X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AGLP060X_BSR_BIT_LENGTH; + } + else if (((device_ID & AGLP125X_ID_MASK) == (AGLP125X_ID & AGLP125X_ID_MASK)) && ((device_ID & AGLP125X_ID_MASK) == (DataIndex & AGLP125X_ID_MASK))) + { + device_ID &= AGLP125X_ID_MASK; + device_SD = AGLP125X_SD; + device_rows = AGLP125X_ROWS; + device_family |= AXX_BIT; + device_bsr_bit_length = AGLP125X_BSR_BIT_LENGTH; + } + else if (((device_ID & AFS090_ID_MASK) == (AFS090_ID & AFS090_ID_MASK)) && ((device_ID & AFS090_ID_MASK) == (DataIndex & AFS090_ID_MASK))) + { + device_ID &= AFS090_ID_MASK; + device_SD = AFS090_SD; + device_rows = AFS090_ROWS; + device_family |= AFS_BIT; + device_bsr_bit_length = AFS090_BSR_BIT_LENGTH; + } + else if (((device_ID & AFS250_ID_MASK) == (AFS250_ID & AFS250_ID_MASK)) && ((device_ID & AFS250_ID_MASK) == (DataIndex & AFS250_ID_MASK))) + { + device_ID &= AFS250_ID_MASK; + device_SD = AFS250_SD; + device_rows = AFS250_ROWS; + device_family |= AFS_BIT; + device_bsr_bit_length = AFS250_BSR_BIT_LENGTH; + } + else if (((device_ID & AFS600_ID_MASK) == (AFS600_ID & AFS600_ID_MASK) ) && ((device_ID & AFS600_ID_MASK) == (DataIndex & AFS600_ID_MASK))) + { + device_ID &= AFS600_ID_MASK; + device_SD = AFS600_SD; + device_rows = AFS600_ROWS; + device_family |= AFS_BIT; + device_bsr_bit_length = AFS600_BSR_BIT_LENGTH; + } + else if (((device_ID & AFS1500_ID_MASK) == (AFS1500_ID & AFS1500_ID_MASK) ) && ((device_ID & AFS1500_ID_MASK) == (DataIndex & AFS1500_ID_MASK))) + { + device_ID &= AFS1500_ID_MASK; + device_SD = AFS1500_SD; + device_rows = AFS1500_ROWS; + device_family |= AFS_BIT; + device_bsr_bit_length = AFS1500_BSR_BIT_LENGTH; + } + else + { + error_code = DPE_IDCODE_ERROR; + } + return; +} +#endif +void dp_check_device_ID(void) +{ + + /* DataIndex is a variable used for loading the array data but not used now. + * Therefore, it can be used to store the Data file ID for */ + DataIndex = dp_get_bytes(Header_ID,ID_OFFSET,4U); + global_ulong1 = dp_get_bytes(Header_ID,ID_MASK_OFFSET,4U); + + device_ID &= global_ulong1; + DataIndex &= global_ulong1; + + + /* Identifying target device and setting its parms */ + if ( (DataIndex & 0xfff) == MICROSEMI_ID) + { + if (device_ID == DataIndex ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nActID = "); + dp_display_value(device_ID,HEX); + dp_display_text(" ExpID = "); + dp_display_value(DataIndex,HEX); + dp_display_text("\r\nDevice Rev = "); + dp_display_value(device_rev,HEX); + #endif + + device_SD = (DPUCHAR) dp_get_bytes(Header_ID,SD_TILES_OFFSET,1U); + device_rows = (DPUINT) dp_get_bytes(Header_ID,MAP_ROWS_OFFSET,2U); + device_family |= (DPUCHAR) dp_get_bytes(Header_ID,DEVICE_FAMILY_OFFSET,1U); + device_bsr_bit_length = (DPUINT) dp_get_bytes(Header_ID,BSR_LENGTH_OFFSET,2U); + device_exception = (DPUCHAR) dp_get_bytes(Header_ID,DEVICE_NAME_OFFSET,1U); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text(" ExpID = "); + dp_display_value(DataIndex,HEX); + #endif + error_code = DPE_IDCODE_ERROR; + } + } + else + { + error_code = DPE_IDCODE_ERROR; + } + +} +/**************************************************************************** +* Purpose: Perform the test register test to identify if the target device +* is 015 or 030 device. +****************************************************************************/ +#if (!defined ENABLE_CODE_SPACE_OPTIMIZATION) +void dp_test_reg_015_030_check(void) +{ + + opcode = LDVPROP; + IRSCAN_in(); + DRSCAN_out(LDVPROP_LENGTH, (DPUCHAR*)DPNULL, &global_uchar1); + + /* Check for 030 mistmacth */ + if (global_uchar1 == 0x20U) + { + if (device_exception == AXX015_DEVICE) + { + error_code = DPE_IDCODE_ERROR; + } + } + else if (global_uchar1 == 0x21U) + { + if (device_exception == AXX030_DEVICE) + { + error_code = DPE_IDCODE_ERROR; + } + } + else if (global_uchar1 == 0x3FU) + { + dp_frow_015_030_check(); + } + else + { + } + + return; +} +/**************************************************************************** +* Purpose: Perform the forw bit test to identify if the target device +* is 015 or 030 device. +****************************************************************************/ +void dp_frow_015_030_check(void) +{ + + global_uchar1 = 0x4U; + dp_read_factory_row(); + + if ( (global_buf1[6] & 0x80U) == 0x80U ) + { + if (device_exception == AXX030_DEVICE) + { + error_code = DPE_IDCODE_ERROR; + } + } + else + { + if (device_exception == AXX015_DEVICE) + { + error_code = DPE_IDCODE_ERROR; + } + } + return; +} +#endif + +void dp_vnr(void) +{ + opcode = DESELECT_ALL_TILES; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,DESELECT_ALL_TILES_CYCLES); + return; +} +/**************************************************************************** +* Purpose: Loads the BSR regsiter with data specified in the data file. +* If BSR_SAMPLE is enabled, the data is not loaded. Instead, the last known +* State of the IOs is maintained by stepping through DRCapture JTAG state. +****************************************************************************/ +void dp_load_bsr(void) +{ + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nSetting BSR Configurations..."); + #endif + opcode = ISC_SAMPLE; + IRSCAN_out(&global_uchar1); + + #ifdef BSR_SAMPLE + /* Capturing the last known state of the IOs is only valid if the core + was programmed. Otherwise, load the BSR with what is in the data file. */ + if (!(global_uchar1 & 0x4u)) + { + dp_get_bytes(BsrPattern_ID,0u,1u); + if (return_bytes) + { + dp_get_and_DRSCAN_in(BsrPattern_ID, device_bsr_bit_length, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + } + else + { + goto_jtag_state(JTAG_CAPTURE_DR,0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + #else + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nLoading BSR..."); + #endif + dp_get_bytes(BsrPattern_ID,0u,1u); + if (return_bytes) + { + dp_get_and_DRSCAN_in(BsrPattern_ID, device_bsr_bit_length, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + #endif + + + return; +} +/**************************************************************************** +* Purpose: Enter programming mode, load BSR and perform DMK verification +* and key match to unlock the device if applicable. +****************************************************************************/ +void dp_initialize(void) +{ + /* Execute ISC_ENABLE */ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nInitializing Target Device..."); + #endif + dp_load_bsr(); + dp_vnr(); + + + /* Enter programming mode */ + opcode = ISC_ENABLE; + IRSCAN_in(); + DRSCAN_in(0u, 18u, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_ENABLE_CYCLES); + + dp_delay(ISC_ENABLE_DELAY); + + DRSCAN_out(18u, (DPUCHAR*)DPNULL, global_buf1); + + if ((global_buf1[2] & 0x3U) != 0x3U) + { + error_code = DPE_INIT_FAILURE; + } + + /* Display factory information */ + global_uchar1 = 0u; + dp_read_factory_row(); + /* FSN bits are bits 55..8 */ + /* Needed to do this to avoid Misra-C compliance issues */ + for(global_uchar1 = 0u; global_uchar1 < 7u; global_uchar1++) + { + global_buf1[global_uchar1] = global_buf1[global_uchar1+1u]; + } + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFSN: "); + dp_display_array(global_buf1, 6u ,HEX); + #endif + + + + /* Check for 015 vs 030 devices if applicable */ + #if ((!defined ENABLE_CODE_SPACE_OPTIMIZATION)) + if (dat_version != V85_DAT) + { + if ((device_exception == AXX015_DEVICE) || (device_exception == AXX030_DEVICE)) + { + dp_test_reg_015_030_check(); + } + } + #endif + /* Perform kdata verification if applicable. */ + if (error_code == DPE_SUCCESS) + { + #if ((defined CORE_ENCRYPT) | (defined FROM_ENCRYPT) | (defined NVM_ENCRYPT)) + if ((Action_code != DP_READ_IDCODE_ACTION_CODE) && (Action_code != DP_DEVICE_INFO_ACTION_CODE) && (Action_code != DP_VERIFY_DEVICE_INFO_ACTION_CODE)) + { + if (dat_support_status & (CORE_DAT_ENCRYPTION_BIT | FROM_DAT_ENCRYPTION_BIT | NVM0_DAT_ENCRYPTION_BIT | NVM1_DAT_ENCRYPTION_BIT | NVM2_DAT_ENCRYPTION_BIT | NVM3_DAT_ENCRYPTION_BIT)) + { + + global_uchar1 = 0U; + /* This is to determine if there is a valid kdata in the data file. + In the case of Dual key plain programming, the encryption status bits are set + in the DirectC code to use the encryption functions. In this case, kdata + verification is called although it does not exit. */ + for (global_uint1 = 0U;global_uint1 < 16U; global_uint1++) + { + global_uchar1 |= (DPUCHAR) dp_get_bytes(KDATA_ID,(DPULONG)global_uint1,1U); + } + + if (return_bytes && (global_uchar1 != 0U)) + { + dp_verify_enc_key(); + } + + + } + } + #endif + /* Perform key matching if applicable */ + if (error_code == DPE_SUCCESS) + { + dp_get_bytes(UKEY_ID,0U,1U); + if (return_bytes) + { + dp_match_security(); + } + /* Perform discrete address shifting check if applicable. */ + #if ( (!defined ENABLE_CODE_SPACE_OPTIMIZATION) || (defined ENABLE_DAS_SUPPORT) ) + #ifdef CORE_SUPPORT + if ( ((device_ID & AXXE600X_ID_MASK) == (AXXE600X_ID & AXXE600X_ID_MASK)) || + ((device_ID & AXXE1500X_ID_MASK) == (AXXE1500X_ID & AXXE1500X_ID_MASK)) || + ((device_ID & AXXE3000X_ID_MASK) == (AXXE3000X_ID & AXXE3000X_ID_MASK)) || + ((((device_ID & AFS600_ID_MASK) == (AFS600_ID & AFS600_ID_MASK) ) && (device_rev > 1U) )) || + ((device_ID & AFS1500_ID_MASK) == (AFS1500_ID & AFS1500_ID_MASK))) + { + dp_das_check(); + } + #endif + #endif + } + } + + return; +} +/**************************************************************************** +* Purpose: Exit programming mode. +****************************************************************************/ +void dp_exit(void) +{ + opcode = ISC_DISABLE; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + dp_delay(ISC_DISABLE_DELAY); + #ifdef NVM_SUPPORT + if ( + ((device_family & SFS_BIT) == SFS_BIT) && + (dat_support_status | (NVM0_DAT_SUPPORT_BIT | NVM1_DAT_SUPPORT_BIT | NVM2_DAT_SUPPORT_BIT | NVM3_DAT_SUPPORT_BIT)) && + ( + (Action_code == DP_PROGRAM_ACTION_CODE) || + (Action_code == DP_VERIFY_ACTION_CODE) || + (Action_code == DP_PROGRAM_NVM_ACTION_CODE) || + (Action_code == DP_VERIFY_NVM_ACTION_CODE) || + (Action_code == DP_PROGRAM_PRIVATE_CLIENTS_ACTION_CODE) || + (Action_code == DP_VERIFY_PRIVATE_CLIENTS_ACTION_CODE) || + + ( + ((device_family & SFS_BIT) == SFS_BIT) && + ((Action_code == DP_PROGRAM_ARRAY_ACTION_CODE) ||(Action_code == DP_VERIFY_ARRAY_ACTION_CODE)) + ) + ) + ) + { + dp_exit_access_nvm(); + } + #endif + + + opcode = BYPASS; + IRSCAN_out(&global_uchar1); + /* This is needed to avoid a potential glitch while exiting programming mode. */ + if (!(global_uchar1 & 0x4U)) + { + + opcode = HIGHZ; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,HIGHZ_CYCLES); + opcode = BYPASS; + IRSCAN_in(); + } + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + dp_delay(BYPASS_DELAY); + goto_jtag_state(JTAG_TEST_LOGIC_RESET,0u); + + + + return; +} +#ifdef ENABLE_DISPLAY +void dp_read_usercode_action(void) +{ + dp_read_silsig(); + return; +} +#endif + +void dp_erase_action(void) +{ + #ifdef SECURITY_SUPPORT + if (dat_support_status & SEC_DAT_SUPPORT_BIT) + { + device_security_flags |= SET_ERASE_SEC; + } + #endif + device_security_flags |= IS_ERASE_ONLY; + dp_erase(); + return; +} + +void dp_program_action(void) +{ + #ifdef CORE_SUPPORT + #ifdef CORE_ENCRYPT + if (dat_support_status & CORE_DAT_SUPPORT_BIT) + { + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + dp_enc_data_authentication(); + } + } + #endif + #endif + if (error_code == DPE_SUCCESS) + { + dp_erase(); + } + #ifdef CORE_SUPPORT + /* Array Programming */ + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & CORE_DAT_SUPPORT_BIT) + { + #ifdef CORE_ENCRYPT + /* Encryption support */ + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + dp_enc_program_array(); + if (error_code == DPE_SUCCESS) + { + bol_eol_verify = BOL; + dp_enc_verify_array(); + if (error_code == DPE_SUCCESS) + { + dp_enc_program_rlock(); + if (error_code == DPE_SUCCESS) + { + dp_is_core_configured(); + } + } + } + } + #endif + #ifdef CORE_PLAIN + /* Plain text support */ + if ((dat_support_status & CORE_DAT_ENCRYPTION_BIT) == 0U) + { + dp_program_array(); + if (error_code == DPE_SUCCESS) + { + bol_eol_verify = BOL; + dp_verify_array(); + if (error_code == DPE_SUCCESS) + { + dp_program_rlock(); + if (error_code == DPE_SUCCESS) + { + dp_is_core_configured(); + } + } + } + } + #endif + } + } + #endif + #ifdef FROM_SUPPORT + /* From Programming */ + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & FROM_DAT_SUPPORT_BIT) + { + #ifdef FROM_ENCRYPT + /* Encryption support */ + if (dat_support_status & FROM_DAT_ENCRYPTION_BIT) + { + dp_enc_program_from(); + } + #endif + /* Plain text support */ + #ifdef FROM_PLAIN + if ((dat_support_status & FROM_DAT_ENCRYPTION_BIT) == 0U) + { + dp_program_from(); + if (error_code == DPE_SUCCESS) + { + dp_verify_from(); + } + } + #endif + } + } + #endif + + #ifdef NVM_SUPPORT + if (error_code == DPE_SUCCESS) + { + if ( + ((device_family & SFS_BIT) == SFS_BIT) && + (dat_support_status | (NVM0_DAT_SUPPORT_BIT | NVM1_DAT_SUPPORT_BIT | NVM2_DAT_SUPPORT_BIT | NVM3_DAT_SUPPORT_BIT)) + ) + { + if (hardware_interface == IAP_SEL) + { + dp_initialize_access_nvm(); + } + } + + if (dat_support_status & NVM0_DAT_SUPPORT_BIT) + { + #ifdef NVM_ENCRYPT + /* Encryption support */ + if (dat_support_status & NVM0_DAT_ENCRYPTION_BIT) + { + if ( + ((device_family & SFS_BIT) == SFS_BIT) && + ( (hardware_interface == GPIO_SEL) || (enable_mss_support) ) + ) + { + dp_enc_program_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + } + if (error_code == DPE_SUCCESS) + { + dp_enc_program_nvm_block(0U); + } + } + #endif + #ifdef NVM_PLAIN + /* Plain text support */ + if ((dat_support_status & NVM0_DAT_ENCRYPTION_BIT) == 0U) + { + if ( + ((device_family & SFS_BIT) == SFS_BIT) && + ( (hardware_interface == GPIO_SEL) || (enable_mss_support) ) + ) + { + dp_program_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + } + } + if (error_code == DPE_SUCCESS) + { + dp_program_nvm_block(0U); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(0u); + } + } + } + #endif + } + } + if ((device_family & SFS_BIT) != SFS_BIT) + { + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM1_DAT_SUPPORT_BIT) + { + #ifdef NVM_ENCRYPT + /* Encryption support */ + if (dat_support_status & NVM1_DAT_ENCRYPTION_BIT) + { + dp_enc_program_nvm_block(1U); + } + #endif + #ifdef NVM_PLAIN + /* Plain text support */ + if ((dat_support_status & NVM1_DAT_ENCRYPTION_BIT) == 0U) + { + dp_program_nvm_block(1U); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(1u); + } + } + #endif + } + } + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM2_DAT_SUPPORT_BIT) + { + #ifdef NVM_ENCRYPT + /* Encryption support */ + if (dat_support_status & NVM2_DAT_ENCRYPTION_BIT) + { + dp_enc_program_nvm_block(2U); + } + #endif + #ifdef NVM_PLAIN + /* Plain text support */ + if ((dat_support_status & NVM2_DAT_ENCRYPTION_BIT) == 0U) + { + dp_program_nvm_block(2U); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(2u); + } + } + #endif + } + } + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM3_DAT_SUPPORT_BIT) + { + #ifdef NVM_ENCRYPT + /* Encryption support */ + if (dat_support_status & NVM3_DAT_ENCRYPTION_BIT) + { + dp_enc_program_nvm_block(3U); + } + #endif + #ifdef NVM_PLAIN + /* Plain text support */ + if ((dat_support_status & NVM3_DAT_ENCRYPTION_BIT) == 0U) + { + dp_program_nvm_block(3U); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(3u); + } + } + #endif + } + } + } + #endif + /* If the security is disabled, we need to perform SISLIG programming regardless of the data settings*/ + if (error_code == DPE_SUCCESS) + { + #ifdef SECURITY_SUPPORT + if (dat_support_status & SEC_DAT_SUPPORT_BIT) + { + dp_program_security(); + } + else + #endif + { + #ifdef SILSIG_SUPPORT + dp_program_silsig(); + #endif + } + } + return; +} + +void dp_verify_action(void) +{ + #ifdef CORE_SUPPORT + /* Array verification */ + if (dat_support_status & CORE_DAT_SUPPORT_BIT) + { + #ifdef CORE_ENCRYPT + /* Encryption support */ + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + bol_eol_verify = EOL; + dp_enc_verify_array(); + } + #endif + #ifdef CORE_PLAIN + /* Plain text support */ + if ((dat_support_status & CORE_DAT_ENCRYPTION_BIT) == 0U ) + { + bol_eol_verify = EOL; + dp_verify_array(); + } + #endif + if (error_code == DPE_SUCCESS) + { + dp_is_core_configured(); + } + } + #endif + #ifdef FROM_SUPPORT + /* From verification */ + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & FROM_DAT_SUPPORT_BIT) + { + /* Plain text support */ + #ifdef FROM_PLAIN + if ((dat_support_status & FROM_DAT_ENCRYPTION_BIT) == 0U) + { + dp_verify_from(); + } + #endif + } + } + #endif + #ifdef NVM_SUPPORT + #ifdef NVM_PLAIN + if (error_code == DPE_SUCCESS) + { + if (((device_family & SFS_BIT) == SFS_BIT) && (dat_support_status | NVM_DAT_VERIFY_SUPPORT_BIT)) + { + if (hardware_interface == IAP_SEL) + { + dp_initialize_access_nvm(); + } + } + } + + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM0_DAT_SUPPORT_BIT) + { + /* Plain support */ + if ((dat_support_status & NVM0_DAT_ENCRYPTION_BIT) == 0U) + { + if ( + ((device_family & SFS_BIT) == SFS_BIT) && + ( (hardware_interface == GPIO_SEL) ) + ) + { + dp_verify_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + } + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(0U); + } + } + } + } + if ((device_family & SFS_BIT) != SFS_BIT) + { + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM1_DAT_SUPPORT_BIT) + { + /* Plain support */ + if ((dat_support_status & NVM1_DAT_ENCRYPTION_BIT) == 0U) + { + dp_verify_nvm_block(1U); + } + } + } + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM2_DAT_SUPPORT_BIT) + { + /* Plain support */ + if ((dat_support_status & NVM2_DAT_ENCRYPTION_BIT) == 0U) + { + dp_verify_nvm_block(2U); + } + } + } + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM3_DAT_SUPPORT_BIT) + { + /* Plain support */ + if ((dat_support_status & NVM3_DAT_ENCRYPTION_BIT) == 0U) + { + dp_verify_nvm_block(3U); + } + } + } + } + #endif + #endif + return; +} + +#ifdef ENABLE_DISPLAY +void dp_verify_device_info_action(void) +{ + + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nVerifying device info..."); + #endif + + global_uchar1 = 0U; + /* This is to determine if there is a valid kdata in the data file. + In the case of Dual key plain programming, the encryption status bits are set + in the DirectC code to use the encryption functions. In this case, kdata + verification is called although it does not exit. */ + for (global_uint1 = 0U;global_uint1 < 16U; global_uint1++) + { + global_uchar1 |= (DPUCHAR) dp_get_bytes(KDATA_ID,(DPULONG)global_uint1,1U); + if (return_bytes == 0u) + { + break; + } + } + if (return_bytes && (global_uchar1 != 0U)) + { + dp_verify_enc_key(); + } + + if (error_code == DPE_SUCCESS) + { + /* Checking security bit settings against what is in the Data file */ + if (device_family & (AFS_BIT | SFS_BIT)) + { + global_ulong1 = dp_get_bytes(ULOCK_ID,0u,3u); + } + else + { + global_ulong1 = dp_get_bytes(ULOCK_ID,0u,2u); + global_ulong1 <<= 12u; + } + if (global_ulong1) + { + global_ulong1 |= ULFLR; + } + if ((device_security_flags & 0x003FFFFFu) != (global_ulong1 & 0x003FFFFFu)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser LOCK Setting Error...Security"); + #endif + error_code = DPE_USER_LOCK_SETTING_ERROR; + } + + if (error_code == DPE_SUCCESS) + { + dp_read_urow(); + #ifdef ENABLE_IAP_SUPPORT + if (hardware_interface == IAP_SEL) + { + read_urow_nvm(); + } + #endif + /* Checksum verification -- Bit 112 - 127 */ + #ifdef ENABLE_GPIO_SUPPORT + if (hardware_interface == GPIO_SEL) + { + global_uint1 = (DPUINT)global_buf2[14] | ((DPUINT)global_buf2[15] << 8u); + } + #endif + #ifdef ENABLE_IAP_SUPPORT + if (hardware_interface == IAP_SEL) + { + global_uint1 = (DPUINT)actual_iap_urow[14] | ((DPUINT)actual_iap_urow[15] << 8u); + } + #endif + + global_ulong1 = (DPULONG) dp_get_bytes(CHECKSUM_ID, 0u, 2u); + + if ((global_ulong1 & 0xFFFFu) != global_uint1) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUROW Setting Error...Checksum"); + #endif + error_code = DPE_UROW_SETTING_ERROR; + } + if (error_code == DPE_SUCCESS) + { + /* Design Name verification - Bits 32 to 101*/ + for (global_uint1=4u; global_uint1 < 13u; global_uint1++) + { + global_uchar1 = (DPUCHAR) dp_get_bytes(ACT_UROW_DESIGN_NAME_ID,global_uint1 - 4u, 1u); + if (global_uint1 == 12u) + { + global_buf2[global_uint1] &= 0x3Fu; + #ifdef ENABLE_IAP_SUPPORT + if (hardware_interface == IAP_SEL) + { + actual_iap_urow[global_uint1] &= 0x3Fu; + } + #endif + } + #ifdef ENABLE_GPIO_SUPPORT + if (hardware_interface == GPIO_SEL) + { + if (global_uchar1 != global_buf2[global_uint1]) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUROW Setting Error...Design"); + #endif + error_code = DPE_UROW_SETTING_ERROR; + break; + } + } + #endif + #ifdef ENABLE_IAP_SUPPORT + if (hardware_interface == IAP_SEL) + { + if (global_uchar1 != actual_iap_urow[global_uint1]) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUROW Setting Error..."); + #endif + error_code = DPE_UROW_SETTING_ERROR; + break; + } + } + #endif + } + } + } + } + + return; +} + +#endif +void dp_erase(void) +{ + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nErasing. Please wait..."); + #endif + + #ifdef CORE_SUPPORT + if (dat_support_status & CORE_DAT_SUPPORT_BIT) + { + #ifdef CORE_PLAIN + if ((dat_support_status & CORE_DAT_ENCRYPTION_BIT) == 0u) + { + dp_disable_rlock(); + } + #endif + #ifdef CORE_ENCRYPT + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + dp_enc_disable_rlock(); + } + #endif + } + #endif + + + dp_flush_global_buf1(); + global_buf1[0] = UROW_ERASE_BITS_BYTE0; + global_buf1[1] = UROW_ERASE_BITS_BYTE1; + global_buf1[2] = UROW_ERASE_BITS_BYTE2; + + #ifdef CORE_SUPPORT + if (dat_support_status & CORE_DAT_SUPPORT_BIT) + { + global_buf1[0] |= CORE_ERASE_BITS_BYTE0; + global_buf1[1] |= CORE_ERASE_BITS_BYTE1; + global_buf1[2] |= CORE_ERASE_BITS_BYTE2; + } + #endif + /* This is for FROM erase. Need to get which bits are set to erase from the data file. */ + #ifdef FROM_SUPPORT + if (dat_support_status & FROM_DAT_SUPPORT_BIT) + { + + global_uchar1 = (DPUCHAR) dp_get_bytes(FRomAddressMask_ID,0U,1U); + if (global_uchar1 & 0x1U) + { + global_buf1[1]|=0x80U; + } + global_buf1[2] |= (DPUCHAR)(global_uchar1 >> 1U); + } + #endif + #ifdef SECURITY_SUPPORT + /* This is for security erase */ + if (dat_support_status & SEC_DAT_SUPPORT_BIT) + { + global_buf1[0] |= 0xeU; + } + #endif + if (error_code == DPE_SUCCESS) + { + dp_exe_erase(); + } + + + return; +} + +void dp_exe_erase(void) +{ + /* This is to identify if urow (bit 14 in the ISC_Sector register) is set */ + dp_read_urow(); + #ifdef ENABLE_IAP_SUPPORT + if (hardware_interface == IAP_SEL) + { + read_urow_nvm(); + /* Do not erase UROW. Bit 14 */ + global_buf1[1u] &= 0xbfu; + } + #endif + + opcode = ISC_ERASE; + IRSCAN_in(); + DRSCAN_in(0u, 23u, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_ERASE_CYCLES); + dp_poll_erase(); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed Erase Operation"); + #endif + error_code = DPE_ERASE_ERROR; + } + if (error_code == DPE_SUCCESS) + { + if (Action_code == DP_ERASE_FROM_ACTION_CODE) + { + dp_disturb_from(); + } + #ifdef FROM_SUPPORT + if ( (Action_code == DP_ERASE_ACTION_CODE) && + (dat_support_status & FROM_DAT_SUPPORT_BIT) ) + { + dp_disturb_from(); + } + #endif + } + + if (error_code == DPE_SUCCESS) + { + #ifdef ENABLE_GPIO_SUPPORT + if (hardware_interface == GPIO_SEL) + { + dp_program_urow(); + } + #endif + + #ifdef ENABLE_IAP_SUPPORT + if (hardware_interface == IAP_SEL) + { + program_urow_nvm(); + } + #endif + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed UROW programming"); + #endif + } + } + + return; +} +/**************************************************************************** +* Purpose: Used by the dp_exe_erase function. +****************************************************************************/ +void dp_poll_erase(void) +{ + + /* Check for erase status */ + opcode = ISC_NOOP; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + for ( global_ulong1 = 0U; global_ulong1 <= MAX_ERASE_POLL; global_ulong1++ ) + { + dp_delay(ERASE_POLL_DELAY); + /* check for ROWBUSY and COLBUSY */ + DRSCAN_out(5u, (DPUCHAR*)DPNULL, &global_uchar1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + + if ((global_uchar1 & 0x3U) == 0U) + { + break; + } + } + if(global_ulong1 > MAX_ERASE_POLL) + { + error_code = DPE_ERASE_ERROR; + } + + + return; +} +/**************************************************************************** +* Purpose: This function is used during programming and verification. +****************************************************************************/ +void dp_poll_device(void) +{ + + /* Check for program status */ + opcode = ISC_NOOP; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + for ( global_ulong1 = 0U; global_ulong1 <= MAX_PROGRAM_POLL; global_ulong1++ ) + { + dp_delay(POLL_DELAY); + /* check for ROWBUSY, COLBUSY and and MAC fail */ + DRSCAN_out(5u, (DPUCHAR*)DPNULL, &global_uchar1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + + if ((global_uchar1 & 0xbU) == 0U) + { + break; + } + } + if(global_ulong1 > MAX_PROGRAM_POLL) + { + error_code = DPE_POLL_ERROR; + } + + + return; +} + + + +/********************************************************************************************************************/ +/* Debug enable functions only */ +/********************************************************************************************************************/ +#ifdef ENABLE_DISPLAY +void dp_device_info_action(void) +{ + dp_read_silsig(); + dp_read_urow(); + dp_display_urow(); + #ifdef ENABLE_IAP_SUPPORT + if (hardware_interface == IAP_SEL) + { + read_urow_nvm(); + dp_display_urow_nvm(); + } + #endif + + + dp_is_core_configured(); + if (!((device_security_flags & ULUFJ) && ((dat_support_status & SEC_DAT_SUPPORT_BIT) == 0u ))) + { + dp_read_from(); + } + + global_uchar1 = 0u; + dp_read_factory_row(); + /* Needed to do this to avoid Misra-C compliance issues */ + for(global_uchar1 = 0u; global_uchar1 < 7u; global_uchar1++) + { + global_buf1[global_uchar1] = global_buf1[global_uchar1+1u]; + } + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFSN: "); + dp_display_array(global_buf1, 6u ,HEX); + #endif + + + dp_output_security(); + + return; +} + +void dp_read_silsig(void) +{ + + opcode = USERCODE; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,USERCODE_CYCLES); + DRSCAN_out(SILSIG_BIT_LENGTH, (DPUCHAR*)DPNULL, global_buf1); + global_ulong1 = (DPULONG)global_buf1[0] | ((DPULONG)global_buf1[1] << 8) | ((DPULONG)global_buf1[2] << 16) | ((DPULONG)global_buf1[3] << 24); + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nExpected SILSIG: "); + dp_display_value(global_ulong1,HEX); + #endif + + + return; +} + +void dp_display_urow(void) +{ + DPUCHAR algo_version; + DPUCHAR programmer; + DPUCHAR programming_method; + DPUCHAR software_version; + + algo_version = (DPUCHAR)(global_buf2[3] >> 1u) & 0xfu; + if ((global_buf2[0] & 0x1u) != (global_buf2[0] & 0x20u) >> 5u) + { + algo_version |= ((DPUCHAR)(global_buf2[2] >> 7u ) & 0x1u) << 4u; + algo_version |= (global_buf2[3] & 0x1u) << 5u; + algo_version |= ((DPUCHAR)(global_buf2[0] >> 5u) & 0x1u) << 6u; + } + programming_method = (DPUCHAR)(global_buf2[3] >> 5u) & 0x7u; + programmer = ((DPUCHAR)(global_buf2[0] >> 6u) & 0x3u) | (DPUCHAR)((DPUCHAR)(global_buf2[1] & 0x3u) << 0x2u); + software_version = ((DPUCHAR)(global_buf2[1] >> 2u)) | ((DPUCHAR)((DPUCHAR)(global_buf2[2] & 0x1u) << 6u)); + + dp_display_text("\r\nUser information: "); + dp_display_text("\r\nCYCLE COUNT: "); + dp_display_value(cycle_count,DEC); + dp_display_text("\r\nCHECKSUM = "); + dp_display_array(&global_buf2[14],2u, HEX); + dp_display_text("\r\nDesign Name = "); + dp_display_array(&global_buf2[4],9u, HEX); + + dp_display_text("\r\nProgramming Method: "); + switch(programming_method) + { + case IEEE1532_PM: + dp_display_text("IEEE1532"); + break; + case STAPL_PM: + dp_display_text("STAPL"); + break; + case DIRECTC_PM: + dp_display_text("DIRECTC"); + break; + case PDB_PM: + dp_display_text("PDB"); + break; + case SVF_PM: + dp_display_text("SVF"); + break; + case IAP_PM: + dp_display_text("IAP"); + break; + default: + dp_display_text("Unknown"); + break; + }; + dp_display_text("\r\nAlgorithm Version: = "); + dp_display_value((DPULONG)algo_version, DEC); + dp_display_text("\r\nProgrammer: = "); + dp_display_value((DPULONG)algo_version, DEC); + + dp_display_text("\r\nProgrammer: "); + switch(programmer) + { + case FP: + dp_display_text("Flash Pro"); + break; + case FPLITE: + dp_display_text("Flash Pro Lite"); + break; + case FP3: + dp_display_text("FP3"); + break; + case SCULPTW: + dp_display_text("Sculptor"); + break; + case BPW: + dp_display_text("BP Programmer"); + break; + case DIRECTCP: + dp_display_text("DirectC"); + break; + case STP: + dp_display_text("STAPL"); + break; + case FP4: + dp_display_text("FP4"); + break; + default: + dp_display_text("Unknown"); + break; + }; + + dp_display_text("\r\nSoftware Version = "); + dp_display_value((DPULONG)software_version, DEC); + + dp_display_text("\r\n=================================================="); + return; +} + +void dp_output_security(void) +{ + dp_display_text("\r\nSecurity Setting : "); + + if (device_security_flags & ULUFP) + { + dp_display_text("\r\nFlashROM Write/Erase protected by pass key."); + } + if (device_security_flags & ULUFJ) + { + dp_display_text("\r\nFlashROM Read protected by pass key."); + } + if (device_security_flags & ULAWE) + { + dp_display_text("\r\nArray Write/Erase protected by pass key."); + } + if (device_security_flags & ULARD) + { + dp_display_text("\r\nArray Verify protected by pass key."); + } + if (device_security_flags & ULUFE) + { + dp_display_text("\r\nEncrypted FlashROM Programming Enabled."); + } + if (device_security_flags & ULARE) + { + dp_display_text("\r\nEncrypted FPGA Array Programming Enabled."); + } + if (device_family & (AFS_BIT | SFS_BIT)) + { + if (device_security_flags & ULNW0) + { + dp_display_text("\r\nNVM block 0 Write protected by pass key."); + } + if (device_security_flags & ULNR0) + { + dp_display_text("\r\nNVM block 0 Read protected by pass key."); + } + if (device_security_flags & ULNW1) + { + dp_display_text("\r\nNVM block 1 Write protected by pass key."); + } + if (device_security_flags & ULNR1) + { + dp_display_text("\r\nNVM block 1 Read protected by pass key."); + } + if (device_security_flags & ULNC0) + { + dp_display_text("\r\nEncrypted NVM block 0 Programming Enabled."); + } + if (device_security_flags & ULNC1) + { + dp_display_text("\r\nEncrypted NVM block 1 Programming Enabled."); + } + } + + dp_display_text("\r\n=================================================="); + return; +} +#endif +/********************************************************************************************************************/ + + +void dp_read_urow(void) +{ + /* read UROW */ + dp_vnr(); + + + opcode = ISC_READ_UROW; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_READ_UROW_CYCLES); + dp_delay(ISC_READ_UROW_DELAY); + DRSCAN_out(UROW_BIT_LENGTH, (DPUCHAR*)DPNULL, global_buf2); + + cycle_count = ((DPUINT)global_buf2[12] >> 6U) | ((DPUINT)global_buf2[13] << 2U); + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUSER_UROW = "); + dp_display_array(global_buf2,16u, HEX); + #endif + + + return; +} + +void dp_program_urow(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProgramming UROW..."); + #endif + + if (((device_security_flags & IS_ERASE_ONLY) == 0U) && (global_buf1[0] & CORE_ERASE_BITS_BYTE0) ) + { + #ifdef CORE_SUPPORT + if (cycle_count < 1023U) + { + cycle_count++; + } + else + { + } + #endif + } + + + + if ((device_security_flags & PERM_LOCK_BIT) && (device_security_flags & ULAWE)) + { + device_security_flags |= IS_RESTORE_DESIGN; + } + if (((device_security_flags & IS_ERASE_ONLY)) && ((device_security_flags & IS_RESTORE_DESIGN) == 0U)) + { + dp_flush_global_buf2(); + global_buf2[12] |= ((DPUCHAR) (cycle_count << 6)); + global_buf2[13] = (DPUCHAR) (cycle_count >> 2); + } + else + { + /* Constucting the UROW data */ + if ((device_security_flags & IS_RESTORE_DESIGN) == 0U) + { + if (global_buf1[0] & CORE_ERASE_BITS_BYTE0) + { + for (global_uchar1=0U; global_uchar1 < 2U; global_uchar1++) + { + global_buf2[global_uchar1+14U] = (DPUCHAR) dp_get_bytes(CHECKSUM_ID,global_uchar1,1U); + } + + for (global_uchar1=0U; global_uchar1 < 9U; global_uchar1++) + { + global_buf2[global_uchar1 + 4U] = (DPUCHAR) dp_get_bytes(ACT_UROW_DESIGN_NAME_ID,global_uchar1,1U); + } + } + global_buf2[12] |= ((DPUCHAR) (cycle_count << 6)); + global_buf2[13] = (DPUCHAR) (cycle_count >> 2); + global_buf2[3] |= (GPIO_PROGRAMMING_METHOD << 5) & 0xff; + global_buf2[3] |= ((ALGO_VERSION & 0xfu) << 1u) & 0xff; + if (ALGO_VERSION & 0x40u) + { + global_buf2[0] |= 0x20u; + } + else + { + global_buf2[0] |= 0x1u; + } + global_buf2[2] |= (((ALGO_VERSION >> 4u) & 1u) << 7u) & 0xff; + global_buf2[3] |= (((ALGO_VERSION >> 5u) & 1u)) & 0xff; + global_buf2[0] |= (DC_PROGRAMMING_SW << 6u) & 0xff; + global_buf2[1] |= ((DC_PROGRAMMING_SW >> 2u) & 0x3u) & 0xff; + global_buf2[1] |= (DC_SOFTWARE_VERSION << 2u) & 0xff; + global_buf2[2] |= ((DC_SOFTWARE_VERSION >> 6u) & 0x1u) & 0xff; + } + } + + opcode = ISC_PROGRAM_UROW; + IRSCAN_in(); + DRSCAN_in(0u,UROW_BIT_LENGTH,global_buf2); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_UROW_CYCLES); + + dp_poll_device(); + if (error_code != DPE_SUCCESS) + { + error_code = DPE_PROGRAM_UROW_ERROR; + } + + if (error_code == DPE_SUCCESS) + { + dp_vnr(); + + /* readback and verify UROW */ + opcode = ISC_READ_UROW; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_READ_UROW_CYCLES); + dp_delay(ISC_READ_UROW_DELAY); + + DRSCAN_out(UROW_BIT_LENGTH,(DPUCHAR*)DPNULL,global_buf1); + + + for ( global_uchar1 = 0U; global_uchar1 < 16U; global_uchar1++ ) + { + if (global_buf1[global_uchar1] != global_buf2[global_uchar1]) + { + error_code = DPE_PROGRAM_UROW_ERROR; + break; + } + } + + } + + return; +} + +void dp_init_aes(void) +{ + opcode = AES_INIT; + IRSCAN_in(); + DRSCAN_in(0u, AES_BIT_LENGTH, (DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,AES_INIT_CYCLES); + dp_delay(AES_INIT_DELAY); + return; +} + +void dp_set_aes_mode(void) +{ + opcode = AES_MODE; + IRSCAN_in(); + DRSCAN_in(0u, AES_MODE_BIT_LENGTH, &global_uchar1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,AES_MODE_CYCLES); + return; + +} +/************************************************************************************************************************************/ +/* --- If data is encrypted for a given block, the device must also be encrytpted for that block */ +/* --- If a device block is encrypted, the data must either be encrypted or a VALID key must be present */ +/* It is enough to check if the match result is valid if the data is not encrypted. */ +/************************************************************************************************************************************/ +#ifndef ENABLE_CODE_SPACE_OPTIMIZATION +void dp_check_security_settings(void) +{ + /* Plain text vs encryption check */ + if ( (Action_code == DP_ERASE_ACTION_CODE) || (Action_code == DP_PROGRAM_ACTION_CODE) || + (Action_code == DP_VERIFY_ACTION_CODE) || (Action_code == DP_ERASE_ARRAY_ACTION_CODE) || (Action_code == DP_PROGRAM_ARRAY_ACTION_CODE) || + (Action_code == DP_VERIFY_ARRAY_ACTION_CODE) || (Action_code == DP_ENC_DATA_AUTHENTICATION_ACTION_CODE) ) + { + if (dat_support_status & CORE_DAT_SUPPORT_BIT) + { + /* Data is encrypted */ + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + /* Device must be encrypted */ + if ((device_security_flags & ULARE) == 0U) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFPGA Array Encryption is enforced. Plain text programming and verification is prohibited."); + #endif + error_code = DPE_CORE_ENC_ERROR; + } + } + /* Data is plain text */ + else + { + /* Device must not be encrytped or a valid key must be present */ + if ((device_security_flags & ULARE) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFPGA Array Encryption is not enforced."); + dp_display_text("\r\nCannot gaurantee valid AES key present in target device."); + dp_display_text("\r\nUnable to proceed with Encrypted FPGA Array operation."); + #endif + error_code = DPE_CORE_PLAIN_ERROR; + } + if (error_code == DPE_SUCCESS) + { + if ((device_security_flags & ULARD) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFPGA Array Verification is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_CORE_PLAIN_ERROR; + } + } + if (error_code == DPE_SUCCESS) + { + if ( (Action_code == DP_ERASE_ACTION_CODE) || (Action_code == DP_PROGRAM_ACTION_CODE) || + (Action_code == DP_ERASE_ARRAY_ACTION_CODE) || (Action_code == DP_PROGRAM_ARRAY_ACTION_CODE) || + (Action_code == DP_ENC_DATA_AUTHENTICATION_ACTION_CODE) ) + { + /* If device is keyed, the security match must pass */ + if ((device_security_flags & ULAWE) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFPGA Array Write/Erase is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_CORE_PLAIN_ERROR; + } + } + } + } + } + } + if (error_code == DPE_SUCCESS) + { + if ( (Action_code == DP_ERASE_ACTION_CODE) || (Action_code == DP_PROGRAM_ACTION_CODE) || + (Action_code == DP_VERIFY_ACTION_CODE) || (Action_code == DP_ERASE_FROM_ACTION_CODE) || (Action_code == DP_PROGRAM_FROM_ACTION_CODE) || + (Action_code == DP_VERIFY_FROM_ACTION_CODE) ) + { + if (dat_support_status & FROM_DAT_SUPPORT_BIT) + { + /* Data is encrypted */ + if (dat_support_status & FROM_DAT_ENCRYPTION_BIT) + { + /* Device must be encrypted */ + if ((device_security_flags & ULUFE) == 0U) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFlashROM Encryption is enforced. Plain text programming and verification is prohibited."); + #endif + error_code = DPE_FROM_ENC_ERROR; + } + } + /* Data is plain text */ + else + { + /* Device must not be encrytped or a valid key must be present */ + if ((device_security_flags & ULUFE) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFlashROM Encryption is not enforced."); + dp_display_text("\r\nCannot gaurantee valid AES key present in target device."); + dp_display_text("\r\nUnable to proceed with Encrypted FlashROM programming."); + #endif + error_code = DPE_FROM_PLAIN_ERROR; + } + if (error_code == DPE_SUCCESS) + { + if ((device_security_flags & ULUFJ) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFROM Verification is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_CORE_PLAIN_ERROR; + } + } + if (error_code == DPE_SUCCESS) + { + if ( (Action_code == DP_ERASE_ACTION_CODE) || (Action_code == DP_PROGRAM_ACTION_CODE) || + (Action_code == DP_ERASE_FROM_ACTION_CODE) || (Action_code == DP_PROGRAM_FROM_ACTION_CODE)) + { + /* If device is keyed, the security match must pass */ + if ((device_security_flags & ULUFP) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFROM Write/Erase is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_CORE_PLAIN_ERROR; + } + } + } + } + } + } + } + if (error_code == DPE_SUCCESS) + { + if ( (Action_code == DP_PROGRAM_ACTION_CODE) || (Action_code == DP_VERIFY_ACTION_CODE) || + (Action_code == DP_PROGRAM_NVM_ACTION_CODE) || (Action_code == DP_VERIFY_NVM_ACTION_CODE) || + (Action_code == DP_PROGRAM_PRIVATE_CLIENTS_ACTION_CODE) || (Action_code == DP_VERIFY_PRIVATE_CLIENTS_ACTION_CODE) + ) + { + if (dat_support_status & NVM0_DAT_SUPPORT_BIT) + { + /* Data is encrypted */ + if (dat_support_status & NVM0_DAT_ENCRYPTION_BIT) + { + /* Device must be encrypted */ + if ((device_security_flags & ULNC0) == 0U) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 0 Encryption is enforced. Plain text programming is prohibited."); + #endif + error_code = DPE_NVM0_ENC_ERROR; + } + } + /* Data is plain text */ + else + { + /* Device must not be encrytped or a valid key must be present */ + if ((device_security_flags & ULNC0) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 0 Encryption is not enforced."); + dp_display_text("\r\nCannot gaurantee valid AES key present in target device."); + dp_display_text("\r\nUnable to proceed with Encrypted NVM programming."); + #endif + error_code = DPE_NVM0_PLAIN_ERROR; + } + if (error_code == DPE_SUCCESS) + { + if ((device_security_flags & ULNR0) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 0 Read is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_NVM0_PLAIN_ERROR; + } + } + if (error_code == DPE_SUCCESS) + { + if ( (Action_code == DP_PROGRAM_ACTION_CODE) || (Action_code == DP_PROGRAM_NVM_ACTION_CODE) || (Action_code == DP_PROGRAM_PRIVATE_CLIENTS_ACTION_CODE)) + { + /* If device is keyed, the security match must pass */ + if ((device_security_flags & ULNW0) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 0 write is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_NVM0_PLAIN_ERROR; + } + } + } + } + } + } + } + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM1_DAT_SUPPORT_BIT) + { + /* Data is encrypted */ + if (dat_support_status & NVM1_DAT_ENCRYPTION_BIT) + { + /* Device must be encrypted */ + if ((device_security_flags & ULNC1) == 0U) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 1 Encryption is enforced. Plain text programming is prohibited."); + #endif + + error_code = DPE_NVM1_ENC_ERROR; + } + } + /* Data is plain text */ + else + { + /* Device must not be encrytped or a valid key must be present */ + if ((device_security_flags & ULNC1) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 1 Encryption is not enforced."); + dp_display_text("\r\nCannot gaurantee valid AES key present in target device."); + dp_display_text("\r\nUnable to proceed with Encrypted NVM programming."); + #endif + error_code = DPE_NVM1_PLAIN_ERROR; + } + if (error_code == DPE_SUCCESS) + { + if ((device_security_flags & ULNR1) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 1 Read is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_NVM1_PLAIN_ERROR; + } + } + if (error_code == DPE_SUCCESS) + { + if ( (Action_code == DP_PROGRAM_ACTION_CODE) || (Action_code == DP_PROGRAM_NVM_ACTION_CODE)) + { + /* If device is keyed, the security match must pass */ + if ((device_security_flags & ULNW1) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 1 write is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_NVM1_PLAIN_ERROR; + } + } + } + } + } + } + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM2_DAT_SUPPORT_BIT) + { + /* Data is encrypted */ + if (dat_support_status & NVM2_DAT_ENCRYPTION_BIT) + { + if ((device_security_flags & ULNC2) == 0U) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 2 Encryption is enforced. Plain text programming is prohibited."); + #endif + error_code = DPE_NVM2_ENC_ERROR; + } + } + /* Data is plain text */ + else + { + /* Device must not be encrytped or a valid key must be present */ + if ((device_security_flags & ULNC2) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 2 Encryption is not enforced."); + dp_display_text("\r\nCannot gaurantee valid AES key present in target device."); + dp_display_text("\r\nUnable to proceed with Encrypted NVM programming."); + #endif + error_code = DPE_NVM2_PLAIN_ERROR; + } + if (error_code == DPE_SUCCESS) + { + if ((device_security_flags & ULNR2) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 2 Read is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_NVM2_PLAIN_ERROR; + } + } + if (error_code == DPE_SUCCESS) + { + if ( (Action_code == DP_PROGRAM_ACTION_CODE) || (Action_code == DP_PROGRAM_NVM_ACTION_CODE)) + { + /* If device is keyed, the security match must pass */ + if ((device_security_flags & ULNW2) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 2 write is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_NVM2_PLAIN_ERROR; + } + } + } + } + } + } + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM3_DAT_SUPPORT_BIT) + { + /* Data is encrypted */ + if (dat_support_status & NVM3_DAT_ENCRYPTION_BIT) + { + /* Device must be encrypted */ + if ((device_security_flags & ULNC3) == 0U) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 3 Encryption is enforced. Plain text programming is prohibited."); + #endif + error_code = DPE_NVM3_ENC_ERROR; + } + } + /* Data is plain text */ + else + { + /* Device must not be encrytped or a valid key must be present */ + if ((device_security_flags & ULNC3) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 3 Encryption is not enforced."); + dp_display_text("\r\nCannot gaurantee valid AES key present in target device."); + dp_display_text("\r\nUnable to proceed with Encrypted NVM programming."); + #endif + error_code = DPE_NVM3_PLAIN_ERROR; + } + if (error_code == DPE_SUCCESS) + { + if ((device_security_flags & ULNR3) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 3 Read is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_NVM3_PLAIN_ERROR; + } + } + if (error_code == DPE_SUCCESS) + { + if ( (Action_code == DP_PROGRAM_ACTION_CODE) || (Action_code == DP_PROGRAM_NVM_ACTION_CODE)) + { + /* If device is keyed, the security match must pass */ + if ((device_security_flags & ULNW3) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nNVM block 3 Write is protected by pass key."); + dp_display_text("\r\nA valid pass key needs to be provided."); + #endif + error_code = DPE_NVM3_PLAIN_ERROR; + } + } + } + } + } + } + /* Plain text vs encryption check */ + if (error_code == DPE_SUCCESS) + { + if ( (Action_code == DP_ERASE_SECURITY_ACTION_CODE) || (Action_code == DP_PROGRAM_SECURITY_ACTION_CODE) ) + { + if (dat_support_status & SEC_DAT_SUPPORT_BIT) + { + /* Device must be encrypted */ + if ((device_security_flags & ULUPC) && ((device_security_flags & SEC_KEY_OK) == 0U)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError, pass key match failure."); + #endif + error_code = DPE_MATCH_ERROR; + } + } + } + } + return; +} +#else +void dp_check_security_settings(void) +{ + DPUCHAR dev_enc_status = 0u; + DPUCHAR dat_enc_status = 0u; + + + /* global_ulong1 is used as a mask to check if any of the device blocks are protected + with a passkey but the data file has no pass key to match */ + global_ulong1 = 0u; + /* global_uchar1 is used to mask out checking security settings of blocks that are not + supported in the data file */ + global_uchar1 = (DPUCHAR) ((dat_support_status & 0x3u) | ((dat_support_status >> 1) & 0x3cu)); + + /* Get the block encryption settings from the data file. */ + dat_enc_status = (DPUCHAR) (dat_support_status >> 10); + /* Line up the device security bit settings to match the order of the dat file */ + #ifdef CORE_SUPPORT + dev_enc_status |= (DPUCHAR) ((device_security_flags & ULARE) >> 20); + /* Find out if the array is protected by a pass key */ + if (!((global_uchar1 & 0x1u) && (dev_enc_status & 0x1u))) + { + global_ulong1 |= ULARD | ULAWE; + } + #else + /* If the code of a certain block is disabled, the corresponding security bits are ignored */ + dat_enc_status &= 0xFEu; + #endif + #ifdef FROM_SUPPORT + /* Line up the device security bit settings to match the order of the dat file */ + dev_enc_status |= (DPUCHAR) ((device_security_flags & ULUFE) >> 17); + /* Find out if FORM is protected by a pass key */ + if ( !((global_uchar1 & 0x2u) && (dev_enc_status & 0x2u) )) + { + global_ulong1 |= ULUFJ | ULUFP; + } + #else + /* If the code of a certain block is disabled, the corresponding security bits are ignored */ + dat_enc_status &= 0xFD; + #endif + #ifdef NVM_SUPPORT + /* Line up the device security bit settings to match the order of the dat file */ + dev_enc_status |= (DPUCHAR) ((device_security_flags & ULNC0) | + ((device_security_flags & ULNC1) >> 2) | + ((device_security_flags & ULNC2) >> 4) | + ((device_security_flags & ULNC3) >> 6)); + /* Find out if any of the NVM blocks are protected by a pass key */ + if (!((global_uchar1 & 0x3Cu) && (dev_enc_status & 0x3Cu))) + { + global_ulong1 |= ULNR0 | ULNW0 | ULNR1 | ULNW1 | ULNR2 | ULNW2 | ULNR3 | ULNW3; + } + #else + /* If the code of a certain block is disabled, the corresponding security bits are ignored */ + dat_enc_status &= 0xC3; + #endif + + + /* If the pass key does not exist in the data file, then there are three possiblities: + 1. Data file is compiled for plain text with no security programming. + 2. Data file is encrypted for all the supported blobks. + 3. Data file is compiled for a cobmbination of both options 1 and 2. + + For case # 1 and 3, the test should fail if there is a mismatch with the encryption bit settings. + For case # 2 and 3, the test should fail if the any of the blocks are protected by a pass key and + those blocks are not encrypted. + + */ + dp_get_bytes(UKEY_ID,0u,1u); + if (return_bytes == 0u) + { + /* This test is to check for a mismatch with the encryption bit settings */ + if ( ((dev_enc_status & global_uchar1) != (dat_enc_status & global_uchar1)) || + /* If the data is not encrypted, we will need to fail if any of the blocks are protected. */ + /* dat_status & global status is a check to make sure that the file is not encrypted. + This check is only valid for plain text files. */ + (device_security_flags & global_ulong1) ) + { + + error_code = DPE_SECURITY_BIT_MISMATCH; + } + } + /* If the pass key exists in the data file, then check the match result */ + else if (dev_enc_status) + { + if ((device_security_flags & SEC_KEY_OK) == 0u) + { + error_code = DPE_MATCH_ERROR; + } + } + else + { + } + + return; +} +#endif + + +void dp_get_dat_dual_key_flag(void) +{ + + global_uchar1 = (DPUCHAR) dp_get_bytes(Header_ID,DUAL_KEY_SUPPORT_OFFSET,1U); + if ( global_uchar1 ) + { + device_family |= DUAL_KEY_BIT; + + /* setting the AES mode */ + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + AES_mode_value = 2U; + } + else + { + AES_mode_value = 1U; + } + dat_support_status |= CORE_DAT_ENCRYPTION_BIT; + } + + + return; +} +void dp_read_factory_row(void) +{ + dp_vnr(); + + opcode = FACTORY_ADDRESS_SHIFT; + IRSCAN_in(); + DRSCAN_in(0u, 3u, &global_uchar1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,FACTORY_ADDRESS_SHIFT_CYCLES); + + opcode = READ_FACTORY; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,READ_FACTORY_CYCLES); + dp_delay(READ_FACTORY_DELAY); + + DRSCAN_out(FACTORY_ROW_BIT_LENGTH, (DPUCHAR*)DPNULL, global_buf1); + + return; +} + +void dp_is_core_configured(void) +{ + + opcode = BYPASS; + IRSCAN_out(&global_uchar1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + /* This is needed to avoid a potential glitch while exiting programming mode. */ + if (!(global_uchar1 & 0x4U)) + { + + if ((Action_code == DP_PROGRAM_ACTION_CODE) || (Action_code == DP_PROGRAM_ARRAY_ACTION_CODE) || + (Action_code == DP_VERIFY_ACTION_CODE) || (Action_code == DP_VERIFY_ARRAY_ACTION_CODE)) + { + error_code = DPE_PROGRAM_RLOCK_ERROR; + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: Failed to enable FPGA array."); + #endif + } + #ifdef ENABLE_DISPLAY + else + { + dp_display_text("\r\nFPGA array is not enabled."); + } + #endif + } + #ifdef ENABLE_DISPLAY + else + { + dp_display_text("\r\nFPGA array is programmed and enabled."); + } + #endif + + + return; +} +/**************************************************************************** +* Purpose: To detect if discrete address shifting is required if applicable. +****************************************************************************/ +#if ( (!defined ENABLE_CODE_SPACE_OPTIMIZATION) || (defined ENABLE_DAS_SUPPORT) ) +void dp_das_check(void) +{ + #ifdef ENABLE_DAS_SUPPORT + if (((device_ID & AXXE1500X_ID_MASK) == (AXXE1500X_ID & AXXE1500X_ID_MASK)) && ((device_ID & AXXE1500X_ID_MASK) == (DataIndex & AXXE1500X_ID_MASK))) + { + if ((global_buf1[6] & 0x70U) == 0x0U) + { + device_family |= DAS_BIT; + } + } + #endif + + return; +} +#endif + +/* This function maybe needed for eNVM encypted programming */ +#if ((defined CORE_ENCRYPT) | (defined NVM_ENCRYPT)) +void dp_exe_authentication(void) +{ + + opcode = ISC_NOOP; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_NOOP_CYCLES); + dp_delay(ISC_NOOP_DELAY); + DRSCAN_out(5u, (DPUCHAR*)DPNULL, &global_uchar1); + + if (global_uchar1 & 0x8u) + { + error_code = DPE_AUTHENTICATION_FAILURE; + #if defined (ENABLE_DISPLAY) + dp_display_text("\r\nFailed to authenticate the encrypted data.\r\n"); + #endif + } + + return; +} +#endif + +void dp_verify_enc_key(void) +{ + + if (device_family & DUAL_KEY_BIT) + { + global_uchar1 = 0u; + dp_set_aes_mode(); + } + dp_init_aes(); + opcode = ISC_VERIFY_DMK; + IRSCAN_in(); + dp_get_and_DRSCAN_in(KDATA_ID, DMK_BIT_LENGTH, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_VERIFY_DMK_CYCLES); + dp_delay(ISC_VERIFY_DMK_DELAY); + + DRSCAN_out(DMK_BIT_LENGTH, (DPUCHAR*)DPNULL, global_buf1); + + if ((global_buf1[15] & 0xC0u) != 0xC0u) + { + error_code = DPE_DMK_VERIFY_ERROR; + } + + return; +} + +#endif /* End of ENABLE_G3_SUPPORT */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpG3alg.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpG3alg.h new file mode 100644 index 0000000..1721b2d --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpG3alg.h @@ -0,0 +1,661 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpG3alg.h */ +/* */ +/* Description: Contains the function prototypes. */ +/* */ +/* ************************************************************************ */ + +#ifndef INC_DPG3ALG_H +#define INC_DPG3ALG_H + +#ifndef ENABLE_CODE_SPACE_OPTIMIZATION +extern DPUCHAR dat_version; +#define V85_DAT 1u +#endif + +/* G3 specific compile options */ +#define CORE_SUPPORT +#define CORE_PLAIN +#define CORE_ENCRYPT +#define FROM_SUPPORT +#define FROM_PLAIN +#define FROM_ENCRYPT +#define NVM_SUPPORT +#define NVM_PLAIN +#define NVM_ENCRYPT +#define SECURITY_SUPPORT +#define SILSIG_SUPPORT +#define ENABLE_DAS_SUPPORT + +/* Code optimization specific compile switches */ +/* #define ENABLE_CODE_SPACE_OPTIMIZATION */ + +/* Jan Sucan +#define DISABLE_CORE_SPECIFIC_ACTIONS +#define DISABLE_FROM_SPECIFIC_ACTIONS +*/ + +#define DISABLE_NVM_SPECIFIC_ACTIONS +//#define DISABLE_SEC_SPECIFIC_ACTIONS + +/* This option could be used for performing progam_nvm_active_array and +verify_nvm_active_array actions. +Set FORCE_NVM_ACCESS to 1 to force NVM access */ +#define FORCE_NVM_ACCESS 0u + +#define BOL 0u +#define EOL 3u + +/* +* Data block ID definitions +*/ +#define ACT_UROW_DESIGN_NAME_ID 1u +#define BsrPattern_ID 2u +#define SILSIG_ID 3u +#define CHECKSUM_ID 4u +#define datastream_ID 5u +#define rlock_ID 6u +#define FRomAddressMask_ID 7u +#define FRomStream_ID 8u + +/* These defintions are the same as NVM block zoro. They are defined to aviod confusion when pogram and verify NVM functions are called. */ +#define NVM_OFFSET 5u +#define NvmParSize_ID 9u +#define NumOfPart_ID 10u +#define NvmAddr_ID 11u +#define NvmData_ID 12u +#define NvmProtect_ID 13u + + +#define NvmParSize_0_ID 9u +#define NumOfPart_0_ID 10u +#define NvmAddr_0_ID 11u +#define NvmData_0_ID 12u +#define NvmProtect_0_ID 13u +#define NvmParSize_1_ID 14u +#define NumOfPart_1_ID 15u +#define NvmAddr_1_ID 16u +#define NvmData_1_ID 17u +#define NvmProtect_1_ID 18u +#define NvmParSize_2_ID 19u +#define NumOfPart_2_ID 20u +#define NvmAddr_2_ID 21u +#define NvmData_2_ID 22u +#define NvmProtect_2_ID 23u +#define NvmParSize_3_ID 24u +#define NumOfPart_3_ID 25u +#define NvmAddr_3_ID 26u +#define NvmData_3_ID 27u +#define NvmProtect_3_ID 28u +#define UKEY_ID 29u +#define DMK_ID 30u +#define KDATA_ID 31u +#define ULOCK_ID 32u +#define NvmParSizePriv_all_ID 33u +#define NumOfPartPriv_all_ID 34u +#define NvmAddrPriv_all_ID 35u +#define NvmDataPriv_all_ID 36u +#define NvmProtectPriv_all_ID 37u +#define rlockDisable_ID 38u + +/* +* Location of special variables needed in the header section of the image file +*/ +#define M_DEVICE_OFFSET 30u +#define ID_OFFSET 31u + +#define DEVICE_FAMILY_OFFSET 55u +#define DEVICE_NAME_OFFSET 56u +#define ID_MASK_OFFSET 57u +#define SD_TILES_OFFSET 61u +#define MAP_ROWS_OFFSET 62u +#define BSR_LENGTH_OFFSET 64u +#define SE_WAIT_OFFSET 66u +#define DUAL_KEY_SUPPORT_OFFSET 67u + + + + +#define AXX015_DEVICE 1u +#define AXX030_DEVICE 2u + +#if ((!defined ENABLE_CODE_SPACE_OPTIMIZATION) || defined ENABLE_DAS_SUPPORT) +/************************************************************/ +/* Device specific parameters */ +/************************************************************/ +/* Supported A3PE/A3PEL/AGLE */ +#define AXXE600X_ID 0x023261CFu +#define AXXE600X_ID_MASK 0x03FFFFFFu +#define AXXE600X_SD 6u +#define AXXE600X_ROWS 3444u +#define AXXE600X_COLS 1184u +#define AXXE600X_BSR_BIT_LENGTH 1056u + +#define AXXE1500X_ID 0x0253A1CFu +#define AXXE1500X_ID_MASK 0x03FFFFFFu +#define AXXE1500X_SD 10u +#define AXXE1500X_ROWS 5644u +#define AXXE1500X_COLS 1956u +#define AXXE1500X_BSR_BIT_LENGTH 1740u + +#define AXXE3000X_ID 0x0274E1CFu +#define AXXE3000X_ID_MASK 0x03FFFFFFu +#define AXXE3000X_SD 14u +#define AXXE3000X_ROWS 7844u +#define AXXE3000X_COLS 2728u +#define AXXE3000X_BSR_BIT_LENGTH 2424u + +/* Supported A3P/A3PL/AGL */ +#define AXX030X_ID 0x049011CFu +#define AXX030X_ID_MASK 0x07FFFFFFu +#define AXX030X_SD 2u +#define AXX030X_ROWS 625u +#define AXX030X_COLS 412u +#define AXX030X_BSR_BIT_LENGTH 288u + +#define AXX060X_ID 0x029121CFu +#define AXX060X_ID_MASK 0x06FFFFFFu +#define AXX060X_SD 2u +#define AXX060X_ROWS 1244u +#define AXX060X_COLS 412u +#define AXX060X_BSR_BIT_LENGTH 372u + +#define AXX125X_ID 0x02A121CFu +#define AXX125X_ID_MASK 0x06FFFFFFu +#define AXX125X_SD 4u +#define AXX125X_ROWS 1244u +#define AXX125X_COLS 798u +#define AXX125X_BSR_BIT_LENGTH 564u + +#define AXX250X_ID 0x02A141CFu +#define AXX250X_ID_MASK 0x06FFFFFFu +#define AXX250X_SD 4u +#define AXX250X_ROWS 2300u +#define AXX250X_COLS 798u +#define AXX250X_BSR_BIT_LENGTH 708u + +#define AXX400X_ID 0x02B141CFu +#define AXX400X_ID_MASK 0x06FFFFFFu +#define AXX400X_SD 6u +#define AXX400X_ROWS 2300u +#define AXX400X_COLS 1184u +#define AXX400X_BSR_BIT_LENGTH 900u + +#define AXX600X_ID 0x02b261CFu +#define AXX600X_ID_MASK 0x06FFFFFFu +#define AXX600X_SD 6u +#define AXX600X_ROWS 3444u +#define AXX600X_COLS 1184u +#define AXX600X_BSR_BIT_LENGTH 1056u + +#define AXX1000X_ID 0x12C281CFu +#define AXX1000X_ID_MASK 0x06FFFFFFu +#define AXX1000X_SD 8u +#define AXX1000X_ROWS 4500u +#define AXX1000X_COLS 1570u +#define AXX1000X_BSR_BIT_LENGTH 1392u + +/* Supported AGLP */ +#define AGLP030X_ID 0x0E1011CFu +#define AGLP030X_ID_MASK 0x0FFFFFFFu +#define AGLP030X_SD 2u +#define AGLP030X_ROWS 625u +#define AGLP030X_COLS 412u +#define AGLP030X_BSR_BIT_LENGTH 288u + +#define AGLP060X_ID 0x0E1121CFu +#define AGLP060X_ID_MASK 0x0EFFFFFFu +#define AGLP060X_SD 2u +#define AGLP060X_ROWS 1244u +#define AGLP060X_COLS 412u +#define AGLP060X_BSR_BIT_LENGTH 372u + +#define AGLP125X_ID 0x0E2121CFu +#define AGLP125X_ID_MASK 0x0EFFFFFFu +#define AGLP125X_SD 4u +#define AGLP125X_ROWS 1244u +#define AGLP125X_COLS 798u +#define AGLP125X_BSR_BIT_LENGTH 564u + +#define AXXN010X_ID 0x069041CFu +#define AXXN020X_ID 0x069081CFu +#define AXXN060X_ID 0x039521CFu +#define AXXN125X_ID 0x03A521CFu +#define AXXN250X_ID 0x03A541CFu + +/* Supported AFS Devices */ +#define AFS090_ID 0x031921CFu +#define AFS090_ID_MASK 0x0BFFFFFFu +#define AFS090_SD 3u +#define AFS090_ROWS 1244u +#define AFS090_COLS 605u +#define AFS090_BSR_BIT_LENGTH 468u + +#define AFS250_ID 0x032141CFu +#define AFS250_ID_MASK 0x0FFFFFFFu +#define AFS250_SD 4u +#define AFS250_ROWS 2300u +#define AFS250_COLS 798u +#define AFS250_BSR_BIT_LENGTH 708u + +#define AFS600_ID 0x033261CFu +#define AFS600_ID_MASK 0x0FFFFFFFu +#define AFS600_SD 6u +#define AFS600_ROWS 3444u +#define AFS600_COLS 1184u +#define AFS600_BSR_BIT_LENGTH 1056u + +#define AFS1500_ID 0x0353A1CFu +#define AFS1500_ID_MASK 0x0FFFFFFFu +#define AFS1500_SD 10u +#define AFS1500_ROWS 5644u +#define AFS1500_COLS 1956u +#define AFS1500_BSR_BIT_LENGTH 1740u +#else +#define AFS600_ID 0x033261CFu +#define AFS1500_ID 0x0353A1CFu +#endif +#define A2F200_ID 0x05A131CFu + + +#define LDVPROP_LENGTH 6u + +/************************************************************/ +/* Instruction Set */ +/************************************************************/ +/* General opcodes */ +#define ISC_NOOP 0x84u +#define DESELECT_ALL_TILES 0xC0u +/* Erase opcodes */ +#define ISC_ERASE 0x85u + +/* UROW opcodes */ +#define ISC_PROGRAM_UROW 0xA7u +#define ISC_READ_UROW 0xA8u +#define ISC_PROGRAM_RLOCK 0x8Cu + +#define HIGHZ 0x07u +#define BYPASS 0xFFu +#define LDVPROP 0xB4u +/* Factory row opcodes */ +#define FACTORY_ADDRESS_SHIFT 0xF9u +#define READ_FACTORY 0xBFu + +/* UROW Data */ +#define GPIO_PROGRAMMING_METHOD 0x2u +#define IAP_PROGRAMMING_METHOD 0x5u +/* This is equivalent to FP90 */ +#define DIRECTC_VERSION 0x30u +#define DC_PROGRAMMING_SW 0x5u +#define ALGO_VERSION 0x14u + +#define DC_SOFTWARE_VERSION 26u +#define IEEE1532_PM 0u +#define STAPL_PM 1u +#define DIRECTC_PM 2u +#define PDB_PM 3u +#define SVF_PM 4u +#define IAP_PM 5u + +/* Programmer */ +#define FP 0u +#define FPLITE 1u +#define FP3 2u +#define SCULPTW 3u +#define BPW 4u +#define DIRECTCP 5u +#define STP 6u +#define FP4 7u + +/************************************************************/ +/* Block Support status bits */ +/************************************************************/ +#define DAT_SUPPORT_STATUS_OFFSET 39u +#define CORE_DAT_SUPPORT_BIT 0x0001u +#define FROM_DAT_SUPPORT_BIT 0x0002u +#define NVM_DAT_SUPPORT_BIT 0x0004u +#define NVM0_DAT_SUPPORT_BIT 0x0008u +#define NVM1_DAT_SUPPORT_BIT 0x0010u +#define NVM2_DAT_SUPPORT_BIT 0x0020u +#define NVM3_DAT_SUPPORT_BIT 0x0040u +#define NVM_DAT_VERIFY_SUPPORT_BIT 0x0080u +#define SEC_DAT_SUPPORT_BIT 0x0100u +#define AES_DAT_SUPPORT_BIT 0x0200u +#define CORE_DAT_ENCRYPTION_BIT 0x0400u +#define FROM_DAT_ENCRYPTION_BIT 0x0800u +#define NVM0_DAT_ENCRYPTION_BIT 0x1000u +#define NVM1_DAT_ENCRYPTION_BIT 0x2000u +#define NVM2_DAT_ENCRYPTION_BIT 0x4000u +#define NVM3_DAT_ENCRYPTION_BIT 0x8000u + +/************************************************************/ +/* Register Length */ +/************************************************************/ +#define MAX_ERASE_POLL 262140u +#define MAX_PROGRAM_POLL 16380u +#define FACTORY_ROW_BIT_LENGTH 128u + +/************************************************************/ +/* Erase Bits Definitions */ +/************************************************************/ +#define CORE_ERASE_BITS_BYTE0 0x1u /*Bit 0 */ +#define CORE_ERASE_BITS_BYTE1 0x0u /*Bit 0 */ +#define CORE_ERASE_BITS_BYTE2 0x0u /*Bit 0 */ +#define ULOCK_ERASE_BITS_BYTE0 0x2u /*Bit 1 */ +#define ULOCK_ERASE_BITS_BYTE1 0x0u /*Bit 1 */ +#define ULOCK_ERASE_BITS_BYTE2 0x0u /*Bit 1 */ +#define DMK_ERASE_BITS_BYTE0 0x4u /*Bit 2 */ +#define DMK_ERASE_BITS_BYTE1 0x0u /*Bit 2 */ +#define DMK_ERASE_BITS_BYTE2 0x0u /*Bit 2 */ +#define UKEY_ERASE_BITS_BYTE0 0x8u /*Bit 3 */ +#define UKEY_ERASE_BITS_BYTE1 0x0u /*Bit 3 */ +#define UKEY_ERASE_BITS_BYTE2 0x0u /*Bit 3 */ +#define FLOCK_ERASE_BITS_BYTE0 0x10u /*Bit 4 */ +#define FLOCK_ERASE_BITS_BYTE1 0x0u /*Bit 4 */ +#define FLOCK_ERASE_BITS_BYTE2 0x0u /*Bit 4 */ +#define FPRM_ERASE_BITS_BYTE0 0xE0u /*Bits 5-10*/ +#define FPRM_ERASE_BITS_BYTE1 0x7u /*Bits 5-10*/ +#define FPRM_ERASE_BITS_BYTE2 0x0u /*Bits 5-10*/ +#define FKEY_ERASE_BITS_BYTE0 0x0u /*Bit 11*/ +#define FKEY_ERASE_BITS_BYTE1 0x8u /*Bit 11*/ +#define FKEY_ERASE_BITS_BYTE2 0x0u /*Bit 11*/ +#define SECEN_ERASE_BITS_BYTE0 0x0u /*Bit 12*/ +#define SECEN_ERASE_BITS_BYTE1 0x10u /*Bit 12*/ +#define SECEN_ERASE_BITS_BYTE2 0x0u /*Bit 12*/ +#define VIRREF_ERASE_BITS_BYTE0 0x0u /*Bit 13*/ +#define VIRREF_ERASE_BITS_BYTE1 0x20u /*Bit 13*/ +#define VIRREF_ERASE_BITS_BYTE2 0x0u /*Bit 13*/ +#define UROW_ERASE_BITS_BYTE0 0x0u /*Bit 14*/ +#define UROW_ERASE_BITS_BYTE1 0x40u /*Bit 14*/ +#define UROW_ERASE_BITS_BYTE2 0x0u /*Bit 14*/ +#define FROM_ERASE_BITS_BYTE0 0x0u /*Bit 14*/ +#define FROM_ERASE_BITS_BYTE1 0x80u /*Bit 14*/ +#define FORM_ERASE_BITS_BYTE2 0x07Fu /*Bit 14*/ + +#ifndef ENABLE_CODE_SPACE_OPTIMIZATION +#define M7KDATA0 0x45u +#define M7KDATA1 0x49u +#define M7KDATA2 0x66u +#define M7KDATA3 0x73u +#define M7KDATA4 0x3Fu +#define M7KDATA5 0x5Fu +#define M7KDATA6 0x01u +#define M7KDATA7 0x26u +#define M7KDATA8 0x11u +#define M7KDATA9 0xE9u +#define M7KDATA10 0xEEu +#define M7KDATA11 0x2Eu +#define M7KDATA12 0x3Au +#define M7KDATA13 0x62u +#define M7KDATA14 0x37u +#define M7KDATA15 0xE1u + +#define M1KDATA0 0x77u +#define M1KDATA1 0x50u +#define M1KDATA2 0xE9u +#define M1KDATA3 0x8Fu +#define M1KDATA4 0xB1u +#define M1KDATA5 0x1Eu +#define M1KDATA6 0x29u +#define M1KDATA7 0x3Eu +#define M1KDATA8 0x86u +#define M1KDATA9 0x88u +#define M1KDATA10 0xB4u +#define M1KDATA11 0xCCu +#define M1KDATA12 0x48u +#define M1KDATA13 0x65u +#define M1KDATA14 0xDDu +#define M1KDATA15 0xACu + +#define P1KDATA0 0x15u +#define P1KDATA1 0x7du +#define P1KDATA2 0x69u +#define P1KDATA3 0x38u +#define P1KDATA4 0xaeu +#define P1KDATA5 0x09u +#define P1KDATA6 0x5fu +#define P1KDATA7 0x5eu +#define P1KDATA8 0x17u +#define P1KDATA9 0x4eu +#define P1KDATA10 0x5au +#define P1KDATA11 0x37u +#define P1KDATA12 0x14u +#define P1KDATA13 0xe5u +#define P1KDATA14 0xa9u +#define P1KDATA15 0xe7u + +#define FCBYTE0 0x86u +#define FCBYTE1 0x00u +#define FCBYTE2 0x50u +#define FCBYTE3 0x43u +#define FCBYTE4 0x64u +#define FCBYTE5 0x9Cu +#define FCBYTE6 0x52u +#define FCBYTE7 0x40u +#define FCBYTE8 0xC6u +#define FCBYTE9 0x73u +#define FCBYTE10 0xB0u +#define FCBYTE11 0xFBu +#define FCBYTE12 0x75u +#define FCBYTE13 0xE7u +#define FCBYTE14 0xFFu +#define FCBYTE15 0xFDu +#endif + +/* General delay and cycle parameters */ +#define ISC_ENABLE_CYCLES 3u +#define ISC_ENABLE_DELAY 2157u +#define ISC_DISABLE_DELAY 288u +#define ISC_NOOP_CYCLES 3u +#define ISC_NOOP_DELAY 264u +#define BYPASS_DELAY 288u +#define POLL_DELAY 100u +#define ISC_ERASE_CYCLES 3u +#define ERASE_POLL_DELAY 1000u +#define HIGHZ_CYCLES 1u +#define DESELECT_ALL_TILES_CYCLES 1u +#define AES_INIT_CYCLES 3u +#define AES_INIT_DELAY 190u +#define AES_MODE_CYCLES 1u +#define USERCODE_CYCLES 3u + +/* UROW delay and cycle parameters */ +#define ISC_READ_UROW_CYCLES 3u +#define ISC_READ_UROW_DELAY 330u +#define ISC_PROGRAM_UROW_CYCLES 15u + +/* Core code enable flags */ +#if (defined CORE_SUPPORT && defined CORE_PLAIN) +#define CORE_CODE_PLAIN_SUPPORT_BIT 0x0001u +#else +#define CORE_CODE_PLAIN_SUPPORT_BIT 0x0000u +#endif + +#if (defined CORE_SUPPORT && defined CORE_ENCRYPT) +#define CORE_CODE_ENCRYPTION_BIT 0x0400u +#else +#define CORE_CODE_ENCRYPTION_BIT 0x0000u +#endif + +/* FROM code enable flags */ +#if (defined FROM_SUPPORT && defined FROM_PLAIN) +#define FROM_CODE_PLAIN_SUPPORT_BIT 0x0002u +#else +#define FROM_CODE_PLAIN_SUPPORT_BIT 0x0000u +#endif + +#if (defined FROM_SUPPORT && defined FROM_ENCRYPT) +#define FROM_CODE_ENCRYPTION_BIT 0x0800u +#else +#define FROM_CODE_ENCRYPTION_BIT 0x0000u +#endif + +/* NVM code enable flags */ +#if (defined NVM_SUPPORT && defined NVM_PLAIN) +#define NVM_CODE_PLAIN_SUPPORT_BITS 0x003Cu +#else +#define NVM_CODE_PLAIN_SUPPORT_BITS 0x0000u +#endif + +#if (defined NVM_SUPPORT && defined NVM_ENCRYPT) +#define NVM_CODE_ENCRYPTION_BITS 0xF000u +#else +#define NVM_CODE_ENCRYPTION_BITS 0x0000u +#endif + +/* Security code enable flags */ +#ifdef SECURITY_SUPPORT +#define SEC_CODE_SUPPORT_BIT 0x0100u +#else +#define SEC_CODE_SUPPORT_BIT 0x0000u +#endif + +/************************************************************/ +/* Data file Tags to indicate M1, M3 or M7 data */ +/************************************************************/ +#ifndef ENABLE_CODE_SPACE_OPTIMIZATION +#define M7 7u +#define M1 1u +#define P1 3u +#endif + +#define CALIBRATION_BIT 0x10u +#define DUAL_KEY_BIT 0x20u +#define DAS_BIT 0x40u + + +extern DPUCHAR device_SD; /* Device specific number of SD tiles */ +extern DPUINT device_rows; /* Device specific number of rows */ + +extern DPUINT dat_support_status; +extern DPUCHAR device_se_wait_cycle; +extern DPULONG device_security_flags; +extern DPUINT device_bsr_bit_length; +extern DPUCHAR AES_mode_value; + +/* +main entry function : user calls this function from their main function +*/ +DPUCHAR dp_top_g3(void); +void dp_init_G3_vars(void); +void dp_get_dat_support_status(void); +void dp_check_dat_support_version(void); + +void dp_check_action(void); +void dp_perform_action (void); +/* Action Function Definitions */ +void dp_erase_action(void); +void dp_program_action(void); +void dp_verify_action(void); + +void dp_check_device_ID(void); +void dp_check_device_ID_V85_DAT(void); +void dp_read_usercode_action(void); +void dp_test_reg_015_030_check(void); +void dp_frow_015_030_check(void); +void dp_initialize(void); +void dp_exit(void); +void dp_check_security_settings(void); +void dp_get_dat_dual_key_flag(void); +void dp_is_core_configured(void); +void dp_exe_authentication(void); +void dp_verify_enc_key(void); + +void dp_erase(void); +void dp_exe_erase(void); +void dp_poll_erase(void); +void dp_poll_device(void); +void dp_read_urow(void); +void dp_program_urow(void); +void dp_init_aes(void); +void dp_set_aes_mode(void); +void dp_vnr(void); +void dp_load_bsr(void); +void dp_read_factory_row(void); +void dp_das_check(void); + +#ifdef ENABLE_DISPLAY +void dp_device_info_action(void); +void dp_verify_device_info_action(void); +void dp_read_silsig(void); +void dp_output_security(void); +void dp_display_urow(void); +#endif +#endif /* INC_DPALG_H */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpcore.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpcore.c new file mode 100644 index 0000000..4f2a016 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpcore.c @@ -0,0 +1,906 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpcore.c */ +/* */ +/* Description: Contains initialization and data checking functions. */ +/* */ +/* ************************************************************************ */ + +#include "dpuser.h" +#ifdef ENABLE_G3_SUPPORT + +#include "dputil.h" +#include "dpalg.h" +#include "dpG3alg.h" +#include "dpcore.h" +#include "dpnvm.h" +#include "dpsecurity.h" +#include "dpcom.h" +#include "dpjtag.h" + +DPUINT cycle_count; +#ifdef CORE_SUPPORT +DPUCHAR bol_eol_verify; +DPUCHAR SDNumber; +DPINT RowNumber; + + +/************************************************************************************************/ +/* Core Action Functions */ +/************************************************************************************************/ +#ifndef DISABLE_CORE_SPECIFIC_ACTIONS +void dp_erase_array_action(void) +{ + device_security_flags |= IS_ERASE_ONLY; + dp_erase_array(); + return; +} + +void dp_program_array_action(void) +{ + #ifdef CORE_ENCRYPT + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + dp_enc_data_authentication(); + } + #endif + if (error_code == DPE_SUCCESS) + { + dp_erase_array(); + } + /* Array Programming */ + #ifdef CORE_ENCRYPT + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + dp_enc_program_array(); + if (error_code == DPE_SUCCESS) + { + bol_eol_verify = BOL; + dp_enc_verify_array(); + if (error_code == DPE_SUCCESS) + { + dp_enc_program_rlock(); + if (error_code == DPE_SUCCESS) + { + dp_is_core_configured(); + } + } + } + } + } + #endif + #ifdef CORE_PLAIN + /* Plain text support */ + if (error_code == DPE_SUCCESS) + { + if ((dat_support_status & CORE_DAT_ENCRYPTION_BIT) == 0U) + { + dp_program_array(); + if (error_code == DPE_SUCCESS) + { + bol_eol_verify = BOL; + dp_verify_array(); + if (error_code == DPE_SUCCESS) + { + dp_program_rlock(); + if (error_code == DPE_SUCCESS) + { + dp_is_core_configured(); + } + } + } + } + } + #endif + + #ifdef NVM_SUPPORT + if (error_code == DPE_SUCCESS) + { + if ( + ((device_family & SFS_BIT) == SFS_BIT) && + (dat_support_status | (NVM0_DAT_SUPPORT_BIT | NVM1_DAT_SUPPORT_BIT | NVM2_DAT_SUPPORT_BIT | NVM3_DAT_SUPPORT_BIT)) + ) + { + if (hardware_interface == IAP_SEL) + { + dp_initialize_access_nvm(); + } + } + + if (dat_support_status & NVM0_DAT_SUPPORT_BIT) + { + #ifdef NVM_ENCRYPT + /* Encryption support */ + if (dat_support_status & NVM0_DAT_ENCRYPTION_BIT) + { + if ( + ((device_family & SFS_BIT) == SFS_BIT) && + ( (hardware_interface == GPIO_SEL) || (enable_mss_support) ) + ) + { + dp_enc_program_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + } + } + #endif + #ifdef NVM_PLAIN + /* Plain text support */ + if ((dat_support_status & NVM0_DAT_ENCRYPTION_BIT) == 0U) + { + if ( + ((device_family & SFS_BIT) == SFS_BIT) && + ( (hardware_interface == GPIO_SEL) || (enable_mss_support) ) + ) + { + dp_program_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + } + } + } + #endif + } + } + #endif + return; +} + +void dp_verify_array_action(void) +{ + /* Array verification */ + #ifdef CORE_ENCRYPT + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + bol_eol_verify = EOL; + dp_enc_verify_array(); + } + #endif + #ifdef CORE_PLAIN + /* Plain text support */ + if ((dat_support_status & CORE_DAT_ENCRYPTION_BIT) == 0U) + { + bol_eol_verify = EOL; + dp_verify_array(); + } + #endif + if (error_code == DPE_SUCCESS) + { + dp_is_core_configured(); + } + return; +} + +#ifdef CORE_ENCRYPT +void dp_enc_data_authentication_action(void) +{ + dp_enc_data_authentication(); + return; +} +#endif +/************************************************************************************************/ + + +/************************************************************************************************/ +/* Common Functions */ +/************************************************************************************************/ +void dp_erase_array(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nErase FPGA Array..."); + #endif + + #ifdef CORE_PLAIN + if ((dat_support_status & CORE_DAT_ENCRYPTION_BIT) == 0u) + { + dp_disable_rlock(); + } + #endif + #ifdef CORE_ENCRYPT + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + dp_enc_disable_rlock(); + } + #endif + if (error_code == DPE_SUCCESS) + { + + dp_flush_global_buf1(); + global_buf1[0] = UROW_ERASE_BITS_BYTE0 | CORE_ERASE_BITS_BYTE0; + global_buf1[1] = UROW_ERASE_BITS_BYTE1 | CORE_ERASE_BITS_BYTE1; + global_buf1[2] = UROW_ERASE_BITS_BYTE2 | CORE_ERASE_BITS_BYTE2; + + dp_exe_erase(); + } + return; +} +#endif + +void dp_exe_program(void) +{ + /* PROGRAM */ + opcode = ISC_PROGRAM; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_CYCLES); + dp_poll_device(); + + return; +} + +void dp_exe_verify(void) +{ + /* Verify0 */ + opcode = ISC_VERIFY0; + IRSCAN_in(); + DRSCAN_in(0u, 2u, &bol_eol_verify); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_VERIFY0_CYCLES); + dp_delay(ISC_VERIFY0_DELAY); + + dp_poll_device(); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nVerify 0 failed\r\nRow Number : "); + dp_display_value(((DPULONG)RowNumber - 1u), DEC); + #endif + error_code = DPE_CORE_VERIFY_ERROR; + } + + if (error_code == DPE_SUCCESS) + { + opcode = ISC_VERIFY0; + IRSCAN_in(); + DRSCAN_in(0u, 2u, &bol_eol_verify); + + DRSCAN_out(2u, &bol_eol_verify, &global_uchar1); + if ((global_uchar1 & 0x3U) != 0U) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nVerify 0 failed\r\nRow Number : "); + dp_display_value((DPULONG)RowNumber - 1U, DEC); + #endif + error_code = DPE_CORE_VERIFY_ERROR; + } + } + + + /* Verify1 */ + if (error_code == DPE_SUCCESS) + { + opcode = ISC_VERIFY1; + IRSCAN_in(); + DRSCAN_in(0u, 2u, &bol_eol_verify); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_VERIFY1_CYCLES); + dp_delay(ISC_VERIFY1_DELAY); + + dp_poll_device(); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nVerify 1 failed\r\nRow Number : "); + dp_display_value((DPULONG)RowNumber - 1U,DEC); + #endif + error_code = DPE_CORE_VERIFY_ERROR; + } + } + + if (error_code == DPE_SUCCESS) + { + opcode = ISC_VERIFY1; + IRSCAN_in(); + DRSCAN_in(0u, 2u, &bol_eol_verify); + + DRSCAN_out(2u, &bol_eol_verify, &global_uchar1); + if ((global_uchar1 & 0x3U) != 0U) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nVerify 1 failed\r\nRow Number : "); + dp_display_value((DPULONG)RowNumber - 1u, DEC); + #endif + error_code = DPE_CORE_VERIFY_ERROR; + } + } + return; +} + +void dp_reset_address(void) +{ + + opcode = ISC_INCREMENT; + IRSCAN_in(); + global_uchar1 = 2u; + DRSCAN_in(0u, 2u, &global_uchar1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_INCREMENT_CYCLES); + + + return; +} + +void dp_increment_address(void) +{ + + opcode = ISC_INCREMENT; + IRSCAN_in(); + global_uchar1 = 3u; + DRSCAN_in(0u, 2u, &global_uchar1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_INCREMENT_CYCLES); + + + return; +} +#ifdef ENABLE_DAS_SUPPORT +void dp_load_row_address(void) +{ + DPUCHAR Tiles; + DPUINT TileSize[132] = { + 1U, 48U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, + 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, + 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, + 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, + 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 1U, 1U, 44U, 44U, 44U, 44U, + 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, + 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, + 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, + 44U, 44U, 44U, 44U, 44U ,44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, 44U, + 44U, 44U, 44U,44U, 48U, 1U + }; + + DPINT LastSumOfTileRows = 0; + DPINT SumOfTileRows = 0; + DPUCHAR Address[24]= { + 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, + 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U + }; + DPUINT IO = 0U; + DPUCHAR RP = 0U; + DPUCHAR LH = 0U; + DPUINT BitsToShift; + DPUCHAR AddressIndex; + /* Calculate which tile the row belongs to and what row within the tile we are programming*/ + for(Tiles = 0U; Tiles < 132U; Tiles ++) + { + SumOfTileRows += (DPINT) TileSize[Tiles]; + if (RowNumber < SumOfTileRows) + { + break; + } + else + { + LastSumOfTileRows = SumOfTileRows; + } + } + if ((RowNumber - LastSumOfTileRows) >= 38) + { + BitsToShift = (TileSize[Tiles] - 1U) - ((DPUINT)RowNumber - (DPUINT)LastSumOfTileRows); + IO = 0x200u; + IO >>= BitsToShift; + RP = (DPUCHAR)(0x20U >> BitsToShift); + LH = (DPUCHAR)(0x20U >> BitsToShift); + + Address[22] |= (DPUCHAR) (IO << 6U); + Address[23] |= (DPUCHAR) (IO >> 2U); + Address[22] |= RP; + Address[21] |= (DPUCHAR) (LH << 2U); + } + /* Setting row select bit */ + if ((RowNumber - LastSumOfTileRows) < 38) + { + BitsToShift = ((DPUINT)RowNumber - (DPUINT)LastSumOfTileRows) + 4u; + AddressIndex = (DPUCHAR)(BitsToShift / 8U); + BitsToShift -= ((DPUINT)AddressIndex * 8U); + AddressIndex += 16U; + Address[AddressIndex] |= (1U << BitsToShift); + } + /* Setting tile bit */ + AddressIndex = Tiles / 8U; + BitsToShift = (DPUINT)Tiles - (DPUINT)AddressIndex * 8U; + Address[AddressIndex] |= (1U << BitsToShift); + + /* Shift the address */ + opcode = ISC_ADDRESS_SHIFT; + IRSCAN_in(); + DRSCAN_in(0u, 192u, Address); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_ADDRESS_SHIFT_CYCLES); + + return; +} +#endif + +#ifdef CORE_PLAIN +/************************************************************************************************/ +/* Plain text array programming functions */ +/************************************************************************************************/ +void dp_program_array(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProgramming FPGA Array..."); + #endif + dp_reset_address(); + DataIndex = 0U; + #ifdef ENABLE_DISPLAY + old_progress = 0; + #endif + for ( RowNumber = (DPINT)device_rows - 1; RowNumber >= 0; RowNumber-- ) + { + #ifdef ENABLE_DISPLAY + new_progress = (device_rows - RowNumber ) * 100 / device_rows; + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + + #ifdef ENABLE_DAS_SUPPORT + if ((device_ID & AXXE1500X_ID_MASK) == (AXXE1500X_ID & AXXE1500X_ID_MASK)) + { + if (device_family & DAS_BIT) + { + dp_load_row_address(); + } + } + #endif + dp_load_row_data(); + dp_exe_program(); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to program FPGA Array at row "); + dp_display_value((DPULONG)RowNumber,DEC); + #endif + error_code = DPE_CORE_PROGRAM_ERROR; + break; + } + dp_increment_address(); + } + return; +} + + +void dp_verify_array(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nVerifying FPGA Array..."); + #endif + + dp_reset_address(); + DataIndex = 0U; + #ifdef ENABLE_DISPLAY + old_progress = 0; + #endif + for ( RowNumber = (DPINT)device_rows - 1; RowNumber >= 0; RowNumber-- ) + { + #ifdef ENABLE_DISPLAY + new_progress = (device_rows - RowNumber ) * 100 / device_rows; + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + #ifdef ENABLE_DAS_SUPPORT + if ((device_ID & AXXE1500X_ID_MASK) == (AXXE1500X_ID & AXXE1500X_ID_MASK)) + { + if (device_family & DAS_BIT) + { + dp_load_row_address(); + } + } + #endif + dp_load_row_data(); + dp_exe_verify(); + if (error_code != DPE_SUCCESS) + { + break; + } + dp_increment_address(); + } + return; +} + + +/****************************************************************************/ +/* Address and Data Loading */ +/****************************************************************************/ +void dp_load_row_data(void) +{ + + /* Load one row of FPGA Array data */ + opcode = ISC_DATA_SHIFT; + IRSCAN_in(); + + for ( SDNumber = 1u; SDNumber <= device_SD; SDNumber++ ) + { + for ( global_ulong1 = 1u; global_ulong1 <= 8u; global_ulong1++ ) + { + dp_get_and_DRSCAN_in(datastream_ID, ARRAY_ROW_LENGTH, DataIndex); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_DATA_SHIFT_CYCLES); + DataIndex = DataIndex + ARRAY_ROW_LENGTH; + } + } + + return; +} + +void dp_program_rlock(void) +{ + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProgramming RLOCK..."); + #endif + + DataIndex = 0u; + opcode = ISC_DATA_SHIFT; + IRSCAN_in(); + + for ( SDNumber = 1u; SDNumber <= device_SD; SDNumber++ ) + { + for ( global_ulong1 = 1u; global_ulong1 <= 8u; global_ulong1++ ) + { + dp_get_and_DRSCAN_in(rlock_ID, ARRAY_ROW_LENGTH, DataIndex); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_DATA_SHIFT_CYCLES); + DataIndex = DataIndex + ARRAY_ROW_LENGTH; + } + } + + + opcode = ISC_PROGRAM_RLOCK; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_RLOCK_CYCLES); + dp_poll_device(); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to program RLOCK "); + #endif + error_code = DPE_PROGRAM_RLOCK_ERROR; + } + + return; +} + +void dp_disable_rlock(void) +{ + + opcode = ISC_DATA_SHIFT; + IRSCAN_in(); + + for ( SDNumber = 1u; SDNumber <= device_SD; SDNumber++ ) + { + for ( global_ulong1 = 1u; global_ulong1 <= 8u; global_ulong1++ ) + { + DRSCAN_in(0u, ARRAY_ROW_LENGTH, DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_DATA_SHIFT_CYCLES); + } + } + + + opcode = ISC_PROGRAM_RLOCK; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_RLOCK_CYCLES); + dp_poll_device(); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to disable RLOCK "); + #endif + error_code = DPE_PROGRAM_RLOCK_ERROR; + } + + return; +} +#endif + +#ifdef CORE_ENCRYPT +/************************************************************************************************/ +/* Encryption array programming functions */ +/************************************************************************************************/ +void dp_enc_program_array(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProgramming FPGA Array..."); + #endif + if (device_family & DUAL_KEY_BIT) + { + global_uchar1 = AES_mode_value; + dp_set_aes_mode(); + } + dp_init_aes(); + dp_reset_address(); + + #ifdef ENABLE_DISPLAY + old_progress = 0; + #endif + DataIndex = 0U; + for ( RowNumber = (DPINT)device_rows - 1; RowNumber >= 0; RowNumber-- ) + { + #ifdef ENABLE_DISPLAY + new_progress = (device_rows - RowNumber ) * 100 / device_rows; + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + #ifdef ENABLE_DAS_SUPPORT + if ((device_ID & AXXE1500X_ID_MASK) == (AXXE1500X_ID & AXXE1500X_ID_MASK)) + { + if (device_family & DAS_BIT) + { + dp_load_row_address(); + } + } + #endif + dp_load_enc_row_data(); + dp_exe_program(); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to program FPGA Array at row "); + dp_display_value((DPULONG)RowNumber, DEC); + #endif + error_code = DPE_CORE_PROGRAM_ERROR; + break; + } + dp_increment_address(); + } + return; +} + + +void dp_enc_verify_array(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nVerifying FPGA Array..."); + #endif + if (device_family & DUAL_KEY_BIT) + { + global_uchar1 = AES_mode_value; + dp_set_aes_mode(); + } + dp_init_aes(); + dp_reset_address(); + #ifdef ENABLE_DISPLAY + old_progress = 0; + #endif + DataIndex = 0u; + for ( RowNumber = (DPINT)device_rows - 1; RowNumber >= 0; RowNumber-- ) + { + #ifdef ENABLE_DISPLAY + new_progress = (device_rows - RowNumber ) * 100 / device_rows; + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + #ifdef ENABLE_DAS_SUPPORT + if ((device_ID & AXXE1500X_ID_MASK) == (AXXE1500X_ID & AXXE1500X_ID_MASK)) + { + if (device_family & DAS_BIT) + { + dp_load_row_address(); + } + } + #endif + dp_load_enc_row_data(); + dp_exe_verify(); + if (error_code != DPE_SUCCESS) + { + break; + } + dp_increment_address(); + } + return; +} + +void dp_load_enc_row_data(void) +{ + opcode = DESCRAMBLE; + IRSCAN_in(); + + /* Load one row of FPGA Array data */ + for ( SDNumber = 1u; SDNumber <= device_SD; SDNumber++ ) + { + for ( global_ulong1 = 0u; global_ulong1 <= 1u; global_ulong1++ ) + { + dp_get_and_DRSCAN_in(datastream_ID, AES_BLOCK_LENGTH, DataIndex); + goto_jtag_state(JTAG_RUN_TEST_IDLE,DESCRAMBLE_CYCLES); + dp_delay(DESCRAMBLE_DELAY); + DataIndex = DataIndex + AES_BLOCK_LENGTH; + } + } + + return; +} + +void dp_enc_program_rlock(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProgramming Rlock..."); + #endif + DataIndex = 0u; + opcode = DESCRAMBLE; + IRSCAN_in(); + + + for ( SDNumber = 1u; SDNumber <= device_SD; SDNumber++ ) + { + for ( global_ulong1 = 0u; global_ulong1 <= 1u; global_ulong1++ ) + { + dp_get_and_DRSCAN_in(rlock_ID, AES_BLOCK_LENGTH, DataIndex); + goto_jtag_state(JTAG_RUN_TEST_IDLE,DESCRAMBLE_CYCLES); + dp_delay(DESCRAMBLE_DELAY); + DataIndex = DataIndex + AES_BLOCK_LENGTH; + } + } + + opcode = ISC_PROGRAM_RDLC; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_RDLC_CYCLES); + dp_poll_device(); + + return; +} + +void dp_enc_disable_rlock(void) +{ + dp_get_data(rlockDisable_ID,1); + if (return_bytes != 0u) + { + dp_init_aes(); + dp_reset_address(); + + DataIndex = 0u; + opcode = DESCRAMBLE; + IRSCAN_in(); + + + for ( SDNumber = 1u; SDNumber <= device_SD; SDNumber++ ) + { + for ( global_ulong1 = 0u; global_ulong1 <= 1u; global_ulong1++ ) + { + dp_get_and_DRSCAN_in(rlockDisable_ID, AES_BLOCK_LENGTH, DataIndex); + goto_jtag_state(JTAG_RUN_TEST_IDLE,DESCRAMBLE_CYCLES); + dp_delay(DESCRAMBLE_DELAY); + DataIndex = DataIndex + AES_BLOCK_LENGTH; + } + } + + opcode = ISC_PROGRAM_RDLC; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_RDLC_CYCLES); + dp_poll_device(); + } + return; +} + +void dp_enc_data_authentication(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nPerforming Data Authentication..."); + #endif + + if (device_family & DUAL_KEY_BIT) + { + global_uchar1 = AES_mode_value; + dp_set_aes_mode(); + } + + dp_init_aes(); + dp_reset_address(); + + DataIndex = 0u; + #ifdef ENABLE_DISPLAY + old_progress = 0; + #endif + for ( RowNumber = (DPINT)device_rows - 1 ; RowNumber >= 0; RowNumber-- ) + { + #ifdef ENABLE_DISPLAY + new_progress = (device_rows - RowNumber ) * 100 / device_rows; + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + + dp_load_enc_row_data(); + dp_exe_authentication(); + if (error_code != DPE_SUCCESS) + { + break; + } + } + return; +} + +#endif /* End of CORE_ENCRYPT */ +#endif /* End of CORE_SUPPORT */ +#endif /* End of ENABLE_G3_SUPPORT */ + +/* *************** End of File *************** */ diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpcore.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpcore.h new file mode 100644 index 0000000..68c858d --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpcore.h @@ -0,0 +1,160 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpcore.h */ +/* */ +/* Description: Contains the function prototypes. */ +/* */ +/* ************************************************************************ */ + +#ifndef INC_DPCORE_H +#define INC_DOCORE_H + +/****************************************************************************/ +/* */ +/****************************************************************************/ +extern DPUCHAR bol_eol_verify; + +/****************************************************************************/ +/* CORE Opcodes */ +/****************************************************************************/ +#define ISC_PROGRAM 0x83u +#define ISC_VERIFY0 0x8Du +#define ISC_VERIFY1 0x8Eu +#define ISC_INCREMENT 0x87u +#define ISC_DATA_SHIFT 0x89u +#define ISC_ADDRESS_SHIFT 0xA9u + +/****************************************************************************/ +/* CORE Register Length */ +/****************************************************************************/ +#define ARRAY_ROW_LENGTH 26u +#define UROW_BIT_LENGTH 128u +#define UROW_BYTE_LENGTH 16u +#define SILSIG_BIT_LENGTH 32u +#define SILSIG_BYTE_LENGTH 4u + +#define DESCRAMBLE 0xDFU +#define AES_BLOCK_LENGTH 128U +#define ISC_PROGRAM_RDLC 0x8CU + +/* ARRAY delay and cycle parameters */ +#define ISC_VERIFY0_CYCLES 3u +#define ISC_VERIFY0_DELAY 264u +#define ISC_VERIFY1_CYCLES 3u +#define ISC_VERIFY1_DELAY 264u +#define DESCRAMBLE_CYCLES 3u +#define DESCRAMBLE_DELAY 69u +#define ISC_PROGRAM_CYCLES 3u +#define ISC_INCREMENT_CYCLES 3u +#define ISC_ADDRESS_SHIFT_CYCLES 1u +#define ISC_DATA_SHIFT_CYCLES 3u +#define ISC_PROGRAM_RLOCK_CYCLES 3u +#define ISC_PROGRAM_RDLC_CYCLES 1u +#define READ_FACTORY_DELAY 330u +#define READ_FACTORY_CYCLES 3u +#define FACTORY_ADDRESS_SHIFT_CYCLES 1u + +extern DPUINT cycle_count; +/****************************************************************************/ +/* Function prototypes */ +/****************************************************************************/ +void dp_program_array(void); +void dp_exe_program(void); +void dp_load_row_data(void); +void dp_load_row_address(void); +void dp_exe_verify(void); +void dp_verify_array_eol(void); +void dp_verify_array(void); +void dp_program_rlock(void); +void dp_disable_rlock(void); +void dp_reset_address(void); +void dp_increment_address(void); + +void dp_load_enc_row_data(void); +void dp_enc_verify_array(void); +void dp_enc_program_array(void); +void dp_enc_program_rlock(void); +void dp_enc_disable_rlock(void); +void dp_erase_array_action(void); +void dp_erase_array(void); +void dp_program_array_action(void); +void dp_verify_array_action(void); +void dp_enc_data_authentication_action(void); +void dp_enc_data_authentication(void); +#endif /* INC_DPCORE_H */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpfrom.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpfrom.c new file mode 100644 index 0000000..eb7a930 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpfrom.c @@ -0,0 +1,404 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpfrom.c */ +/* */ +/* Description: Contains initialization and data checking functions. */ +/* */ +/* ************************************************************************ */ + +#include "dpuser.h" +#ifdef ENABLE_G3_SUPPORT + +#include "dputil.h" +#include "dpalg.h" +#include "dpG3alg.h" +#include "dpfrom.h" +#include "dpsecurity.h" +#include "dpcom.h" +#include "dpjtag.h" + +DPINT FromRowNumber; +#ifdef FROM_SUPPORT +DPUCHAR ucFRomAddressMask; + +void dp_disturb_from(void) +{ + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nPerform FlashROM disturb..."); + #endif + + for (global_uchar1 = 0U; global_uchar1 < FROM_ROW_BIT_LENGTH/8U ; global_uchar1++) + { + global_buf1[global_uchar1] = 0xffU; + } + + /* Since RowNumber could be an 8 bit variable or 16 bit, it will wrap around */ + for (FromRowNumber = 7; FromRowNumber >= 0 ;FromRowNumber--) + { + global_uchar1 = (DPUCHAR)FromRowNumber; + opcode = ISC_UFROM_ADDR_SHIFT; + IRSCAN_in(); + DRSCAN_in(0u,3u,&global_uchar1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_UFROM_ADDR_SHIFT_CYCLES); + + opcode = ISC_PROGRAM_UFROM; + IRSCAN_in(); + DRSCAN_in(0u, FROM_ROW_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_UFROM_CYCLES); + dp_delay(ISC_PROGRAM_UFROM_DELAY); + } + + + return; +} + +/************************************************************************************************/ +/* FROM Action Functions */ +/************************************************************************************************/ +#ifndef DISABLE_FROM_SPECIFIC_ACTIONS +void dp_erase_from_action(void) +{ + device_security_flags |= IS_ERASE_ONLY; + device_security_flags |= IS_RESTORE_DESIGN; + dp_erase_from(); + return; +} + +void dp_program_from_action(void) +{ + dp_erase_from(); + + /* Encryption support */ + #ifdef FROM_ENCRYPT + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & FROM_DAT_ENCRYPTION_BIT) + { + dp_enc_program_from(); + } + } + #endif + #ifdef FROM_PLAIN + /* Plain text support */ + if (error_code == DPE_SUCCESS) + { + if ((dat_support_status & FROM_DAT_ENCRYPTION_BIT) == 0U) + { + dp_program_from(); + if (error_code == DPE_SUCCESS) + { + dp_verify_from(); + } + } + } + #endif + return; +} + +void dp_verify_from_action(void) +{ + #ifdef FROM_PLAIN + /* Plain text support */ + if ((dat_support_status & FROM_DAT_ENCRYPTION_BIT) == 0U) + { + dp_verify_from(); + } + #endif + return; +} + +/************************************************************************************************/ + +/************************************************************************************************/ +/* Common Functions */ +/************************************************************************************************/ +void dp_erase_from(void) +{ + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nErase FlashROM..."); + #endif + dp_flush_global_buf1(); + global_buf1[0] = UROW_ERASE_BITS_BYTE0; + global_buf1[1] = UROW_ERASE_BITS_BYTE1; + global_buf1[2] = UROW_ERASE_BITS_BYTE2; + + /* This is for FROM erase. Need to get which bits are set to erase from the data file. */ + global_uchar1 = (DPUCHAR) dp_get_bytes(FRomAddressMask_ID,0U,1U); + if (global_uchar1 & 0x1U) + { + global_buf1[1]|=0x80U; + } + global_buf1[2] |= (DPUCHAR)(global_uchar1 >> 1U); + + + dp_exe_erase(); + + return; +} +#endif + +/************************************************************************************************/ +/* FROM Plain Text Programming Functions */ +/************************************************************************************************/ +#ifdef FROM_PLAIN +void dp_program_from(void) +{ + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProgramming FlashROM..."); + #endif + DataIndex=0U; + global_uint1 = 0x80U; /* global_uint1 could be used in place if FromAddressMaskIndex */ + + ucFRomAddressMask = (DPUCHAR) dp_get_bytes(FRomAddressMask_ID,0U,1U); + /* Since RowNumber could be an 8 bit variable or 16 bit, it will wrap around */ + for (FromRowNumber = 7; FromRowNumber >= 0 ;FromRowNumber--) + { + if (ucFRomAddressMask & global_uint1) + { + global_uchar1 = (DPUCHAR)FromRowNumber; + opcode = ISC_UFROM_ADDR_SHIFT; + IRSCAN_in(); + DRSCAN_in(0u,3u,&global_uchar1); + goto_jtag_state(JTAG_UPDATE_DR,0u); + + + opcode = ISC_PROGRAM_UFROM; + IRSCAN_in(); + dp_get_and_DRSCAN_in(FRomStream_ID, FROM_ROW_BIT_LENGTH, DataIndex); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_UFROM_CYCLES); + DataIndex = DataIndex + FROM_ROW_BIT_LENGTH; + + dp_poll_device(); + if (error_code != DPE_SUCCESS) + { + break; + } + } + global_uint1>>=1; + } + + return; +} + +void dp_verify_from(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nVerifying FlashROM..."); + #endif + dp_vnr(); + + + DataIndex=0U; + global_uint1=0x80U; /* global_uchar2 could be used in place if FromAddressMaskIndex */ + ucFRomAddressMask = (DPUCHAR) dp_get_bytes(FRomAddressMask_ID,0U,1U); + for (FromRowNumber=7; FromRowNumber >= 0 ;FromRowNumber--) + { + if (ucFRomAddressMask & global_uint1) + { + global_uchar2 = (DPUCHAR) FromRowNumber; + opcode = ISC_UFROM_ADDR_SHIFT; + IRSCAN_in(); + DRSCAN_in(0U,3U,&global_uchar2); + goto_jtag_state(JTAG_UPDATE_DR,0u); + + opcode = ISC_VERIFY_UFROM; + IRSCAN_in(); + dp_get_and_DRSCAN_in(FRomStream_ID, FROM_ROW_BIT_LENGTH, DataIndex); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_VERIFY_UFROM_CYCLES); + dp_delay(ISC_VERIFY_UFROM_DELAY); + + dp_poll_device(); + if (error_code == DPE_SUCCESS) + { + opcode = ISC_VERIFY_UFROM; + IRSCAN_in(); + DRSCAN_out(FROM_ROW_BIT_LENGTH,(DPUCHAR*)DPNULL,global_buf1); + if ((global_buf1[0]&0x3U) != 0x3U) + { + error_code = DPE_FROM_VERIFY_ERROR; + break; + } + DataIndex = DataIndex + FROM_ROW_BIT_LENGTH; + } + else + { + FromRowNumber = -1; + } + } + global_uint1>>=1; + } + + return; +} +#endif + +#ifdef FROM_ENCRYPT +/*********************** ENCRYPTION **************************/ +void dp_enc_program_from(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProgramming FlashROM..."); + #endif + if (device_family & DUAL_KEY_BIT) + { + global_uchar1 = 0U; + dp_set_aes_mode(); + + } + + + DataIndex=0U; + global_uint1 = 0x1U; /* global_uint1 could be used in place if FromAddressMaskIndex */ + ucFRomAddressMask = (DPUCHAR) dp_get_bytes(FRomAddressMask_ID,0U,1U); + + for (FromRowNumber = 1;FromRowNumber <= 8 ;FromRowNumber++) + { + if (ucFRomAddressMask & global_uint1) + { + dp_init_aes(); + + opcode = ISC_DESCRAMBLE_UFROM; + IRSCAN_in(); + dp_get_and_DRSCAN_in(FRomStream_ID, FROM_ROW_BIT_LENGTH, DataIndex); + + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_DESCRAMBLE_UFROM_CYCLES); + dp_delay(ISC_DESCRAMBLE_UFROM_DELAY); + + DataIndex = DataIndex + FROM_ROW_BIT_LENGTH; + + opcode = ISC_PROGRAM_ENC_UFROM; + IRSCAN_in(); + dp_get_and_DRSCAN_in(FRomStream_ID, FROM_ROW_BIT_LENGTH, DataIndex); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_ENC_UFROM_CYCLES); + + DataIndex = DataIndex + FROM_ROW_BIT_LENGTH; + dp_poll_device(); + if (error_code != DPE_SUCCESS) + { + break; + } + } + global_uint1<<=1; + } + + return; +} +#endif +#endif + +#ifdef ENABLE_DISPLAY +void dp_read_from(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\n\r\nFlashROM Information: "); + #endif + dp_vnr(); + + + for (FromRowNumber=7; FromRowNumber >= 0 ;FromRowNumber--) + { + global_uchar1 = (DPUCHAR) FromRowNumber; + opcode = ISC_UFROM_ADDR_SHIFT; + IRSCAN_in(); + DRSCAN_in(0u, 3u, &global_uchar1); + goto_jtag_state(JTAG_UPDATE_DR,0u); + + opcode = ISC_READ_UFROM; + IRSCAN_in(); + DRSCAN_in(0u,FROM_ROW_BIT_LENGTH,(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_READ_UFROM_CYCLES); + dp_delay(ISC_READ_UFROM_DELAY); + + + DRSCAN_out(FROM_ROW_BIT_LENGTH,(DPUCHAR*)DPNULL,global_buf1); + dp_display_text("\r\n"); + dp_display_array(global_buf1,FROM_ROW_BYTE_LENGTH,HEX); + } + dp_display_text("\r\n=================================================="); + + + + return; +} +#endif + +#endif /* End of ENABLE_G3_SUPPORT */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpfrom.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpfrom.h new file mode 100644 index 0000000..35ddbda --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpfrom.h @@ -0,0 +1,137 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpfrom.h */ +/* */ +/* Description: Contains the function prototypes. */ +/* */ +/* ************************************************************************ */ + +#ifndef INC_DPFROM_H +#define INC_DPFROM_H + +/****************************************************************************/ +/* UFROM Opcodes */ +/****************************************************************************/ +#define ISC_UFROM_ADDR_SHIFT 0x9FU +#define ISC_PROGRAM_UFROM 0x9BU +#define ISC_VERIFY_UFROM 0x9CU +#define ISC_READ_UFROM 0x93U + + +#define ISC_DESCRAMBLE_UFROM 0xA5U +#define ISC_PROGRAM_ENC_UFROM 0xA6U +#define ISC_VERIFY_ENC_UFROM 0x9DU + +/****************************************************************************/ +/* UFROM Register Length */ +/****************************************************************************/ +#define FROM_ROW_BIT_LENGTH 128U +#define FROM_ROW_BYTE_LENGTH 16U + +/* FROM delay and cycle parameters */ +#define ISC_READ_UFROM_CYCLES 3u +#define ISC_READ_UFROM_DELAY 159u +#define ISC_VERIFY_UFROM_CYCLES 3u +#define ISC_VERIFY_UFROM_DELAY 159u +#define ISC_PROGRAM_UFROM_CYCLES 5u +#define ISC_PROGRAM_UFROM_DELAY 10000u +#define ISC_PROGRAM_ENC_UFROM_CYCLES 5u +#define ISC_UFROM_ADDR_SHIFT_CYCLES 1u +#define ISC_DESCRAMBLE_UFROM_CYCLES 1u +#define ISC_DESCRAMBLE_UFROM_DELAY 69u + + +/****************************************************************************/ +/* Function prototypes */ +/****************************************************************************/ +void dp_program_from(void); +void dp_verify_from(void); + + +void dp_enc_program_from(void); +void dp_erase_from_action(void); +void dp_program_from_action(void); +void dp_verify_from_action(void); +void dp_erase_from(void); +void dp_disturb_from(void); +#ifdef ENABLE_DISPLAY +void dp_read_from(void); +#endif + +#endif /* INC_DPFROM_H */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpnvm.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpnvm.c new file mode 100644 index 0000000..4821112 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpnvm.c @@ -0,0 +1,1193 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpnvm.c */ +/* */ +/* Description: Contains initialization and data checking functions. */ +/* */ +/* ************************************************************************ */ + +#include "dpuser.h" +#ifdef ENABLE_G3_SUPPORT + +#include "dputil.h" +#include "dpalg.h" +#include "dpG3alg.h" +#include "dpnvm.h" +#include "dpcom.h" +#include "dpjtag.h" + + +#ifdef NVM_SUPPORT +DPUCHAR Protection; +DPUINT Par; +DPULONG ParSize; +DPUINT NumOfPart; + +/************************************************************************************************/ +/* NVM Action Functions */ +/************************************************************************************************/ +#ifndef DISABLE_NVM_SPECIFIC_ACTIONS +void dp_program_nvm_action(void) +{ + if (((device_family & SFS_BIT) == SFS_BIT) && (hardware_interface == IAP_SEL)) + { + dp_initialize_access_nvm(); + } + + if (dat_support_status & NVM0_DAT_SUPPORT_BIT) + { + #ifdef NVM_ENCRYPT + /* Encryption support */ + if (dat_support_status & NVM0_DAT_ENCRYPTION_BIT) + { + if (((device_family & SFS_BIT) == SFS_BIT) && ((hardware_interface == GPIO_SEL) || (enable_mss_support))) + { + dp_enc_program_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + } + if (error_code == DPE_SUCCESS) + { + dp_enc_program_nvm_block(0U); + } + } + #endif + #ifdef NVM_PLAIN + /* Plain text support */ + if ((dat_support_status & NVM0_DAT_ENCRYPTION_BIT) == 0u) + { + if (((device_family & SFS_BIT) == SFS_BIT) && ((hardware_interface == GPIO_SEL) || (enable_mss_support))) + { + dp_program_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + } + } + if (error_code == DPE_SUCCESS) + { + dp_program_nvm_block(0u); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(0u); + } + } + } + #endif + } + if ((device_family & SFS_BIT) != SFS_BIT) + { + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM1_DAT_SUPPORT_BIT) + { + /* Encryption support */ + #ifdef NVM_ENCRYPT + if (dat_support_status & NVM1_DAT_ENCRYPTION_BIT) + { + dp_enc_program_nvm_block(1u); + } + #endif + #ifdef NVM_PLAIN + /* Plain text support */ + if ((dat_support_status & NVM1_DAT_ENCRYPTION_BIT) == 0u) + { + dp_program_nvm_block(1u); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(1u); + } + } + #endif + } + } + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM2_DAT_SUPPORT_BIT) + { + #ifdef NVM_ENCRYPT + /* Encryption support */ + if (dat_support_status & NVM2_DAT_ENCRYPTION_BIT) + { + dp_enc_program_nvm_block(2u); + } + #endif + #ifdef NVM_PLAIN + /* Plain text support */ + if ((dat_support_status & NVM2_DAT_ENCRYPTION_BIT) == 0u) + { + dp_program_nvm_block(2u); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(2u); + } + } + #endif + } + } + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM3_DAT_SUPPORT_BIT) + { + #ifdef NVM_ENCRYPT + /* Encryption support */ + if (dat_support_status & NVM3_DAT_ENCRYPTION_BIT) + { + dp_enc_program_nvm_block(3u); + } + #endif + #ifdef NVM_PLAIN + /* Plain text support */ + if ((dat_support_status & NVM3_DAT_ENCRYPTION_BIT) == 0u) + { + dp_program_nvm_block(3u); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(3u); + } + } + #endif + } + } + } + return; +} + +void dp_program_nvm_private_clients_action(void) +{ + if (((device_family & SFS_BIT) == SFS_BIT) && (hardware_interface == IAP_SEL)) + { + dp_initialize_access_nvm(); + } + + if (dat_support_status & NVM0_DAT_SUPPORT_BIT) + { + #ifdef NVM_ENCRYPT + /* Encryption support */ + if (dat_support_status & NVM0_DAT_ENCRYPTION_BIT) + { + dp_enc_program_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + } + #endif + #ifdef NVM_PLAIN + /* Plain text support */ + if ((dat_support_status & NVM0_DAT_ENCRYPTION_BIT) == 0u) + { + dp_program_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + } + } + #endif + } + return; +} + +#ifdef NVM_PLAIN +void dp_verify_nvm_private_clients_action(void) +{ + if (((device_family & SFS_BIT) == SFS_BIT) && (hardware_interface == IAP_SEL)) + { + dp_initialize_access_nvm(); + } + if (dat_support_status & NVM0_DAT_SUPPORT_BIT) + { + if ((dat_support_status & NVM0_DAT_ENCRYPTION_BIT) == 0u) + { + dp_verify_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + } + } + return; +} + +void dp_verify_nvm_action(void) +{ + if (((device_family & SFS_BIT) == SFS_BIT) && (hardware_interface == IAP_SEL)) + { + dp_initialize_access_nvm(); + } + if (dat_support_status & NVM0_DAT_SUPPORT_BIT) + { + if ((dat_support_status & NVM0_DAT_ENCRYPTION_BIT) == 0u) + { + if (((device_family & SFS_BIT) == SFS_BIT) && ((hardware_interface == GPIO_SEL) || (enable_mss_support))) + { + dp_verify_nvm_block(PRIVATE_CLIENT_PHANTOM_BLOCK); + } + if (error_code == DPE_SUCCESS) + { + dp_verify_nvm_block(0u); + } + } + } + if ((device_family & SFS_BIT) != SFS_BIT) + { + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM1_DAT_SUPPORT_BIT) + { + if ((dat_support_status & NVM1_DAT_ENCRYPTION_BIT) == 0u) + { + dp_verify_nvm_block(1u); + } + } + } + + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM2_DAT_SUPPORT_BIT) + { + if ((dat_support_status & NVM2_DAT_ENCRYPTION_BIT) == 0u ) + { + dp_verify_nvm_block(2u); + } + } + } + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & NVM3_DAT_SUPPORT_BIT) + { + if ((dat_support_status & NVM3_DAT_ENCRYPTION_BIT) == 0u ) + { + dp_verify_nvm_block(3u); + } + } + } + } + return; +} +#endif + +void dp_check_device_and_rev(void) +{ + dp_get_bytes(UKEY_ID,0u,1u); + if (return_bytes) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: This action is not supported with security programming enabled in the data file."); + #endif + error_code = DPE_ACTION_NOT_FOUND; + } + else + { + /* Case 1: if device is AFS600 and rev is 2, then fail.*/ + if ( ( (device_ID == AFS600_ID) && (device_rev == 2u) ) || + /* Case 2: if device is AFS1500 and rev is 0 then fail. + or device is AFS1500 and rev == 2 and NVM block 3 is enabled, then fail.*/ + ( (device_ID == AFS1500_ID) && ((device_rev == 0u) || + ( (device_rev == 2u) && (dat_support_status & NVM3_DAT_SUPPORT_BIT) )) ) + ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: This action is not supported in this revision of the silicon."); + #endif + error_code = DP_READ_IDCODE_ACTION_CODE; + } + } + return; +} +#endif +/*****************************************************************************/ + +/*****************************************************************************/ +/* PLAIN Programming Support Functions */ +/*****************************************************************************/ +#ifdef NVM_PLAIN +void dp_program_nvm_block(DPUCHAR BlockNum) +{ + DPUINT Page_number; + DPULONG SizeIndex; + + + /* Get how many partitions are in the code */ + /* Need to identify if the data is present for the private client support on smart fusion since + there is no dedicated support bit for it to indicate if the data is present in the file or not. */ + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + NumOfPart = (DPUINT) dp_get_bytes(NumOfPartPriv_all_ID,0u, 2u); + } + else + { + NumOfPart = (DPUINT) dp_get_bytes(NumOfPart_ID+BlockNum*NVM_OFFSET,0u, 2u); + } + if (NumOfPart) + { + #ifdef ENABLE_DISPLAY + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + dp_display_text("\r\nProgram System Init and Boot Clients..."); + } + else + { + dp_display_text("\r\nProgramming NVM block "); + dp_display_value((DPULONG)BlockNum,DEC); + } + #endif + + DataIndex = 0u; + + /* Go through all the partions in the file */ + for (Par=0u ; Par < NumOfPart; Par++) + { + /* Get partition size and protection */ + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + ParSize = dp_get_bytes (NvmParSizePriv_all_ID,(Par*32u) >> 3u, 4u); + Protection = (DPUCHAR) dp_get_bytes(NvmProtectPriv_all_ID,(Par*3u) >> 3u, 1u) << 2u; + } + else + { + ParSize = dp_get_bytes (NvmParSize_ID + BlockNum*NVM_OFFSET,(Par*32u) >> 3u, 4u); + Protection = (DPUCHAR) dp_get_bytes(NvmProtect_ID + BlockNum*NVM_OFFSET,(Par*3u) >> 3u, 1u) << 2u; + } + + dp_flush_global_buf2(); + /* Get the starting address of the partition */ + /* 22 is the number of bits per one address */ + /* Par*22 >> 8 is the location of the first byte of the address + in the data block*/ + /* The number of bytes to get could be 3 or 4 depending on whether the + bits span over 3 or 4 bytes + (par*22) & 7 is the number of bits that need to be shifted to get to + the first valid bit in the address. + Ex: for par=1, it is equal to 6. + We add 22 to this value, then the integer value of adding 7 and divide + the total by 8 will get the us the number of bytes needed. + >> ((Par*22) & 7) lines up the address so that it always starts from + bit postion 0 */ + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + global_ulong1 = dp_get_bytes (NvmAddrPriv_all_ID,(Par*22u) >> 3u, (DPUCHAR) ((((Par*22u) & 7u) + 22u + 7u) >> 3u)) >> ((Par*22u) & 7u) ; + } + else + { + global_ulong1 = dp_get_bytes (NvmAddr_ID + BlockNum*NVM_OFFSET,(Par*22u) >> 3u, (DPUCHAR) ((((Par*22u) & 7u) + 22u + 7u) >> 3u)) >> ((Par*22u) & 7u) ; + } + /* global_buf2 holds the starting address of the NVM partition */ + global_buf2[1] = (DPUCHAR) (global_ulong1 << 5u) | 0x10u; + global_buf2[2] = (DPUCHAR) (global_ulong1 >> 3u); + global_buf2[3] = (DPUCHAR) (global_ulong1 >> 11u); + global_buf2[4] = (DPUCHAR) (global_ulong1 >> 19u); + Page_number = (DPUINT)(global_buf2[2] >> 5u); + Page_number |= (DPUINT) (global_buf2[3] << 3u); + Page_number |= (DPUINT) ((global_buf2[4] & 0x1) << 11u); + + /* Load NVM Address */ + opcode = NVM_ADDRESS_SHIFT; + IRSCAN_in(); + DRSCAN_in(0u, NVM_ADDRESS_LENGTH, global_buf2); + goto_jtag_state(JTAG_RUN_TEST_IDLE,NVM_ADDRESS_SHIFT_CYCLES); + dp_delay(NVM_ADDRESS_SHIFT_DELAY); + + /* Perform address polling */ + for ( global_ulong1 = 1u; + global_ulong1 <= MAX_LOAD_NVM_ADDRESS_POLL; + global_ulong1++ ) + { + DRSCAN_out(NVM_ADDRESS_LENGTH, global_buf2, global_buf1); + if ((global_buf1[4] & 0x4u) == 0u) + { + break; + } + + opcode = NVM_ADDRESS_SHIFT; + IRSCAN_in(); + DRSCAN_in(0u, NVM_ADDRESS_LENGTH, global_buf2); + goto_jtag_state(JTAG_PAUSE_DR,NVM_ADDRESS_SHIFT_CYCLES); + dp_delay(NVM_ADDRESS_SHIFT_POLL_DELAY); + } + if (global_ulong1 > MAX_LOAD_NVM_ADDRESS_POLL) + { + error_code = DPE_POLL_ERROR; + /* This is needed to terminate the first loop */ + Par = NumOfPart; + } + + + if (error_code == DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProgramming eNVM partition "); + dp_display_value((DPULONG)Par,DEC); + old_progress = 0; + #endif + for (SizeIndex=1u; SizeIndex <= (DPULONG)ParSize ;SizeIndex++) + { + /* Load the data */ + + #ifdef ENABLE_DISPLAY + new_progress = SizeIndex * 100 / ParSize; + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + opcode = NVM_DATA_SHIFT; + IRSCAN_in(); + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + dp_get_and_DRSCAN_in(NvmDataPriv_all_ID, NVM_DATA_LENGTH, DataIndex); + } + else + { + dp_get_and_DRSCAN_in(NvmData_ID+BlockNum*NVM_OFFSET, NVM_DATA_LENGTH, DataIndex); + } + + goto_jtag_state(JTAG_RUN_TEST_IDLE,NVM_DATA_SHIFT_CYCLES); + dp_delay(NVM_DATA_SHIFT_DELAY); + DataIndex = DataIndex + NVM_DATA_LENGTH; + + if ((SizeIndex % NVM_DATA_LENGTH) == 0u) + { + opcode = NVM_PROGRAM; + IRSCAN_in(); + DRSCAN_in(0u, 5u, &Protection); + goto_jtag_state(JTAG_RUN_TEST_IDLE,NVM_PROGRAM_CYCLES); + dp_delay(NVM_PROGRAM_POLL_DELAY); + + /* Perform NVM Program polling */ + for ( global_ulong1 = 1u; + global_ulong1 <= MAX_LOAD_NVM_ADDRESS_POLL; + global_ulong1++ ) + { + + DRSCAN_out(5u, &Protection, &global_uchar1); + if ( ((global_uchar1 & 0x1cu) == 0u) || ((global_uchar1 & 0x1cu) == 0xcu) ) + { + break; + } + opcode = NVM_PROGRAM; + IRSCAN_in(); + DRSCAN_in(0u, 5u, &Protection); + goto_jtag_state(JTAG_PAUSE_DR,NVM_PROGRAM_CYCLES); + dp_delay(NVM_PROGRAM_POLL_DELAY); + } + + #ifdef ENABLE_DISPLAY + if ((global_uchar1 & 0xcu) == 0xcu) + { + dp_display_text("\r\nWARNING: Write count threshold exceeded. Page "); + dp_display_value(Page_number,DEC); + dp_display_text(", Block "); + dp_display_value(BlockNum,DEC); + } + #endif + + + if (global_ulong1 > MAX_LOAD_NVM_ADDRESS_POLL) + { + error_code = DPE_POLL_ERROR; + /* This is needed to terminate the first loop */ + Par = NumOfPart; + break; + } + Page_number++; + } + } + + if (error_code != DPE_SUCCESS) + { + break; + } + } + } + } + + return; +} + +void dp_verify_nvm_block(DPUCHAR BlockNum) +{ + DPUINT PageAddress; + DPULONG TmpData; + DPUCHAR offset; + DPULONG SizeIndex; + + + + /* Get how many partitions are in the code */ + /* Need to identify if the data is present for the private client support on smart fusion since + there is no dedicated support bit for it to indicate if the data is present in the file or not. */ + + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + NumOfPart = (DPUINT) dp_get_bytes(NumOfPartPriv_all_ID,0u,2u); + } + else + { + NumOfPart = (DPUINT) dp_get_bytes(NumOfPart_ID+BlockNum*NVM_OFFSET,0u,2u); + } + if (NumOfPart) + { + #ifdef ENABLE_DISPLAY + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + dp_display_text("\r\nVerify System Init and Boot Clients..."); + } + else + { + dp_display_text("\r\nVerifying NVM block "); + dp_display_value((DPULONG)BlockNum,DEC); + } + #endif + + + DataIndex = 0u; + + /* Go through all the partions in the file */ + for (Par=0u; Par < NumOfPart; Par++) + { + /* Get the starting address of the partition */ + /* 22 is the number of bits per one address */ + /* Par*22 >> 8 is the location of the first byte of the address in the data block*/ + /* The number of bytes to get could be 3 or 4 depending on wether the bits span over 3 or 4 bytes + (par*22) & 7 is the number of bits that need to be shifted to get to the first valid bit in the address. + Ex: for par=1, it is equal to 6. + We add 22 to this value, then the integer value of adding 7 and divide the total by 8 will get the us the number of bytes needed. + >> ((Par*22) & 7) lines up the address so that it always starts from bit postion 0 + */ + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + global_ulong1 = dp_get_bytes (NvmAddrPriv_all_ID,(Par*22u) >> 3u,(DPUCHAR)((((Par*22u) & 7u) + 22u + 7u) >> 3u)) >> ((Par*22u) & 7u) ; + } + else + { + global_ulong1 = dp_get_bytes (NvmAddr_ID + BlockNum*NVM_OFFSET,(Par*22u) >> 3u,(DPUCHAR)((((Par*22u) & 7u) + 22u + 7u) >> 3u)) >> ((Par*22u) & 7u) ; + } + + PageAddress = global_ulong1 >> 8u; /* 14 bit long */ + offset = 0u; /* 5 bit long */ + /* Get partition size */ + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + ParSize = dp_get_bytes(NvmParSizePriv_all_ID,(Par*32u) >> 3u,4u); + } + else + { + ParSize = dp_get_bytes(NvmParSize_ID+BlockNum*NVM_OFFSET,(Par*32u) >> 3u,4u); + } + #ifdef ENABLE_DISPLAY + old_progress = 0; + dp_display_text("\r\nVerifying eNVM partition "); + dp_display_value((DPULONG)Par,DEC); + #endif + for (SizeIndex=0u; SizeIndex < (DPULONG) ParSize ;SizeIndex++) + { + #ifdef ENABLE_DISPLAY + new_progress = SizeIndex * 100 / ParSize; + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + + if (((SizeIndex % NVM_DATA_LENGTH) == 0u) && SizeIndex) + { + PageAddress++; + for (global_uchar1 = 0u; global_uchar1 < 32u; global_uchar1 ++) + { + opcode = NVM_READ; + IRSCAN_in(); + DRSCAN_in(0u, NVM_ADDRESS_LENGTH, (DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,NVM_READ_CYCLES); + } + } + + dp_flush_global_buf2(); + + /* global_buf2 holds the starting address of the NVM partition */ + /* Bit 7 needs to be replaced. */ + global_buf2[1] |= 0x10u; /* 32 Bit word addressing */ + global_buf2[1] &= 0x7Fu; /* This is to maintaing bit values 13 and 14 */ + global_buf2[1] |= (DPUCHAR) (offset << 7u); /* Overwrite offset */ + global_buf2[2] = offset >> 1u; + global_buf2[2] &= 0xfu; /* Overwrite offset */ + global_buf2[2] |= (DPUCHAR) (PageAddress << 5u); /* Overwrite PageAddress */ + global_buf2[3] = (DPUCHAR)(PageAddress >> 3u); /* Overwrite PageAddress */ + global_buf2[4] = (DPUCHAR)(PageAddress >> 11u); /* Overwrite PageAddress */ + + /* Load NVM Address */ + opcode = NVM_ADDRESS_SHIFT; + IRSCAN_in(); + DRSCAN_in(0u, NVM_ADDRESS_LENGTH, global_buf2); + goto_jtag_state(JTAG_RUN_TEST_IDLE,NVM_ADDRESS_SHIFT_CYCLES); + dp_delay(NVM_ADDRESS_SHIFT_DELAY); + + /* Perform address polling */ + for ( global_ulong1 = 0u; global_ulong1 <= MAX_LOAD_NVM_ADDRESS_POLL; global_ulong1++ ) + { + dp_delay(NVM_ADDRESS_SHIFT_POLL_DELAY); + DRSCAN_out(NVM_ADDRESS_LENGTH, global_buf2, global_buf1); + if ((global_buf1[4] & 0x6u) == 0u) + { + break; + } + } + if (global_ulong1 > MAX_LOAD_NVM_ADDRESS_POLL) + { + error_code = DPE_POLL_ERROR; + /* This is needed to terminate the first loop */ + Par = NumOfPart; + break; + } + + + /* Read the Data */ + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + TmpData = dp_get_bytes(NvmDataPriv_all_ID, DataIndex >> 3u, 4u); + } + else + { + TmpData = dp_get_bytes(NvmData_ID+BlockNum*NVM_OFFSET, DataIndex >> 3u, 4u); + } + opcode = NVM_READ; + IRSCAN_in(); + DRSCAN_in(0u, NVM_ADDRESS_LENGTH, (DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,NVM_READ_CYCLES); + dp_delay(NVM_READ_DELAY); + + for ( global_ulong1 = 0u; global_ulong1 <= MAX_NVM_READ_POLL; global_ulong1++ ) + { + DRSCAN_out(NVM_ADDRESS_LENGTH, (DPUCHAR*)DPNULL, global_buf1); + + if (TmpData == ( ((DPULONG)global_buf1[0] | + ((DPULONG)global_buf1[1] << 8u) | + ((DPULONG)global_buf1[2] << 16u) | + ((DPULONG)global_buf1[3] << 24u) ) ) ) + { + break; + } + } + + /* Second contion is to check for NVM_status condition of 10 where two or more errors are detected */ + if ((global_ulong1 > MAX_LOAD_NVM_ADDRESS_POLL) || ((global_buf1[4] & 0x3) == 0x2)) + { + error_code = DPE_POLL_ERROR; + /* This is needed to terminate the first loop */ + Par = NumOfPart; + SizeIndex = ParSize; + } + + + offset ++; + DataIndex = DataIndex + 32u; + } + + + } + } + + return; +} + + +void dp_verify_calibration(void) +{ + DPUINT StartPageAddress; + DPUINT EndPageAddress; + DPUCHAR offset; + + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nChecking for Calibration data... "); + #endif + + global_buf2[0] = NVM_TAG_ADDRESS_BYTE0; + global_buf2[1] = NVM_TAG_ADDRESS_BYTE1; + global_buf2[2] = NVM_TAG_ADDRESS_BYTE2; + global_buf2[3] = NVM_TAG_ADDRESS_BYTE3; + global_buf2[4] = NVM_TAG_ADDRESS_BYTE4; + + /* Load NVM TAG Address */ + opcode = NVM_ADDRESS_SHIFT; + IRSCAN_in(); + DRSCAN_in(0u, NVM_ADDRESS_LENGTH, global_buf2); + goto_jtag_state(JTAG_RUN_TEST_IDLE,NVM_ADDRESS_SHIFT_CYCLES); + dp_delay(NVM_ADDRESS_SHIFT_DELAY); + + for ( global_ulong1 = 0u; global_ulong1 <= MAX_LOAD_NVM_ADDRESS_POLL; global_ulong1++ ) + { + dp_delay(NVM_ADDRESS_SHIFT_POLL_DELAY); + DRSCAN_out(NVM_ADDRESS_LENGTH, global_buf2, global_buf1); + if ((global_buf1[4] & 0x6u) == 0u) + { + break; + } + } + if (global_ulong1 > MAX_LOAD_NVM_ADDRESS_POLL) + { + error_code = DPE_POLL_ERROR; + } + else + { + /* Read the Data */ + opcode = NVM_READ; + IRSCAN_in(); + DRSCAN_in(0u, NVM_ADDRESS_LENGTH, (DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,NVM_READ_CYCLES); + dp_delay(NVM_READ_DELAY); + dp_flush_global_buf1(); + DRSCAN_out(NVM_ADDRESS_LENGTH, (DPUCHAR*)DPNULL, global_buf1); + if ( (global_buf1[0] == (DPUCHAR)'C') && ((global_buf1[1] == (DPUCHAR)'A') || (global_buf1[1] == (DPUCHAR)'B')) ) + { + device_family |= CALIBRATION_BIT; + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDevice is calibrated..."); + #endif + } + + if (device_family & CALIBRATION_BIT) + { + + NumOfPart = (DPUINT) dp_get_bytes(NumOfPart_ID,0u,2u); + DataIndex = 0u; + + /* Go through all the partions in the file */ + for (Par=0u;Par < NumOfPart; Par++) + { + global_ulong1 = dp_get_bytes(NvmAddr_ID,(Par*22u) >> 3u,(DPUCHAR)((((Par*22u) & 7u) + 22u + 7u) >> 3u)) >> ((Par*22u) & 7u) ; + StartPageAddress = global_ulong1 >> 8u; /* 14 bit long */ + offset = (DPUCHAR) (global_ulong1 & 0x7fu); + + /* Get partition size */ + ParSize = dp_get_bytes(NvmParSize_ID,(Par*32u) >> 3u,4u); + EndPageAddress = StartPageAddress + ((ParSize + offset + 31u) / 32u ) - 1u; + if ( (EndPageAddress >= 2098u) && (StartPageAddress <=2110u) ) + { + error_code = CALIBRATION_OVERLAP_ERROR; + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nCalibration overlap detected..."); + #endif + } + } + } + } + + + return; +} +#endif +/************************************************************************************************/ + +/************************************************************************************************/ +/* Encrypted Programming Support Functions */ +/************************************************************************************************/ +#ifdef NVM_ENCRYPT +void dp_enc_program_nvm_block(DPUCHAR BlockNum) +{ + DPUINT NvmProtIndex=0u; + DPUINT i; + DPUINT j; + #ifdef USE_PAGING + DPUCHAR NvmProtData[PAGE_BUFFER_SIZE]; + DPULONG NvmProtDataStartIndex; + DPULONG NvmProtDataEndIndex; + DPULONG NvmProtDataCurrentIndex; + #endif + + + + /* Get how many partitions are in the code */ + /* Need to identify if the data is present for the private client support on smart fusion since + there is no dedicated support bit for it to indicate if the data is present in the file or not. */ + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + NumOfPart = (DPUINT) dp_get_bytes(NumOfPartPriv_all_ID,0u,2u); + } + else + { + NumOfPart = (DPUINT) dp_get_bytes(NumOfPart_ID+BlockNum*NVM_OFFSET,0u,2u); + } + + if (NumOfPart) + { + #ifdef ENABLE_DISPLAY + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + dp_display_text("\r\nProgram System Init and Boot Clients..."); + } + else + { + dp_display_text("\r\nProgramming NVM block "); + dp_display_value((DPULONG)BlockNum,DEC); + } + #endif + + if (device_family & DUAL_KEY_BIT) + { + + global_uchar1 = 0u; + dp_set_aes_mode(); + + + } + + DataIndex = 0u; + + #ifdef USE_PAGING + NvmProtDataStartIndex = 0u; + NvmProtDataEndIndex = 0u; + #endif + + for (Par=0u;Par < NumOfPart; Par++) + { + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + ParSize = dp_get_bytes(NvmParSizePriv_all_ID,(Par*32u) >> 3u,4u); + } + else + { + ParSize = dp_get_bytes(NvmParSize_ID+BlockNum*NVM_OFFSET,(Par*32u) >> 3u,4u); + } + + dp_init_aes(); + + ParSize /= 32u; + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProgramming eNVM partition "); + dp_display_value((DPULONG)Par,DEC); + old_progress = 0; + #endif + for (i = 1u; i <= ParSize; i++) + { + #ifdef ENABLE_DISPLAY + new_progress = i * 100 / ParSize; + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + + /* Another buffer is needed to minimize paging. This buffer contains + page protection data */ + #ifdef USE_PAGING + /* if the local protection buffer is empty, fill it. This step needs to + be done here. This is because if data is filled first, it will be dumpped + after loading the first page. */ + if ( (NvmProtDataStartIndex == 0u) && (NvmProtDataEndIndex == 0u) ) + { + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + dp_get_data(NvmProtectPriv_all_ID,NvmProtIndex); + } + else + { + dp_get_data(NvmProtect_ID + BlockNum*NVM_OFFSET,NvmProtIndex); + } + for (NvmProtDataCurrentIndex = 0u; NvmProtDataCurrentIndex < return_bytes; NvmProtDataCurrentIndex++) + { + NvmProtData[NvmProtDataCurrentIndex] = page_global_buffer[NvmProtDataCurrentIndex]; + } + NvmProtDataStartIndex = NvmProtIndex / 8; + NvmProtDataEndIndex = NvmProtDataStartIndex + return_bytes; + } + #endif + for (j=0u; j <= 15u;j++) + { + opcode = NVM_DATA_SHIFT_ENC; + IRSCAN_in(); + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + dp_get_and_DRSCAN_in_out(NvmDataPriv_all_ID,128u,DataIndex,global_buf1); + } + else + { + dp_get_and_DRSCAN_in_out(NvmData_ID + BlockNum*NVM_OFFSET,128u,DataIndex,global_buf1); + } + goto_jtag_state(JTAG_RUN_TEST_IDLE,NVM_DATA_SHIFT_ENC_CYCLES); + dp_delay(NVM_DATA_SHIFT_ENC_DELAY); + DataIndex = DataIndex + 128u; + /* Ignore the first shift out. It is not valid */ + if ((j != 0u) && (global_buf1[0] & 0x13u)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\n\rEmbedded Flash Memory Block (EFMB) failure."); + #endif + error_code = DPE_NVM_PROGRAM_ERROR; + break; + } + } + /* Checking the status of the last 15 bytes loaded into eNVM */ + DRSCAN_out(128u,(DPUCHAR *)DPNULL, global_buf1); + if (global_buf1[0] & 0x13u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\n\rEmbedded Flash Memory Block (EFMB) failure."); + #endif + error_code = DPE_NVM_PROGRAM_ERROR; + } + + if (error_code == DPE_SUCCESS) + { + opcode = NVM_PROGRAM_ENC; + IRSCAN_in(); + + + + #ifdef USE_PAGING + if ( ( (NvmProtIndex / 8u) + 16u) > NvmProtDataEndIndex ) + { + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + dp_get_data(NvmProtectPriv_all_ID,NvmProtIndex); + } + else + { + dp_get_data(NvmProtect_ID + BlockNum*NVM_OFFSET,NvmProtIndex); + } + for (NvmProtDataCurrentIndex = 0u; NvmProtDataCurrentIndex < return_bytes; NvmProtDataCurrentIndex++) + { + NvmProtData[NvmProtDataCurrentIndex] = page_global_buffer[NvmProtDataCurrentIndex]; + } + NvmProtDataStartIndex = NvmProtIndex / 8u; + NvmProtDataEndIndex = NvmProtDataStartIndex + return_bytes; + } + + DRSCAN_out(128u,&NvmProtData[NvmProtIndex / 8u - NvmProtDataStartIndex],global_buf1); + #else + if (BlockNum == PRIVATE_CLIENT_PHANTOM_BLOCK) + { + dp_get_and_DRSCAN_in_out(NvmProtectPriv_all_ID,128u,NvmProtIndex,global_buf1); + } + else + { + dp_get_and_DRSCAN_in_out(NvmProtect_ID + BlockNum*NVM_OFFSET,128u,NvmProtIndex,global_buf1); + } + #endif + goto_jtag_state(JTAG_RUN_TEST_IDLE,NVM_PROGRAM_ENC_CYCLES); + dp_delay(NVM_PROGRAM_POLL_DELAY); + + for ( global_ulong1 = 1u; global_ulong1 <= MAX_LOAD_NVM_ADDRESS_POLL; global_ulong1++ ) + { + DRSCAN_out(128u,(DPUCHAR *)DPNULL,global_buf1); + if (( global_buf1[0] & 0x3u ) == 0u ) + { + break; + } + goto_jtag_state(JTAG_PAUSE_DR,NVM_PROGRAM_ENC_CYCLES); + dp_delay(NVM_PROGRAM_POLL_DELAY); + opcode = NVM_PROGRAM_ENC; + IRSCAN_in(); + } + + if (global_ulong1 > MAX_LOAD_NVM_ADDRESS_POLL) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\n\rError programming Embedded Flash Memory Block (EFMB)."); + #endif + + error_code = DPE_POLL_ERROR; + Par = NumOfPart; + i = ParSize; + } + + #ifdef ENABLE_DISPLAY + /* Check for programming cycle over count */ + if ((global_buf1[0] & 0xcu) == 0xcu) + { + dp_display_text("\r\nWARNING: Write count threshold exceeded. "); + } + #endif + + /* Check for MAC bit */ + dp_exe_authentication(); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\n\rEmbedded Flash Memory Block (EFMB) MAC failure."); + #endif + error_code = DPE_NVM_PROGRAM_ERROR; + Par = NumOfPart; + i = ParSize; + } + /* Check for cycle overcount */ + + NvmProtIndex = NvmProtIndex + 128u; + } + } + } + } + + return; +} + +#endif +void dp_initialize_access_nvm(void) +{ + + /* global_uchar2 is a global variable used to clock the data into the device with access_nvm instruction */ + global_uchar2 = (DPUCHAR) ((dat_support_status >> 3u) & 0xFu); + + global_uchar2 |= FORCE_NVM_ACCESS << 4u; + + /* Load access_nvm instruction and data */ + opcode = ACCESS_NVM; + IRSCAN_in(); + DRSCAN_in(0u, ACCESS_NVM_BIT_LENGTH, (&global_uchar2)); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ACCESS_NVM_CYCLES); + dp_delay(ACCESS_NVM_DELAY); + + error_code = DPE_NVM_ACCESS_ERROR; + for ( global_ulong1 = 0u; global_ulong1 <= MAX_ATTEMPT_NVM_ACCESS; global_ulong1++ ) + { + DRSCAN_out(ACCESS_NVM_BIT_LENGTH, (DPUCHAR*)DPNULL, &global_uchar1); + /* 0xF is to include access_nvm_bits only and skip force access nvm bit */ + if ((global_uchar1 & 0xF) != 0u ) + { + dp_delay(ACCESS_NVM_POLL_DELAY); + opcode = ACCESS_NVM; + IRSCAN_in(); + DRSCAN_in(0u, ACCESS_NVM_BIT_LENGTH, (&global_uchar2)); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ACCESS_NVM_CYCLES); + dp_delay(ACCESS_NVM_DELAY); + } + else + { + error_code = DPE_SUCCESS; + break; + } + } + + if (error_code != DPE_SUCCESS) + { + dp_exit_access_nvm(); + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to access Embedded Flash Memory. \r\nnvmBusy: "); + dp_display_value(global_uchar1,HEX); + dp_display_text("\r\nnvmAccess: "); + dp_display_value(global_uchar2,HEX); + #endif + } + + + #ifdef NVM_ENCRYPT + if (error_code == DPE_SUCCESS) + { + if ( + ( Action_code == DP_PROGRAM_NVM_ACTIVE_ARRAY_ACTION_CODE ) || + ( Action_code == DP_VERIFY_NVM_ACTIVE_ARRAY_ACTION_CODE ) || + ( Action_code == DP_PROGRAM_PRIVATE_CLIENTS_ACTIVE_ARRAY_ACTION_CODE ) || + ( Action_code == DP_VERIFY_PRIVATE_CLIENTS_ACTIVE_ARRAY_ACTION_CODE ) + ) + { + + global_uchar1 = 0u; + /* This is to determine if there is a valid kdata in the data file. + In the case of Dual key plain programming, the encryption status bits are set + in the DirectC code to use the encryption functions. In this case, kdata + verification is called although it does not exit. */ + for (global_uint1 = 0u; global_uint1 < 16u; global_uint1++) + { + global_uchar1 |= (DPUCHAR) dp_get_bytes(KDATA_ID,(DPULONG)global_uint1,1u); + } + + + if (return_bytes && (global_uchar1 != 0u)) + { + dp_verify_enc_key(); + } + } + } + #endif + + return; +} + +void dp_exit_access_nvm(void) +{ + opcode = ACCESS_NVM; + IRSCAN_in(); + DRSCAN_in(0u, ACCESS_NVM_BIT_LENGTH, (DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE, ACCESS_NVM_CYCLES); + dp_delay(ACCESS_NVM_DELAY); + return; +} + +#endif + +#endif /* End of ENABLE_G3_SUPPORT */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpnvm.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpnvm.h new file mode 100644 index 0000000..250e551 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpnvm.h @@ -0,0 +1,158 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpnvm.h */ +/* */ +/* Description: Contains the function prototypes. */ +/* */ +/* ************************************************************************ */ +#ifndef INC_DPNVM_H +#define INC_DPNVM_H + +#ifdef NVM_SUPPORT +#define PRIVATE_CLIENT_PHANTOM_BLOCK 5u +/****************************************************************************/ +/* NVM Opcodes */ +/****************************************************************************/ +#define NVM_ADDRESS_SHIFT 0xB8u +#define NVM_DATA_SHIFT 0xB9u +#define NVM_PROGRAM 0xBAu +#define NVM_READ 0xB7u +#define ACCESS_NVM 0xB6u + +#define NVM_DATA_SHIFT_ENC 0xCu +#define NVM_PROGRAM_ENC 0xDu + +/****************************************************************************/ +/* NVM Register length and parameters */ +/****************************************************************************/ +#define MAX_LOAD_NVM_ADDRESS_POLL 10000u +#define MAX_NVM_READ_POLL 10000u +#define NVM_ADDRESS_LENGTH 35u +#define NVM_DATA_LENGTH 32u +#define ACCESS_NVM_BIT_LENGTH 5u +#define MAX_ATTEMPT_NVM_ACCESS 100u + +/****************************************************************************/ +/* NVM Calibration Tag Address and data */ +/****************************************************************************/ +#define NVM_TAG_ADDRESS_BYTE0 0x00u +#define NVM_TAG_ADDRESS_BYTE1 0x10u +#define NVM_TAG_ADDRESS_BYTE2 0x40u +#define NVM_TAG_ADDRESS_BYTE3 0x06u +#define NVM_TAG_ADDRESS_BYTE4 0x01u +#define NVM_TAG_DATA1_BYTE0 0x43u +#define NVM_TAG_DATA1_BYTE1 0x41u +#define NVM_TAG_DATA2_BYTE0 0x43u +#define NVM_TAG_DATA2_BYTE1 0x42u + +/* NVM delay and cycle parameters */ +#define ACCESS_NVM_CYCLES 3u +#define ACCESS_NVM_DELAY 3u +#define ACCESS_NVM_POLL_DELAY 100u +#define NVM_ADDRESS_SHIFT_CYCLES 3u +#define NVM_ADDRESS_SHIFT_DELAY 20u +#define NVM_ADDRESS_SHIFT_POLL_CYCLES 3u +#define NVM_ADDRESS_SHIFT_POLL_DELAY 100u +#define NVM_DATA_SHIFT_CYCLES 3u +#define NVM_DATA_SHIFT_DELAY 6u +#define NVM_PROGRAM_CYCLES 3u +#define NVM_PROGRAM_POLL_DELAY 100u +#define NVM_READ_CYCLES 3u +#define NVM_READ_DELAY 30u +#define NVM_DATA_SHIFT_ENC_CYCLES 3u +#define NVM_DATA_SHIFT_ENC_DELAY 46u +#define NVM_PROGRAM_ENC_CYCLES 3u +#define NVM_PROGRAM_ENC_DELAY 11535u + +/****************************************************************************/ +/* Function prototypes */ +/****************************************************************************/ +void dp_program_nvm_block(DPUCHAR BlockNum); +void dp_verify_nvm_block(DPUCHAR BlockNum); +void dp_enc_program_nvm_block(DPUCHAR BlockNum); +void dp_verify_nvm_action(void); +void dp_verify_nvm_private_clients_action(void); +void dp_program_nvm_action(void); +void dp_program_nvm_private_clients_action(void); +void dp_verify_calibration(void); +void dp_check_device_and_rev(void); +void dp_initialize_access_nvm(void); +void dp_exit_access_nvm(void); +#endif +#endif /* INC_DPNVM_H */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpsecurity.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpsecurity.c new file mode 100644 index 0000000..502b918 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpsecurity.c @@ -0,0 +1,806 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpsecurity.c */ +/* */ +/* Description: Contains initialization and data checking functions. */ +/* */ +/* ************************************************************************ */ + +#include "dpuser.h" +#ifdef ENABLE_G3_SUPPORT + +#include "dputil.h" +#include "dpalg.h" +#include "dpG3alg.h" +#include "dpsecurity.h" +#include "dpcom.h" +#include "dpjtag.h" + +#ifdef SECURITY_SUPPORT +/*****************************************************************************/ +/* NVM Action Functions */ +/*****************************************************************************/ +#ifndef DISABLE_SEC_SPECIFIC_ACTIONS +void dp_erase_security_action(void) +{ + device_security_flags |= IS_ERASE_ONLY; + device_security_flags |= IS_RESTORE_DESIGN; + dp_erase_security(); + return; +} + +void dp_program_security_action(void) +{ + dp_erase_security(); + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & SEC_DAT_SUPPORT_BIT) + { + dp_program_security(); + } + } + return; +} + +/*****************************************************************************/ +/* Programming Support Functions */ +/*****************************************************************************/ +void dp_erase_security(void) +{ + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nErase Security..."); + #endif + dp_flush_global_buf1(); + global_buf1[0] = UROW_ERASE_BITS_BYTE0; + global_buf1[1] = UROW_ERASE_BITS_BYTE1; + global_buf1[2] = UROW_ERASE_BITS_BYTE2; + + /* This is for FROM erase. Need to get which bits are set to erase from the data file. */ + global_buf1[0] |= 0xeu; + + dp_exe_erase(); + + + return; +} +#endif + +void dp_program_security(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProgramming Security..."); + #endif + dp_write_sec_key(); + if (error_code == DPE_SUCCESS) + { + if (dat_support_status & AES_DAT_SUPPORT_BIT) + { + dp_write_enc_key(); + } + if (error_code == DPE_SUCCESS) + { + dp_match_security(); + if ((device_security_flags & SEC_KEY_OK) == 0u) + { + error_code = DPE_MATCH_ERROR; + } + else + { + dp_program_ulock(); + } + } + } + + return; +} + + +void dp_write_sec_key(void) +{ + opcode = ISC_PROGRAM_UKEY; + IRSCAN_in(); + dp_get_and_DRSCAN_in(UKEY_ID, UKEY_BIT_LENGTH, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_UKEY_CYCLES); + dp_poll_device(); + + return; +} + +void dp_write_enc_key(void) +{ + + if (device_family & DUAL_KEY_BIT) + { + global_uchar1 = 0u; + dp_set_aes_mode(); + } + + opcode = ISC_PROGRAM_DMK; + IRSCAN_in(); + dp_get_and_DRSCAN_in(DMK_ID, DMK_BIT_LENGTH, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_DMK_CYCLES); + + dp_poll_device(); + if (error_code == DPE_SUCCESS) + { + dp_verify_enc_key(); + } + return; +} + + +void dp_program_ulock(void) +{ + DPUCHAR index; + + + dp_flush_global_buf1(); + + if (device_family & (AFS_BIT | SFS_BIT)) + { + global_uint1 = ULOCK_AFS_BIT_LENGTH; + /* Read security configuration from the data file */ + global_ulong2 = dp_get_bytes(ULOCK_ID,0u, 3u); + /* Set the register content to be loaded into the chip */ + global_buf1[0] = (DPUCHAR) global_ulong2; + global_buf1[1] = (DPUCHAR) ((global_ulong2 >> 8u) | 0x80u); + global_buf1[2] = (DPUCHAR) ((global_ulong2 >> 16u) & 0x3Fu); + global_ulong2 = dp_get_bytes(SILSIG_ID,0u,4u); + global_buf1[3] = (DPUCHAR) global_ulong2; + global_buf1[4] = (DPUCHAR) (global_ulong2 >> 8u); + global_buf1[5] = (DPUCHAR) (global_ulong2 >> 16u); + global_buf1[6] = (DPUCHAR) (global_ulong2 >> 24u); + } + else + { + global_uint1 = ULOCK_A3P_AGL_BIT_LENGTH; + /* Read security configuration from the data file */ + global_ulong2 = dp_get_bytes(ULOCK_ID,0u,2u); + /* Set the register content to be loaded into the chip */ + global_buf1[0] = (DPUCHAR) (global_ulong2 | 0x8u); + global_buf1[1] = (DPUCHAR) ((global_ulong2 >> 8u) & 0xF3u); + global_ulong2 = dp_get_bytes(SILSIG_ID,0u,4u); + global_buf1[1] |= (DPUCHAR) (global_ulong2 << 4u); + global_buf1[2] = (DPUCHAR) (global_ulong2 >> 4u); + global_buf1[3] = (DPUCHAR) (global_ulong2 >> 12u); + global_buf1[4] = (DPUCHAR) (global_ulong2 >> 20u); + global_buf1[5] = (DPUCHAR) (global_ulong2 >> 28u); + } + + opcode = ISC_PROGRAM_SECURITY; + IRSCAN_in(); + DRSCAN_in(0u, global_uint1, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_SECURITY_CYCLES); + + dp_poll_device(); + if (error_code == DPE_SUCCESS) + { + opcode = ISC_QUERY_SECURITY; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_QUERY_SECURITY_CYCLES); + + dp_flush_global_buf2(); + DRSCAN_out(global_uint1, (DPUCHAR*)DPNULL, global_buf2); + if (device_family & (AFS_BIT | SFS_BIT)) + { + for (index = 0u; index <= 6u; index++) + { + if (index == 2u) + { + global_uchar2 = 0x3Fu; + } + else + { + global_uchar2 = 0xFFu; + } + if ((global_buf1[index] & global_uchar2) != (global_buf2[index] & global_uchar2)) + { + error_code = DPE_ULOCK_ERROR; + break; + } + } + } + else + { + for (index = 0u; index <= 5u; index++) + { + if (index == 1u) + { + global_uchar2 = 0xF3u; + } + else if (index == 5u) + { + global_uchar2 = 0xFu; + } + else + { + global_uchar2 = 0xFFu; + } + if ((global_buf1[index] & global_uchar2) != (global_buf2[index] & global_uchar2)) + { + error_code = DPE_ULOCK_ERROR; + break; + } + } + } + } + + + return; +} +#endif + + +void dp_match_security(void) +{ + + opcode = ISC_MATCH_UKEY; + IRSCAN_in(); + + dp_get_and_DRSCAN_in(UKEY_ID, UKEY_BIT_LENGTH, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_MATCH_UKEY_CYCLES); + dp_delay(ISC_MATCH_UKEY_DELAY); + + DRSCAN_out(DMK_BIT_LENGTH, (DPUCHAR*)DPNULL, global_buf1); + if ((global_buf1[0] & 0x3u) == 0x1u) + { + device_security_flags |= SEC_KEY_OK; + } + + if (dat_support_status & SEC_DAT_SUPPORT_BIT) + { + + global_ulong2 = dp_get_bytes(UKEY_ID,0u, 4u); + global_ulong2 |= dp_get_bytes(UKEY_ID,4u, 4u); + global_ulong2 |= dp_get_bytes(UKEY_ID,8u, 4u); + global_ulong2 |= dp_get_bytes(UKEY_ID,12u, 4u); + + + if (global_ulong2 == 0u) + { + device_security_flags |= PERM_LOCK_BIT; + } + } + + + return; +} + +void dp_read_device_security(void) +{ + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nReading Security..."); + #endif + + if (device_family & (AFS_BIT | SFS_BIT)) + { + global_uint1 = ULOCK_AFS_BIT_LENGTH; + } + else + { + global_uint1 = ULOCK_A3P_AGL_BIT_LENGTH; + } + opcode = ISC_QUERY_SECURITY; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_QUERY_SECURITY_CYCLES); + dp_flush_global_buf2(); + /* reset only the security bit locations */ + device_security_flags &= 0xFF000000; + DRSCAN_out(global_uint1, (DPUCHAR*)DPNULL, global_buf2); + if (device_family & (AFS_BIT | SFS_BIT)) + { + device_security_flags |= (DPULONG) global_buf2[0] | + ((DPULONG) global_buf2[1] << 8) | + ((DPULONG) global_buf2[2] << 16) ; + } + /* This step is to line up the security flags for AFS and A3P. This is usedful so that the mask bits are the same for both families */ + else + { + device_security_flags |= (DPULONG) global_buf2[0] << 12 | + (DPULONG) (global_buf2[1] & 0xFu) << 20; + } + + + return; +} +#ifdef SILSIG_SUPPORT +void dp_program_silsig(void) +{ + + global_ulong1 = dp_get_bytes(SILSIG_ID,0u,4u); + if (global_ulong1) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProgramming SILSIG..."); + #endif + + if (device_family & (AFS_BIT | SFS_BIT)) + { + global_uint1 = ULOCK_AFS_BIT_LENGTH; + /* Set the register content to be loaded into the chip */ + global_buf1[0] = (DPUCHAR) device_security_flags; + global_buf1[1] = (DPUCHAR) (device_security_flags >> 8u); + global_buf1[2] = (DPUCHAR) (device_security_flags >> 16u); + global_buf1[3] = (DPUCHAR) global_ulong1; + global_buf1[4] = (DPUCHAR) (global_ulong1 >> 8u); + global_buf1[5] = (DPUCHAR) (global_ulong1 >> 16u); + global_buf1[6] = (DPUCHAR) (global_ulong1 >> 24u); + } + else + { + global_uint1 = ULOCK_A3P_AGL_BIT_LENGTH; + /* Read security configuration from the data file */ + global_buf1[0] = (DPUCHAR) (device_security_flags >> 12); + global_buf1[1] = (DPUCHAR) (device_security_flags >> 20) & 0xFu; + global_buf1[1] |= (DPUCHAR) (global_ulong1 << 4); + global_buf1[2] = (DPUCHAR) (global_ulong1 >> 4); + global_buf1[3] = (DPUCHAR) (global_ulong1 >> 12); + global_buf1[4] = (DPUCHAR) (global_ulong1 >> 20); + global_buf1[5] = (DPUCHAR) (global_ulong1 >> 28); + } + + + opcode = ISC_PROGRAM_SECURITY; + IRSCAN_in(); + DRSCAN_in(0u, global_uint1, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_PROGRAM_SECURITY_CYCLES); + + dp_poll_device(); + if (error_code != DPE_SUCCESS) + { + error_code = DPE_ULOCK_ERROR; + } + } + + return; +} +#endif + +#if (!defined ENABLE_CODE_SPACE_OPTIMIZATION) +void dp_check_dual_key(void) +{ + if ( + ((device_ID & AXXE600X_ID_MASK) == (AXXE600X_ID & AXXE600X_ID_MASK)) || + ((device_ID & AXXE1500X_ID_MASK) == (AXXE1500X_ID & AXXE1500X_ID_MASK)) || + ((device_ID & AXXE3000X_ID_MASK) == (AXXE3000X_ID & AXXE3000X_ID_MASK)) || + ( ( (device_ID & AFS600_ID_MASK) == (AFS600_ID & AFS600_ID_MASK) ) && (device_rev > 1u) ) || + ((device_ID & AFS1500_ID_MASK) == (AFS1500_ID & AFS1500_ID_MASK))) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nChecking for Dual Key Device..."); + #endif + + global_uchar1 = 1u; + dp_set_aes_mode(); + dp_init_aes(); + dp_verify_fc_dmk(); + /* Need to reset to DMK mode */ + + global_uchar1 = 0u; + dp_set_aes_mode(); + dp_init_aes(); + + } + return; +} + +#endif +#ifndef ENABLE_CODE_SPACE_OPTIMIZATION + +void dp_verify_id_dmk(void) +{ + if ( + ((device_ID & AXX030X_ID_MASK) != (AXX030X_ID & AXX030X_ID_MASK)) && + ((device_ID & AGLP030X_ID_MASK) != (AGLP030X_ID & AGLP030X_ID_MASK)) && + (device_ID != AXXN010X_ID) && + (device_ID != AXXN020X_ID) + ) + { + if (device_family & DUAL_KEY_BIT) + { + + global_uchar1 = 1u; + dp_set_aes_mode(); + } + + dp_init_aes(); + dp_verify_m7_dmk(); + if(error_code == DPE_SUCCESS) + { + dp_verify_m1_dmk(); + if(error_code == DPE_SUCCESS) + { + dp_verify_p1_dmk(); + if (error_code == DPE_SUCCESS) + { + if (device_family & DUAL_KEY_BIT) + { + if ( ((device_security_flags & M7_DEVICE) == 0u) && ((device_security_flags & M1_DEVICE) == 0u) && ((device_security_flags & P1_DEVICE) == 0u)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: Core enabled device detected..."); + #endif + error_code = DPE_IDCODE_ERROR; + } + } + } + } + } + } + return; +} + +void dp_verify_m7_dmk(void) +{ + global_buf1[0]=M7KDATA0; + global_buf1[1]=M7KDATA1; + global_buf1[2]=M7KDATA2; + global_buf1[3]=M7KDATA3; + global_buf1[4]=M7KDATA4; + global_buf1[5]=M7KDATA5; + global_buf1[6]=M7KDATA6; + global_buf1[7]=M7KDATA7; + global_buf1[8]=M7KDATA8; + global_buf1[9]=M7KDATA9; + global_buf1[10]=M7KDATA10; + global_buf1[11]=M7KDATA11; + global_buf1[12]=M7KDATA12; + global_buf1[13]=M7KDATA13; + global_buf1[14]=M7KDATA14; + global_buf1[15]=M7KDATA15; + + opcode = ISC_VERIFY_DMK; + IRSCAN_in(); + DRSCAN_in(0u, DMK_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_VERIFY_DMK_CYCLES); + dp_delay(ISC_VERIFY_DMK_DELAY); + DRSCAN_out(DMK_BIT_LENGTH, (DPUCHAR*)DPNULL, global_buf2); + + if ((global_buf2[15] & 0x80u) == 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to verify AES Sec..."); + #endif + error_code = DPE_AES_SEC_ERROR; + } + else if (global_buf2[15] & 0x40u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nM7 Device Detected..."); + #endif + device_security_flags |= M7_DEVICE; + } + else + { + } + if (error_code == DPE_SUCCESS) + { + global_uchar1 = (DPUCHAR) dp_get_bytes(Header_ID,M_DEVICE_OFFSET,1u); + + if ((device_security_flags & M7_DEVICE) && (global_uchar1 != M7)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: M7 Device Detected. Data file is not compiled for M7 Device..."); + #endif + error_code = DPE_IDCODE_ERROR; + } + else if (((device_security_flags & M7_DEVICE) == 0u) && (global_uchar1 == M7)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: M7 Device is not Detected. Data file is compiled for M7 Device..."); + #endif + error_code = DPE_IDCODE_ERROR; + } + else + { + } + } + + return; +} + +void dp_verify_m1_dmk(void) +{ + + global_buf1[0]=M1KDATA0; + global_buf1[1]=M1KDATA1; + global_buf1[2]=M1KDATA2; + global_buf1[3]=M1KDATA3; + global_buf1[4]=M1KDATA4; + global_buf1[5]=M1KDATA5; + global_buf1[6]=M1KDATA6; + global_buf1[7]=M1KDATA7; + global_buf1[8]=M1KDATA8; + global_buf1[9]=M1KDATA9; + global_buf1[10]=M1KDATA10; + global_buf1[11]=M1KDATA11; + global_buf1[12]=M1KDATA12; + global_buf1[13]=M1KDATA13; + global_buf1[14]=M1KDATA14; + global_buf1[15]=M1KDATA15; + + opcode = ISC_VERIFY_DMK; + IRSCAN_in(); + DRSCAN_in(0u, DMK_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_VERIFY_DMK_CYCLES); + dp_delay(ISC_VERIFY_DMK_DELAY); + DRSCAN_out(DMK_BIT_LENGTH, (DPUCHAR*)DPNULL, global_buf2); + if ((global_buf2[15] & 0x80u) == 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to verify AES Sec..."); + #endif + error_code = DPE_AES_SEC_ERROR; + } + else if (global_buf2[15] & 0x40u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nM1 Device Detected..."); + #endif + device_security_flags |= M1_DEVICE; + } + else + { + } + if (error_code == DPE_SUCCESS) + { + global_uchar1 = (DPUCHAR) dp_get_bytes(Header_ID,M_DEVICE_OFFSET,1u); + + if ((device_security_flags & M1_DEVICE) && (global_uchar1 != M1)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: M1 Device Detected. Data file is not compiled for M1 Device..."); + #endif + error_code = DPE_IDCODE_ERROR; + } + else if (((device_security_flags & M1_DEVICE) == 0u) && (global_uchar1 == M1)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: M1 Device is not Detected. Data file is compiled for M1 Device..."); + #endif + error_code = DPE_IDCODE_ERROR; + } + else + { + } + } + + return; +} + +void dp_verify_p1_dmk(void) +{ + + global_buf1[0]=P1KDATA0; + global_buf1[1]=P1KDATA1; + global_buf1[2]=P1KDATA2; + global_buf1[3]=P1KDATA3; + global_buf1[4]=P1KDATA4; + global_buf1[5]=P1KDATA5; + global_buf1[6]=P1KDATA6; + global_buf1[7]=P1KDATA7; + global_buf1[8]=P1KDATA8; + global_buf1[9]=P1KDATA9; + global_buf1[10]=P1KDATA10; + global_buf1[11]=P1KDATA11; + global_buf1[12]=P1KDATA12; + global_buf1[13]=P1KDATA13; + global_buf1[14]=P1KDATA14; + global_buf1[15]=P1KDATA15; + + opcode = ISC_VERIFY_DMK; + IRSCAN_in(); + DRSCAN_in(0u, DMK_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_VERIFY_DMK_CYCLES); + dp_delay(ISC_VERIFY_DMK_DELAY); + DRSCAN_out(DMK_BIT_LENGTH, (DPUCHAR*)DPNULL, global_buf2); + + if ((global_buf2[15] & 0x80u) == 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to verify AES Sec..."); + #endif + error_code = DPE_AES_SEC_ERROR; + } + else if (global_buf2[15] & 0x40u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nP1 Device Detected..."); + #endif + device_security_flags |= P1_DEVICE; + } + else + { + } + + if (error_code == DPE_SUCCESS) + { + global_uchar1 = (DPUCHAR) dp_get_bytes(Header_ID,M_DEVICE_OFFSET,1u); + + if ((device_security_flags & P1_DEVICE) && (global_uchar1 != P1)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: P1 Device Detected. Data file is not compiled for P1 Device..."); + #endif + error_code = DPE_IDCODE_ERROR; + } + else if (((device_security_flags & P1_DEVICE) == 0u) && (global_uchar1 == P1)) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: P1 Device is not Detected. Data file is compiled for P1 Device..."); + #endif + error_code = DPE_IDCODE_ERROR; + } + else + { + } + } + return; +} + + +#endif +#if (!defined ENABLE_CODE_SPACE_OPTIMIZATION) +void dp_verify_fc_dmk(void) +{ + + global_buf1[0]=FCBYTE0; + global_buf1[1]=FCBYTE1; + global_buf1[2]=FCBYTE2; + global_buf1[3]=FCBYTE3; + global_buf1[4]=FCBYTE4; + global_buf1[5]=FCBYTE5; + global_buf1[6]=FCBYTE6; + global_buf1[7]=FCBYTE7; + global_buf1[8]=FCBYTE8; + global_buf1[9]=FCBYTE9; + global_buf1[10]=FCBYTE10; + global_buf1[11]=FCBYTE11; + global_buf1[12]=FCBYTE12; + global_buf1[13]=FCBYTE13; + global_buf1[14]=FCBYTE14; + global_buf1[15]=FCBYTE15; + + opcode = ISC_VERIFY_DMK; + IRSCAN_in(); + DRSCAN_in(0u, DMK_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,ISC_VERIFY_DMK_CYCLES); + dp_delay(ISC_VERIFY_DMK_DELAY); + DRSCAN_out(DMK_BIT_LENGTH, (DPUCHAR*)DPNULL, global_buf2); + + if ((global_buf2[15] & 0x80u) == 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to verify AES Sec..."); + #endif + error_code = DPE_AES_SEC_ERROR; + } + else if (global_buf2[15] & 0x40u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nSingle Key Device Detected..."); + #endif + if (dat_version != V85_DAT) + { + if (device_family & DUAL_KEY_BIT) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: Data file is compiled for Dual Key Device..."); + #endif + error_code = DPE_IDCODE_ERROR; + } + } + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDual Key Device Detected..."); + #endif + if (dat_version == V85_DAT) + { + device_family |= DUAL_KEY_BIT; + if (dat_support_status & CORE_DAT_ENCRYPTION_BIT) + { + AES_mode_value = 2u; + } + else + { + AES_mode_value = 1u; + } + dat_support_status |= CORE_DAT_ENCRYPTION_BIT; + } + else + { + if ( (device_family & DUAL_KEY_BIT) == 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: Data file is compiled for Single Key Device..."); + #endif + error_code = DPE_IDCODE_ERROR; + } + } + } + + return; +} +#endif + +#endif /* End of ENABLE_G3_SUPPORT */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpsecurity.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpsecurity.h new file mode 100644 index 0000000..e127db0 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G3Algo/dpsecurity.h @@ -0,0 +1,176 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpsecurity.h */ +/* */ +/* Description: Contains the function prototypes. */ +/* */ +/* ************************************************************************ */ + +#ifndef INC_DPSECURITY_H +#define INC_DPSECURITY_H + +/****************************************************************************/ +/* Security Opcodes */ +/****************************************************************************/ +#define ISC_PROGRAM_UKEY 0x8BU +#define ISC_PROGRAM_DMK 0x91U +#define ISC_VERIFY_DMK 0x0AU +#define AES_INIT 0xDDU +#define ISC_MATCH_UKEY 0x92U +#define ISC_PROGRAM_SECURITY 0xA3U +#define ISC_QUERY_SECURITY 0xA4U +#define AES_MODE 0xACU + +/****************************************************************************/ +/* Security Bit Locations for AFS devices. */ +/****************************************************************************/ +#define ULNR0 0x00000001U /* NVM Block 0 Verify pass key bit */ +#define ULNW0 0x00000002U /* NVM Block 0 write pass key bit */ +#define ULNC0 0x00000004U /* NVM Block 0 programming encryption bit */ +#define ULNR1 0x00000008U /* NVM Block 1 Verify pass key bit */ +#define ULNW1 0x00000010U /* NVM Block 1 write pass key bit */ +#define ULNC1 0x00000020U /* NVM Block 1 programming encryption bit */ +#define ULNR2 0x00000040U /* NVM Block 2 Verify pass key bit */ +#define ULNW2 0x00000080U /* NVM Block 2 write pass key bit */ +#define ULNC2 0x00000100U /* NVM Block 2 programming encryption bit */ +#define ULNR3 0x00000200U /* NVM Block 3 Verify pass key bit */ +#define ULNW3 0x00000400U /* NVM Block 3 write pass key bit */ +#define ULNC3 0x00000800U /* NVM Block 3 programming encryption bit */ +#define ULARD 0x00001000U /* Array verification pass key bit */ +#define ULAWE 0x00002000U /* Array erase and programming pass key bit */ +#define ULULR 0x00004000U /* DMK / user security erase and programming protection */ +#define ULFLR 0x00008000U /* Factory key disable bit */ +#define ULUFJ 0x00010000U /* FROM verification pass key bit */ +#define ULUFP 0x00020000U /* FROM erase and programming pass key bit */ +#define ULUFE 0x00040000U /* FROM programming encyption bit */ +#define ULUPC 0x00080000U /* Pass key bit */ +#define ULARE 0x00100000U /* Array programming encryption bit */ +#define ULUWE 0x00200000U /* UROW Erase and programming protection */ +#define ULOPT0 0x00400000U +#define ULOPT1 0x00800000U +#define SEC_KEY_OK 0x01000000U +#define PERM_LOCK_BIT 0x02000000U +#define IS_ERASE_ONLY 0x04000000U +#define IS_RESTORE_DESIGN 0x08000000U +#define SET_ERASE_SEC 0x10000000U +#define M7_DEVICE 0x20000000U +#define M1_DEVICE 0x40000000U +#define P1_DEVICE 0x80000000U +/****************************************************************************/ +/* NVM Register length and parameters */ +/****************************************************************************/ +#define UKEY_BIT_LENGTH 128U +#define DMK_BIT_LENGTH 128U +#define AES_BIT_LENGTH 128U +#define AES_MODE_BIT_LENGTH 3U +#define ULOCK_A3P_AGL_BIT_LENGTH 44U +#define ULOCK_AFS_BIT_LENGTH 56U +#define SILGIG_BIT_LENGTH 32U + +/* Security delay and cycle parameters */ +#define ISC_PROGRAM_UKEY_CYCLES 3u +#define ISC_PROGRAM_DMK_CYCLES 15u +#define ISC_PROGRAM_SECURITY_CYCLES 3u +#define ISC_QUERY_SECURITY_CYCLES 3u +#define ISC_MATCH_UKEY_CYCLES 3u +#define ISC_MATCH_UKEY_DELAY 1438u +#define ISC_VERIFY_DMK_CYCLES 3u +#define ISC_VERIFY_DMK_DELAY 104u + + +/****************************************************************************/ +/* Function prototypes */ +/****************************************************************************/ +void dp_program_security(void); +void dp_write_sec_key(void); +void dp_write_enc_key(void); +void dp_match_security(void); +void dp_program_ulock(void); +void dp_read_device_security(void); +void dp_program_silsig(void); +void dp_erase_security_action(void); +void dp_erase_security(void); +void dp_program_security_action(void); +void dp_check_dual_key(void); +void dp_verify_id_dmk(void); +void dp_verify_p1_dmk(void); +void dp_verify_m1_dmk(void); +void dp_verify_m7_dmk(void); +void dp_verify_fc_dmk(void); +#endif /* INC_DPSECURITY_H */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G4Algo/dpG4alg.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G4Algo/dpG4alg.c new file mode 100644 index 0000000..588097e --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G4Algo/dpG4alg.c @@ -0,0 +1,1824 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpG4alg.c */ +/* */ +/* Description: Contains initialization and data checking functions. */ +/* */ +/* ************************************************************************ */ + +#include "dpuser.h" +#ifdef ENABLE_G4_SUPPORT +#include "dputil.h" +#include "dpcom.h" +#include "dpalg.h" +#include "dpG4alg.h" +#include "dpjtag.h" + +DPUCHAR pgmmode; +DPUCHAR pgmmode_flag; +DPUCHAR envm_only_flag; +DPUCHAR sec_ul; +DPUCHAR shared_buf[96]; // Maximum of 768 +DPUCHAR poll_buf[17]; +DPULONG poll_index; +DPUCHAR SYSREG_TEMP[4]; +DPUCHAR component_type; + +DPUCHAR security_queried; + +/**************************************************************************** +* Purpose: main entry function +* This function needs to be called from the main application function with +* the approppriate action code set to intiate the desired action. +****************************************************************************/ +DPUCHAR dp_top_g4 (void) +{ + dp_init_vars(); + dp_init_G4_vars(); + goto_jtag_state(JTAG_TEST_LOGIC_RESET,0u); + dp_check_G4_action(); + if (error_code == DPE_SUCCESS) + { + dp_perform_G4_action(); + } + + return error_code; +} + +void dp_init_G4_vars(void) +{ + envm_only_flag = FALSE; + pgmmode = 0u; + pgmmode_flag = FALSE; + security_queried = FALSE; + sec_ul = 0u; + return; +} + +void dp_check_G4_action(void) +{ + if ( (Action_code == DP_READ_IDCODE_ACTION_CODE) || (Action_code == DP_DEVICE_INFO_ACTION_CODE) ) + { + #ifndef ENABLE_DISPLAY + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + else if (! ( + (Action_code == DP_ERASE_ACTION_CODE) || + (Action_code == DP_PROGRAM_ACTION_CODE) || + (Action_code == DP_VERIFY_ACTION_CODE) || + (Action_code == DP_ENC_DATA_AUTHENTICATION_ACTION_CODE) || + (Action_code == DP_VERIFY_DIGEST_ACTION_CODE) + )) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nInvalid action."); + #endif + } + return; +} + +void dp_perform_G4_action (void) +{ + #ifdef ENABLE_DISPLAY + if (Action_code == DP_READ_IDCODE_ACTION_CODE) + { + dp_read_idcode_action(); + Action_done = TRUE; + } + else if (Action_code == DP_DEVICE_INFO_ACTION_CODE) + { + dp_G4M_device_info_action(); + Action_done = TRUE; + } + #endif + if (Action_done == FALSE) + { + dp_check_image_crc(); + if (error_code == DPE_SUCCESS) + { + dp_check_G4_device_ID(); + if (error_code == DPE_SUCCESS) + { + switch (Action_code) + { + case DP_ERASE_ACTION_CODE: + dp_G4M_erase_action(); + break; + case DP_PROGRAM_ACTION_CODE: + dp_G4M_program_action(); + break; + case DP_VERIFY_ACTION_CODE: + dp_G4M_verify_action(); + break; + case DP_ENC_DATA_AUTHENTICATION_ACTION_CODE: + dp_G4M_enc_data_authentication_action(); + break; + case DP_VERIFY_DIGEST_ACTION_CODE: + dp_G4M_verify_digest_action(); + break; + } + } + } + } + dp_G4M_exit(); + return; +} + + +void dp_G4M_erase_action(void) +{ + dp_G4M_initialize(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_prepare_bitstream(); + pgmmode = 0x1u; + dp_set_mode(); + + if (error_code == DPE_SUCCESS) + { + + /* Global unit1 is used to hold the number of components */ + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G4M_NUMOFCOMPONENT_OFFSET,G4M_NUMOFCOMPONENT_BYTE_LENGTH); + global_uint2 = global_uint1 - ((DPUINT)dp_get_bytes(Header_ID,G4M_ERASEDATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH) - 1u); + + dp_G4M_process_data(G4M_erasedatastream_ID); + + if(error_code != DPE_SUCCESS) + { + error_code = DPE_ERASE_ERROR; + } + + } + } + return; +} + +void dp_G4M_program_action(void) +{ + dp_G4M_initialize(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_prepare_bitstream(); + } + + + if ((error_code == DPE_SUCCESS) && (sec_ul & 0x2u)) + { + pgmmode = 0x1u; + dp_set_mode(); + if (error_code == DPE_SUCCESS) + { + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G4M_NUMOFCOMPONENT_OFFSET,G4M_NUMOFCOMPONENT_BYTE_LENGTH); + global_uint2 = global_uint1 - ((DPUINT)dp_get_bytes(Header_ID,G4M_ERASEDATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH) - 1u); + dp_G4M_process_data(G4M_erasedatastream_ID); + + if(error_code != DPE_SUCCESS) + { + error_code = DPE_ERASE_ERROR; + } + } + } + if (error_code == DPE_SUCCESS) + { + /* Global unit1 is used to hold the number of components */ + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G4M_DATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH); + global_uint2 = 1u; + dp_G4M_setup_eNVM(G4M_datastream_ID); + + if (error_code == DPE_SUCCESS) + { + pgmmode = 0x1u; + dp_set_mode(); + if (error_code == DPE_SUCCESS) + { + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G4M_DATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH); + global_uint2 = 1u; + dp_G4M_process_data(G4M_datastream_ID); + if(error_code != DPE_SUCCESS) + { + error_code = DPE_CORE_PROGRAM_ERROR; + } + else + { + dp_G4M_post_setup_eNVM(); + } + } + } + } + + + return; +} + +void dp_G4M_verify_action(void) +{ + dp_G4M_initialize(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_prepare_bitstream(); + } + + + global_uint2 = 1u; + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G4M_DATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH); + dp_G4M_setup_eNVM(G4M_datastream_ID); + + if (error_code == DPE_SUCCESS) + { + pgmmode = 0x2u; + dp_set_mode(); + + if (error_code == DPE_SUCCESS) + { + /* Global unit1 is used to hold the number of components */ + if ((DPUINT)dp_get_bytes(Header_ID,G4M_VERIFYDATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH) != 0u) + { + /* Both global_unit1 and global_unit2 have DATASIZE, ENVMDATASIZE and ENVMVERIFYDATASIZE; */ + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G4M_DATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH) + + (DPUINT)dp_get_bytes(Header_ID,G4M_ENVMDATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH) + + (DPUINT)dp_get_bytes(Header_ID,G4M_ENVMVERIFYDATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH); + global_uint2 = global_uint1 + 1u; + global_uint1 += (DPUINT)dp_get_bytes(Header_ID,G4M_VERIFYDATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH); + dp_G4M_process_data(G4M_VerifyDataStream_ID); + } + else + { + global_uint2 = 1u; + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G4M_DATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH); + dp_G4M_process_data(G4M_datastream_ID); + } + + if(error_code != DPE_SUCCESS) + { + error_code = DPE_CORE_VERIFY_ERROR; + } + else + { + dp_G4M_post_setup_eNVM(); + } + } + } + + return; +} + +void dp_G4M_enc_data_authentication_action(void) +{ + dp_G4M_initialize(); + if (error_code == DPE_SUCCESS) + { + pgmmode = 0x0u; + dp_set_mode(); + + if (error_code == DPE_SUCCESS) + { + /* Global unit1 is used to hold the number of components */ + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G4M_DATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH); + global_uint2 = 1u; + + dp_G4M_process_data(G4M_datastream_ID); + + + if(error_code != DPE_SUCCESS) + { + error_code = DPE_AUTHENTICATION_FAILURE; + } + + } + } + return; +} + +void dp_G4M_verify_digest_action(void) +{ + dp_G4M_initialize(); + if (error_code == DPE_SUCCESS) + { + + dp_flush_global_buf1(); + + DataIndex = 0u; + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G4M_DATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH); + for (global_uint2 = 1u; global_uint2 <= global_uint1; global_uint2++) + { + /* get the number of blocks */ + /* Global ulong1 is used to hold the number of blocks within the components */ + global_ulong1 = dp_get_bytes(G4M_NUMBER_OF_BLOCKS_ID,(DPULONG)(((global_uint2 - 1u) * 22u) / 8u),4u); + global_ulong1 >>= ((global_uint2 - 1U)* 22u) % 8u; + global_ulong1 &= 0x3FFFFFu; + + component_type = (DPUCHAR) dp_get_bytes(G4M_datastream_ID,COMPONENT_TYPE_IN_HEADER_BYTE+DataIndex/8,1); + if (component_type == G4M_FPGA) + { + global_buf1[0] |= 0x1u; + } + else if (component_type == G4M_ENVM) + { + /* Component type is no longer needed since we know it is eNVM. We need to know which module */ + component_type = (DPUCHAR) dp_get_bytes(G4M_datastream_ID,COMPONENT_TYPE_IN_HEADER_BYTE+ENVM_MODULE_ID_IN_HEADER_BYTE+DataIndex/8,1); + if (component_type == 0u) + { + global_buf1[0] |= 0x2u; + } + else if (component_type == 1u) + { + global_buf1[0] |= 0x4u; + } + } + DataIndex += G4M_FRAME_BIT_LENGTH * global_ulong1; + } + global_ulong1 = dp_get_bytes(Header_ID,G4M_ID_MASK_OFFSET,4U); + if ( ( (device_ID & global_ulong1) == M2S090_ID) || ( (device_ID & global_ulong1) == M2S150_ID) ) + { + global_buf1[0] |= 0xcu; + } + global_buf1[1] |= 0x3cu; + + opcode = G4M_CHECK_DIGESTS; + IRSCAN_in(); + DRSCAN_in(0u, G4M_SECURITY_STATUS_REGISTER_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + + opcode = G4M_CHECK_DIGESTS; + dp_G4M_device_poll(16u, 15u); + if (error_code == DPE_SUCCESS) + { + if (( poll_buf[1] & 0x3c0u) == 0x3cu) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDigest request from SPI/JTAG is protected by user pass key 1."); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + else if (( poll_buf[1] & 0x40u) == 0x40u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to verify digest."); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + if ((global_buf1[0] & 0x1u) == 0x1u) + { + if (( poll_buf[0] & 0x1u) == 0x1u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFPGA Fabric digest verification: PASS"); + #endif + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFPGA Fabric digest verification: FAIL"); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + if (( poll_buf[0] & 0x80u) == 0x80u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFabric configuration segment digest verification: PASS"); + #endif + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFabric configuration segment digest verification: FAIL"); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + } + if ((global_buf1[0] & 0x2u) == 0x2u) + { + if (( poll_buf[0] & 0x2u) == 0x2u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\neNVM_0 digest verification: PASS"); + #endif + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\neNVM_0 digest verification: FAIL"); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + } + if ((global_buf1[0] & 0x4u) == 0x4u) + { + if (( poll_buf[0] & 0x4u) == 0x4u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\neNVM_1 digest verification: PASS"); + #endif + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\neNVM_1 digest verification: FAIL"); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + } + if ((sec_ul & 0x2u) == 0x2u) + { + if (( poll_buf[0] & 0x8u) == 0x8u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser security policies segment digest verification: PASS"); + #endif + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser security policies segment digest verification: FAIL"); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + } + dp_get_data(G4M_UPK1_ID,0u); + if (return_bytes != 0u) + { + if (( poll_buf[0] & 0x10u) == 0x10u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser key set 1 segment digest verification: PASS"); + #endif + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser key set 1 segment digest verification: FAIL"); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + } + dp_get_data(G4M_UPK2_ID,0u); + if (return_bytes != 0u) + { + if (( poll_buf[0] & 0x20u) == 0x20u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser key set 2 segment digest verification: PASS"); + #endif + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser key set 2 segment digest verification: FAIL"); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + } + if (( poll_buf[0] & 0x40u) == 0x0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFactory row and factory key segment digest verification: FAIL"); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + } + } + return; +} + +void dp_G4M_check_core_status(void) +{ + + opcode = G4M_ISC_NOOP; + IRSCAN_out(&global_uchar1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,1u); + + #ifdef ENABLE_DISPLAY + if ((global_uchar1 & 0x4u) == 0x4u) + { + dp_display_text("\r\nFPGA Array is programmed and enabled."); + } + else + { + dp_display_text("\r\nFPGA Array is not enabled."); + } + #endif + + return; +} + + +#ifdef ENABLE_DISPLAY +void dp_G4M_device_info_action(void) +{ + dp_G4M_check_core_status(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_read_design_info(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_read_prog_info(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_read_bitstream_digest(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_read_fsn(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_read_security(); + } + } + } + } + } + + return; +} + +void dp_G4M_read_design_info(void) +{ + opcode = G4M_READ_DESIGN_INFO; + IRSCAN_in(); + DRSCAN_in(0u, G4M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + opcode = G4M_READ_DESIGN_INFO; + dp_G4M_device_poll(8u, 7u); + if (error_code == DPE_SUCCESS) + { + dp_read_shared_buffer(3u); + if (error_code == DPE_SUCCESS) + { + dp_display_text("\r\nDesign Name: "); + + + for (global_uchar1 = 2u; global_uchar1 < 32u; global_uchar1++) + { + dp_display_value(shared_buf[global_uchar1],CHR); + } + + dp_display_text("\r\nChecksum: "); + dp_display_array(shared_buf,2u,HEX); + dp_display_text("\r\nDesign Info: "); + dp_display_array(shared_buf,34u,HEX); + dp_display_text("\r\nDESIGNVER: "); + dp_display_array(&shared_buf[32],2u,HEX); + dp_display_text("\r\nBACKLEVEL: "); + dp_display_array(&shared_buf[34],2u,HEX); + } + } + + return; +} + +void dp_G4M_read_prog_info(void) +{ + opcode = G4M_READ_PROG_INFO; + IRSCAN_in(); + DRSCAN_in(0u, G4M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + + opcode = G4M_READ_PROG_INFO; + dp_G4M_device_poll(128u, 127u); + if (error_code == DPE_SUCCESS) + { + dp_display_text("\r\nPROG_INFO: "); + dp_display_array(poll_buf,16u,HEX); + if ((poll_buf[6] & 0x1) == 0u) + { + dp_display_text("\r\nVCC was programmed at 1.2V"); + } + else + { + dp_display_text("\r\nVCC was programmed at 1.0v"); + } + if ( ((poll_buf[8] & 0x3f) != 0u) && ((poll_buf[8] & 0x3f) != 0x3fu) ) + { + dp_display_text("\r\nAlgorithm Version: "); + dp_display_value((poll_buf[8] & 0x3f),DEC); + } + + + global_uchar1 = ((poll_buf[8] >> 6) | (poll_buf[9] << 2)) & 0xfu; + dp_display_text("\r\nProgrammer code: "); + dp_display_value(global_uchar1, DEC); + + global_uchar1 = ((poll_buf[10] >> 1)) & 0x3fu; + dp_display_text("\r\nSoftware version code: "); + dp_display_value(global_uchar1, DEC); + + global_uchar1 = ((poll_buf[10] >> 7) | (poll_buf[11] << 1)) & 0x7u; + dp_display_text("\r\nProgramming Software code: "); + dp_display_value(global_uchar1, DEC); + + global_uchar1 = ((poll_buf[11] >> 2)) & 0x7u; + dp_display_text("\r\nProgramming Interface Protocol code: "); + dp_display_value(global_uchar1, DEC); + + global_uchar1 = ((poll_buf[11] >> 5)) & 0x7u; + dp_display_text("\r\nProgramming File Type code: "); + dp_display_value(global_uchar1, DEC); + + } + + return; +} + +void dp_G4M_read_fsn(void) +{ + opcode = G4M_READ_FSN; + IRSCAN_in(); + DRSCAN_in(0u, G4M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + opcode = G4M_READ_FSN; + dp_G4M_device_poll(129u, 128u); + dp_display_text("\r\n====================================================================="); + dp_display_text("\r\nDSN: "); + dp_display_array(poll_buf, 16u, HEX); + dp_display_text("\r\n====================================================================="); + + return; +} + +void dp_G4M_read_bitstream_digest(void) +{ + opcode = G4M_READ_DIGESTS; + IRSCAN_in(); + DRSCAN_in(0u, G4M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + opcode = G4M_READ_DIGESTS; + dp_G4M_device_poll(8u, 7u); + if (error_code == DPE_SUCCESS) + { + dp_read_shared_buffer(6u); + if (error_code == DPE_SUCCESS) + { + dp_display_text("\r\nBitstream Fabric Digest: "); + dp_display_array(shared_buf,32u,HEX); + dp_display_text("\r\nBitstream eNVM0 Digest: "); + dp_display_array(&shared_buf[32],32u,HEX); + dp_display_text("\r\nBitstream eNVM1 Digest: "); + dp_display_array(&shared_buf[64],32u,HEX); + } + } + return; +} + +#endif + +/* Checking device ID function. ID is already read in dpalg.c */ +void dp_check_G4_device_ID (void) +{ + /* DataIndex is a variable used for loading the array data but not used now. + * Therefore, it can be used to store the Data file ID for */ + DataIndex = dp_get_bytes(Header_ID,G4M_ID_OFFSET,G4M_ID_BYTE_LENGTH); + + + global_ulong1 = dp_get_bytes(Header_ID,G4M_ID_MASK_OFFSET,4U); + + device_ID &= global_ulong1; + DataIndex &= global_ulong1; + + + /* Identifying target device and setting its parms */ + if ( (DataIndex & 0xfff) == MICROSEMI_ID) + { + if (device_ID == DataIndex ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nActID = "); + dp_display_value(device_ID,HEX); + dp_display_text(" ExpID = "); + dp_display_value(DataIndex,HEX); + dp_display_text("\r\nDevice Rev = "); + dp_display_value(device_rev,HEX); + #endif + device_family = (DPUCHAR) dp_get_bytes(Header_ID,G4M_DEVICE_FAMILY_OFFSET,G4M_DEVICE_FAMILY_BYTE_LENGTH); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text(" ExpID = "); + dp_display_value(DataIndex,HEX); + #endif + error_code = DPE_IDCODE_ERROR; + } + } + else + { + error_code = DPE_IDCODE_ERROR; + } + + return; +} + +/* Check if system controller is ready to enter programming mode */ +void dp_G4M_device_poll(DPUCHAR bits_to_shift, DPUCHAR Busy_bit) +{ + for ( poll_index = 0U; poll_index <= G4M_MAX_CONTROLLER_POLL; poll_index++ ) + { + IRSCAN_in(); + DRSCAN_out(bits_to_shift, (DPUCHAR*)DPNULL, poll_buf); + dp_delay(G4M_STANDARD_DELAY); + if ( ((poll_buf[Busy_bit/8] & (1 << (Busy_bit % 8))) == 0x0u)) + { + break; + } + } + if(poll_index > G4M_MAX_CONTROLLER_POLL) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDevice polling failed."); + #endif + error_code = DPE_POLL_ERROR; + } + + return; +} + +void dp_G4M_device_shift_and_poll(DPUCHAR bits_to_shift, DPUCHAR Busy_bit,DPUCHAR Variable_ID,DPULONG start_bit_index) +{ + for ( poll_index = 0U; poll_index <= G4M_MAX_CONTROLLER_POLL; poll_index++ ) + { + IRSCAN_in(); + dp_get_and_DRSCAN_in_out(Variable_ID, bits_to_shift, start_bit_index, poll_buf); + //DRSCAN_out(bits_to_shift, (DPUCHAR*)DPNULL, poll_buf); + dp_delay(G4M_STANDARD_DELAY); + if ( ((poll_buf[Busy_bit/8] & (1 << (Busy_bit % 8))) == 0x0u)) + { + break; + } + } + if(poll_index > G4M_MAX_CONTROLLER_POLL) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDevice polling failed."); + #endif + error_code = DPE_POLL_ERROR; + } + + return; +} + +void dp_read_shared_buffer(DPUCHAR ucNumOfBlocks) +{ + + dp_flush_global_buf1(); + for (global_uchar1 = 0u; global_uchar1 < ucNumOfBlocks; global_uchar1++) + { + global_buf1[0] = (global_uchar1 << 1u); + opcode = G4M_READ_BUFFER; + IRSCAN_in(); + DRSCAN_in(0u, G4M_FRAME_STATUS_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + opcode = G4M_READ_BUFFER; + dp_G4M_device_poll(129u, 128u); + for (global_uchar2 = 0;global_uchar2 < 16u; global_uchar2++) + { + shared_buf[global_uchar1*16u + global_uchar2] = poll_buf[global_uchar2]; + } + } + + return; +} + +void dp_G4M_poll_device_ready(void) +{ + opcode = G4M_ISC_NOOP; + for ( poll_index = 0U; poll_index <= G4M_MAX_CONTROLLER_POLL; poll_index++ ) + { + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + DRSCAN_out(8u, (DPUCHAR*)DPNULL, poll_buf); + + if ((poll_buf[0] & 0x80u) == 0x0u) + { + break; + } + } + if(poll_index > G4M_MAX_CONTROLLER_POLL) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDevice polling failed."); + #endif + error_code = DPE_POLL_ERROR; + } + + return; +} + +void dp_set_pgm_mode(void) +{ + opcode = G4M_MODE; + IRSCAN_in(); + DRSCAN_in(0u, G4M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + opcode = G4M_MODE; + dp_G4M_device_poll(8u, 7u); + + return; +} + +/**************************************************************************** +* Purpose: Loads the BSR regsiter with data specified in the data file. +* If BSR_SAMPLE is enabled, the data is not loaded. Instead, the last known +* State of the IOs is maintained by stepping through DRCapture JTAG state. +****************************************************************************/ +void dp_G4M_load_bsr(void) +{ + dp_G4M_check_core_status(); + + + global_uint1 = (DPUINT) dp_get_bytes(G4M_Header_ID,G4M_NUMOFBSRBITS_OFFSET,G4M_NUMOFBSRBITS_BYTE_LENGTH); + opcode = ISC_SAMPLE; + IRSCAN_in(); + + #ifdef BSR_SAMPLE + /* Capturing the last known state of the IOs is only valid if the core + was programmed. Otherwise, load the BSR with what is in the data file. */ + if ((global_uchar1 & 0x4u) != 0x4u) + { + dp_get_bytes(G4M_BsrPattern_ID,0u,1u); + if (return_bytes) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: FPGA array is not programmed. Loading BSR register..."); + #endif + dp_get_and_DRSCAN_in(G4M_BsrPattern_ID, global_uint1, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nMaintaining last known IO states..."); + #endif + goto_jtag_state(JTAG_CAPTURE_DR,0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + #else + dp_get_bytes(G4M_BsrPattern_ID,0u,1u); + if (return_bytes) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nLoading BSR..."); + #endif + dp_get_and_DRSCAN_in(G4M_BsrPattern_ID, global_uint1, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + #endif + + + return; +} + +void dp_G4M_perform_isc_enable(void) +{ + + pgmmode_flag = TRUE; + dp_flush_global_buf1(); + global_buf1[0] |= (G4M_ALGO_VERSION & 0x3fu); + global_buf1[2] |= (G4M_DIRECTC_VERSION & 0x3fu) << 1u; + global_buf1[2] |= (DIRECTC_PROGRAMMING & 0x7u) << 7u; + global_buf1[3] |= (DIRECTC_PROGRAMMING & 0x7u) >> 1u; + global_buf1[3] |= (JTAG_PROGRAMMING_PROTOCOL & 0x7u) << 2u; + + opcode = ISC_ENABLE; + IRSCAN_in(); + DRSCAN_in(0u, ISC_STATUS_REGISTER_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + + opcode = ISC_ENABLE; + dp_G4M_device_poll(32u, 31u); + + + if ( (error_code != DPE_SUCCESS) || + ((poll_buf[0] & 0x1u) == 1u) || + ( (poll_buf[0] == 0) && (poll_buf[1] == 0) && (poll_buf[2] == 0) && (poll_buf[3] == 0))) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to enter programming mode."); + #endif + error_code = DPE_INIT_FAILURE; + } + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nISC_ENABLE_RESULT: "); + dp_display_array(poll_buf,4u,HEX); + + /* Display CRCERR */ + global_uchar1 = poll_buf[0] & 0x1u; + dp_display_text("\r\nCRCERR: "); + dp_display_value(global_uchar1,HEX); + + /* Display EDCERR */ + global_uchar1 = (poll_buf[0] & 0x2u) >> 1u; + dp_display_text("\r\nEDCERR: "); + dp_display_value(global_uchar1,HEX); + + /* Display TEMPRANGE */ + global_uchar1 = (poll_buf[0] >> 2) & 0x7u; + dp_display_text("\r\nTEMPRANGE:"); + dp_display_value(global_uchar1,HEX); + if (global_uchar1 == 0u) + { + dp_display_text("\r\nTEMPRANGE: COLD"); + } + else if (global_uchar1 == 1u) + { + dp_display_text("\r\nTEMPRANGE: ROOM"); + } + if (global_uchar1 == 2u) + { + dp_display_text("\r\nTEMPRANGE: HOT"); + } + + + /* Display VPPRANGE */ + global_uchar1 = (poll_buf[0] >> 5) & 0x7u; + dp_display_text("\r\nVPPRANGE:"); + dp_display_value(global_uchar1,HEX); + if (global_uchar1 == 0u) + { + dp_display_text("\r\nVPPRANGE: LOW"); + } + else if (global_uchar1 == 1u) + { + dp_display_text("\r\nVPPRANGE: NOMINAL"); + } + if (global_uchar1 == 2u) + { + dp_display_text("\r\nVPPRANGE: HIGH"); + } + + /* Display TEMP */ + dp_display_text("\r\nTEMP:"); + dp_display_value(poll_buf[1],HEX); + + /* Display VPP */ + dp_display_text("\r\nVPP:"); + dp_display_value(poll_buf[2],HEX); + #endif + + + return; +} + +/* Enter programming mode */ +void dp_G4M_initialize(void) +{ + dp_G4M_poll_device_ready(); + if (error_code == DPE_SUCCESS) + { + dp_set_pgm_mode(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_read_security(); + if ((error_code == DPE_SUCCESS) && (sec_ul & 0x2)) + { + dp_G4M_unlock_upk1(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_unlock_upk2(); + } + } + } + dp_G4M_load_bsr(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_perform_isc_enable(); + } + } + + return; +} + + +/* Function is used to exit programming mode */ +void dp_G4M_exit(void) +{ + + if (pgmmode_flag == TRUE) + { + opcode = ISC_DISABLE; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + + opcode = ISC_DISABLE; + dp_G4M_device_poll(32u, 31u); + #ifdef ENABLE_DISPLAY + if (error_code != DPE_SUCCESS) + { + dp_display_text("\r\nFailed to disable programming mode."); + } + #endif + } + #ifdef ENABLE_DISPLAY + dp_G4M_read_fsn(); + #endif + goto_jtag_state(JTAG_TEST_LOGIC_RESET,0u); + return; +} + +void dp_set_mode(void) +{ + + opcode = G4M_FRAME_INIT; + IRSCAN_in(); + DRSCAN_in(0u, G4M_STATUS_REGISTER_BIT_LENGTH, &pgmmode); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + dp_G4M_device_poll(8u, 7u); + #ifdef ENABLE_DISPLAY + if (error_code != DPE_SUCCESS) + { + dp_display_text("r\nFailed to set programming mode."); + } + #endif + + return; +} + +void dp_G4M_setup_eNVM(DPUCHAR BlockID) +{ + envm_only_flag = FALSE; + + DataIndex = 0u; + for (; global_uint2 <= global_uint1; global_uint2++) + { + /* get the number of blocks */ + /* Global ulong1 is used to hold the number of blocks within the components */ + global_ulong1 = dp_get_bytes(G4M_NUMBER_OF_BLOCKS_ID,(DPULONG)(((global_uint2 - 1u) * 22u) / 8u),4u); + global_ulong1 >>= ((global_uint2 - 1U)* 22u) % 8u; + global_ulong1 &= 0x3FFFFFu; + + /* Determine component types in bitstream */ + global_uchar1 = (DPUCHAR) dp_get_bytes(BlockID,COMPONENT_TYPE_IN_HEADER_BYTE + DataIndex/8u,1u); + if ( (global_uchar1 == G4M_FPGA) || (global_uchar1 == G4M_KEYS) ) + { + envm_only_flag = FALSE; + break; + } + else if(global_uchar1 == G4M_ENVM) + { + envm_only_flag = TRUE; + } + DataIndex += (G4M_FRAME_BIT_LENGTH * global_ulong1); + } + + + if (envm_only_flag == TRUE) + { + dp_MSS_ADDR_CONFIG(); + if (error_code == DPE_SUCCESS) + { + dp_MSS_RD_DATA_SETUP(); + if (error_code == DPE_SUCCESS) + { + dp_MSS_ADDR_CONFIG(); + if (error_code == DPE_SUCCESS) + { + dp_MSS_WR_DATA_SETUP(); + } + } + } + } + return; +} + +void dp_G4M_post_setup_eNVM(void) +{ + + if (envm_only_flag == TRUE) + { + dp_MSS_ADDR_CONFIG(); + if (error_code == DPE_SUCCESS) + { + dp_MSS_WR_DATA(); + } + } + return; +} + +void dp_MSS_ADDR_CONFIG(void) +{ + dp_flush_global_buf1(); + + global_buf1[0] = 0x0cu; + global_buf1[1] = 0x80u; + global_buf1[2] = 0x03u; + global_buf1[3] = 0x40u; + global_buf1[4] = 0x02u; + global_buf1[5] = 0x00u; + global_buf1[6] = 0x00u; + global_buf1[7] = 0x00u; + + opcode = G4M_MSSADDR; + IRSCAN_in(); + DRSCAN_in(0u, G4M_MSSADDR_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + + + opcode = G4M_MSSADDR; + dp_G4M_device_poll(64u, 63u); + + return; +} +void dp_MSS_RD_DATA_SETUP(void) +{ + + dp_flush_global_buf1(); + global_buf1[0] = 0x04u; + + opcode = G4M_MSSRD; + IRSCAN_in(); + DRSCAN_in(0u, G4M_MSSRD_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + + + opcode = G4M_MSSRD; + dp_G4M_device_poll(16u, 15u); + #ifdef ENABLE_DISPLAY + if ( (poll_buf[0] & 0x2u) == 1) + { + dp_display_text("\r\nMSS_RD_DATA_SETUP: msserr"); + } + if ( (poll_buf[0] & 0x1u) == 1) + { + dp_display_text("\r\nMSS_RD_DATA_SETUP: secerr"); + } + #endif + dp_read_shared_buffer(1u); + + for (global_uchar1 = 0u; global_uchar1 < 4u; global_uchar1++) + { + SYSREG_TEMP[global_uchar1] = shared_buf[global_uchar1]; + } + + return; +} + +void dp_MSS_WR_DATA_SETUP(void) +{ + + dp_flush_global_buf1(); + for(global_uchar1 = 0u; global_uchar1 < 4u; global_uchar1++) + { + global_buf1[global_uchar1] = SYSREG_TEMP[global_uchar1]; + } + global_buf1[0] |= 0xe0u; + global_buf1[1] |= 0x1fu; + + opcode = G4M_MSSWR; + IRSCAN_in(); + DRSCAN_in(0u, G4M_MSSWR_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + + + opcode = G4M_MSSWR; + dp_G4M_device_poll(32u, 31u); + #ifdef ENABLE_DISPLAY + if ( (poll_buf[0] & 0x2u) == 1) + { + dp_display_text("\r\nMSS_WR_DATA_SETUP: msserr"); + } + if ( (poll_buf[0] & 0x1u) == 1) + { + dp_display_text("\r\nMSS_WR_DATA_SETUP: secerr"); + } + #endif + + return; +} + +void dp_MSS_WR_DATA(void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nRestore user FREQRNG setting "); + dp_display_array(SYSREG_TEMP,4u,HEX); + dp_display_text("\r\n"); + #endif + + opcode = G4M_MSSWR; + IRSCAN_in(); + DRSCAN_in(0u, G4M_MSSWR_BIT_LENGTH, SYSREG_TEMP); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + + opcode = G4M_MSSWR; + dp_G4M_device_poll(32u, 31u); + #ifdef ENABLE_DISPLAY + if ( (poll_buf[0] & 0x2u) == 1) + { + dp_display_text("\r\nMSS_WR_DATA: msserr"); + } + if ( (poll_buf[0] & 0x1u) == 1) + { + dp_display_text("\r\nMSS_WR_DATA: secerr"); + } + #endif + + + return; +} +/* global_uint2 is iCurComponentNo +global_uint1 is iCurNumOfComponents +*/ +void dp_G4M_prepare_bitstream(void) +{ + pgmmode = 0x2u; + dp_set_mode(); + + if ((error_code == DPE_SUCCESS) && (sec_ul & 0x2u)) + { + if ((DPUINT)dp_get_bytes(Header_ID,G4M_VERIFYDATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH) != 0u) + { + /* Both global_unit1 and global_unit2 have DATASIZE, ENVMDATASIZE and ENVMVERIFYDATASIZE; */ + global_uint2 = (DPUINT)dp_get_bytes(Header_ID,G4M_DATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH) + + (DPUINT)dp_get_bytes(Header_ID,G4M_ENVMDATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH) + + (DPUINT)dp_get_bytes(Header_ID,G4M_ENVMVERIFYDATASIZE_OFFSET,G4M_DATASIZE_BYTE_LENGTH) + 1u; + global_uint1 = global_uint2 + 1u; + dp_G4M_process_predata(G4M_VerifyDataStream_ID); + } + else + { + global_uint2 = 1u; + global_uint1 = 2u; + dp_G4M_process_predata(G4M_datastream_ID); + } + } + else + { + global_uint2 = 1u; + global_uint1 = 2u; + dp_G4M_process_predata(G4M_datastream_ID); + } + return; +} + +void dp_G4M_process_predata(DPUCHAR BlockID) +{ + DataIndex = 0u; + /* Global unit1 is used to hold the number of components */ + /* Loop through the number of components */ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\n"); + #endif + + + for (; global_uint2 <= global_uint1; global_uint2++) + { + /* get the number of blocks */ + /* Global ulong1 is used to hold the number of blocks within the components */ + if (global_uint2 != global_uint1) + { + global_ulong1 = dp_get_bytes(G4M_NUMBER_OF_BLOCKS_ID,(DPULONG)(((global_uint2 - 1u) * 22u) / 8u),4u); + global_ulong1 >>= ((global_uint2 - 1U)* 22u) % 8u; + global_ulong1 &= 0x3FFFFFu; + } + else + { + global_ulong1 = 91u; + } + + + opcode = G4M_FRAME_DATA; + IRSCAN_in(); + dp_get_and_DRSCAN_in(BlockID, G4M_FRAME_BIT_LENGTH, DataIndex); + + for (global_ulong2 = 1u; global_ulong2 <= global_ulong1; global_ulong2++) + { + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + + opcode = G4M_FRAME_DATA; + if (global_ulong2 == global_ulong1) + { + dp_G4M_device_poll(128u, 127u); + } + else + { + dp_G4M_device_shift_and_poll(128u, 127u, BlockID, DataIndex + G4M_FRAME_BIT_LENGTH); + } + if (error_code != DPE_SUCCESS) + { + global_uint2 = global_uint1; + break; + } + else if ((poll_buf[0] & 0x18u) != 0u) + { + dp_G4M_get_data_status(); + if (error_code != DPE_SUCCESS) + { + global_uint2 = global_uint1; + break; + } + else if ((poll_buf[0] & 0x4u) != 0u) + { + global_uint2 = global_uint1; + break; + } + } + DataIndex += G4M_FRAME_BIT_LENGTH; + } + } + + return; +} + + +void dp_G4M_process_data(DPUCHAR BlockID) +{ + DataIndex = 0u; + /* Global unit1 is used to hold the number of components */ + /* Loop through the number of components */ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\n"); + #endif + + + for (; global_uint2 <= global_uint1; global_uint2++) + { + /* get the number of blocks */ + /* Global ulong1 is used to hold the number of blocks within the components */ + global_ulong1 = dp_get_bytes(G4M_NUMBER_OF_BLOCKS_ID,(DPULONG)(((global_uint2 - 1u) * 22u) / 8u),4u); + global_ulong1 >>= ((global_uint2 - 1U)* 22u) % 8u; + global_ulong1 &= 0x3FFFFFu; + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProcessing component "); + dp_display_value(global_uint2,DEC); + dp_display_text(". Please wait..."); + #endif + + opcode = G4M_FRAME_DATA; + IRSCAN_in(); + dp_get_and_DRSCAN_in(BlockID, G4M_FRAME_BIT_LENGTH, DataIndex); + + #ifdef ENABLE_DISPLAY + old_progress = 0; + #endif + for (global_ulong2 = 1u; global_ulong2 <= global_ulong1; global_ulong2++) + { + #ifdef ENABLE_DISPLAY + new_progress = (global_ulong2 *100 / global_ulong1); + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + + opcode = G4M_FRAME_DATA; + if (global_ulong2 == global_ulong1) + { + dp_G4M_device_poll(128u, 127u); + } + else + { + dp_G4M_device_shift_and_poll(128u, 127u, BlockID, DataIndex + G4M_FRAME_BIT_LENGTH); + } + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nInstruction timed out."); + dp_display_text("\r\ncomponentNo: "); + dp_display_value(global_uint2, DEC); + dp_display_text("\r\nblockNo: "); + dp_display_value(global_ulong2, DEC); + #endif + error_code = DPE_PROCESS_DATA_ERROR; + global_uint2 = global_uint1; + break; + } + else if ((poll_buf[0] & 0x18u) != 0u) + { + dp_G4M_get_data_status(); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nInstruction timed out."); + dp_display_text("\r\ncomponentNo: "); + dp_display_value(global_uint2, DEC); + dp_display_text("\r\nblockNo: "); + dp_display_value(global_ulong2, DEC); + #endif + error_code = DPE_PROCESS_DATA_ERROR; + global_uint2 = global_uint1; + break; + } + else if ((poll_buf[0] & 0x4u) != 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\ncomponentNo: "); + dp_display_value(global_uint2, DEC); + dp_display_text("\r\nblockNo: "); + dp_display_value(global_ulong2, DEC); + dp_display_text("\r\nDATA_STATUS_RESULT: "); + dp_display_array(poll_buf,4u,HEX); + dp_display_text("\r\nERRORCODE: "); + dp_display_value((poll_buf[0]>>3u) & 0x1fu,HEX); + dp_display_text("\r\nAUTHERRCODE: "); + dp_display_value(poll_buf[1],HEX); + #endif + error_code = DPE_PROCESS_DATA_ERROR; + global_uint2 = global_uint1; + break; + } + } + + + DataIndex += G4M_FRAME_BIT_LENGTH; + } + } + + return; +} + +void dp_G4M_get_data_status(void) +{ + opcode = G4M_FRAME_STATUS; + IRSCAN_in(); + DRSCAN_in(0u, ISC_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + + opcode = G4M_FRAME_STATUS; + dp_G4M_device_poll(32u, 31u); + + return; +} + +void dp_G4M_read_security(void) +{ + dp_G4M_query_security(); + if ((error_code == DPE_SUCCESS) && (security_queried == FALSE) ) + { + dp_G4M_unlock_dpk(); + if (error_code == DPE_SUCCESS) + { + dp_G4M_query_security(); + if ((error_code == DPE_SUCCESS) && (security_queried == FALSE) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: Security cannot be read even after unlocking debug pass key."); + #endif + } + } + } + sec_ul = shared_buf[4] >> 2u; + return; +} +void dp_G4M_query_security(void) +{ + opcode = G4M_QUERY_SECURITY; + IRSCAN_in(); + DRSCAN_in(0u, G4M_SECURITY_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + opcode = G4M_QUERY_SECURITY; + dp_G4M_device_poll(16u, 15u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to query security information."); + #endif + } + else + { + dp_read_shared_buffer(3u); + for (poll_index = 0u;poll_index < 40u; poll_index++) + { + if (shared_buf[poll_index] != 0u) + { + security_queried = TRUE; + break; + } + } + + #ifdef ENABLE_DISPLAY + if (security_queried == TRUE) + { + dp_display_text("\r\n--- Security locks and configuration settings ---\r\n"); + dp_display_array(shared_buf,42u,HEX); + } + #endif + } + return; +} + +void dp_G4M_unlock_dpk(void) +{ + dp_get_data(G4M_DPK_ID,0u); + if (return_bytes == 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: DPK data is missing."); + #endif + } + else + { + dp_G4M_load_dpk(); + if (error_code == DPE_SUCCESS) + { + opcode = G4M_UNLOCK_DEBUG_PASSCODE; + IRSCAN_in(); + DRSCAN_in(0u, G4M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + } + dp_G4M_device_poll(8u, 7u); + if ((error_code != DPE_SUCCESS) || ((poll_buf[0] & 0x3u) != 0x1u) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to unlock debug pass key."); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDebug security (DPK) is unlocked."); + #endif + } + } + return; +} + +void dp_G4M_unlock_upk1(void) +{ + dp_get_data(G4M_UPK1_ID,0u); + if (return_bytes == 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: UPK1 data is missing."); + #endif + } + else + { + dp_G4M_load_upk1(); + if (error_code == DPE_SUCCESS) + { + opcode = G4M_UNLOCK_USER_PASSCODE; + IRSCAN_in(); + DRSCAN_in(0u, G4M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + } + dp_G4M_device_poll(8u, 7u); + if ((error_code != DPE_SUCCESS) || ((poll_buf[0] & 0x3u) != 0x1u) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to unlock user pass key 1."); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser security (DPK1) is unlocked."); + #endif + } + } + return; +} + +void dp_G4M_unlock_upk2(void) +{ + dp_get_data(G4M_UPK2_ID,0u); + if (return_bytes == 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: UPK2 data is missing."); + #endif + } + else + { + dp_G4M_load_upk2(); + if (error_code == DPE_SUCCESS) + { + opcode = G4M_UNLOCK_VENDOR_PASSCODE; + IRSCAN_in(); + DRSCAN_in(0u, G4M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + } + dp_G4M_device_poll(8u, 7u); + if ((error_code != DPE_SUCCESS) || ((poll_buf[0] & 0x3u) != 0x1u) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to unlock user pass key 2."); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser security (DPK2) is unlocked."); + #endif + } + } + return; +} + +void dp_G4M_load_dpk(void) +{ + opcode = G4M_KEYLO; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G4M_DPK_ID, G4M_FRAME_BIT_LENGTH, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + dp_G4M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keylo. \r\nkeylo_result: "); + dp_display_array(poll_buf,G4M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + opcode = G4M_KEYHI; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G4M_DPK_ID, G4M_FRAME_BIT_LENGTH, G4M_FRAME_BIT_LENGTH); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + dp_G4M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keyhi. \r\nkeyhi_result: "); + dp_display_array(poll_buf,G4M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + } + + return; +} + +void dp_G4M_load_upk1(void) +{ + opcode = G4M_KEYLO; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G4M_UPK1_ID, G4M_FRAME_BIT_LENGTH, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + dp_G4M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keylo. \r\nkeylo_result: "); + dp_display_array(poll_buf,G4M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + opcode = G4M_KEYHI; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G4M_UPK1_ID, G4M_FRAME_BIT_LENGTH, G4M_FRAME_BIT_LENGTH); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + dp_G4M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keyhi. \r\nkeyhi_result: "); + dp_display_array(poll_buf,G4M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + } + + return; +} + +void dp_G4M_load_upk2(void) +{ + opcode = G4M_KEYLO; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G4M_UPK2_ID, G4M_FRAME_BIT_LENGTH, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + dp_G4M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keylo. \r\nkeylo_result: "); + dp_display_array(poll_buf,G4M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + opcode = G4M_KEYHI; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G4M_UPK2_ID, G4M_FRAME_BIT_LENGTH, G4M_FRAME_BIT_LENGTH); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G4M_STANDARD_CYCLES); + dp_delay(G4M_STANDARD_DELAY); + dp_G4M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keyhi. \r\nkeyhi_result: "); + dp_display_array(poll_buf,G4M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + } + + return; +} + + +#endif /* ENABLE_G4_SUPPORT */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G4Algo/dpG4alg.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G4Algo/dpG4alg.h new file mode 100644 index 0000000..b2b7b91 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G4Algo/dpG4alg.h @@ -0,0 +1,239 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpG4alg.h */ +/* */ +/* Description: Contains function prototypes. */ +/* */ +/* ************************************************************************ */ + +#ifndef INC_DPG4ALG_H +#define INC_DPG4ALG_H + +/* +* Data block ID definitions +*/ +#define G4M_ALGO_VERSION 1u +#define DIRECTC_PROGRAMMING 2u +#define G4M_DIRECTC_VERSION 0u +#define SPI_PROGRAMMING_PROTOCOL 2u +#define JTAG_PROGRAMMING_PROTOCOL 3u + +#define G4M_Header_ID 0u +#define G4M_USER_INFO_ID 1u +#define G4M_ACT_UROW_DESIGN_NAME_ID 2u +#define G4M_BsrPattern_ID 3u +#define G4M_BsrPatternMask_ID 4u +#define G4M_NUMBER_OF_BLOCKS_ID 5u +#define G4M_UPK1_ID 6u +#define G4M_UPK2_ID 7u +#define G4M_datastream_ID 8u +#define G4M_erasedatastream_ID 9u +#define G4M_VerifyDataStream_ID 10u +#define G4M_EnvmDataStream_ID 11u +#define G4M_EnvmVerifyDataStream_ID 12u +#define G4M_DPK_ID 13u + +#define G4M_DEVICE_FAMILY_OFFSET 36u +#define G4M_DEVICE_FAMILY_BYTE_LENGTH 1u +#define G4M_ID_OFFSET 37u +#define G4M_ID_BYTE_LENGTH 4u +#define G4M_ID_MASK_OFFSET 41u +#define G4M_ID_MASK_BYTE_LENGTH 4u +#define G4M_SILSIG_OFFSET 45u +#define G4M_SILSIG_BYTE_LENGTH 4u +#define G4M_CHECKSUM_OFFSET 49u +#define G4M_CHECKSUM_BYTE_LENGTH 2u +#define G4M_NUMOFBSRBITS_OFFSET 51u +#define G4M_NUMOFBSRBITS_BYTE_LENGTH 2u +#define G4M_NUMOFCOMPONENT_OFFSET 53u +#define G4M_NUMOFCOMPONENT_BYTE_LENGTH 2u +#define G4M_DATASIZE_OFFSET 55u +#define G4M_DATASIZE_BYTE_LENGTH 2u +#define G4M_ERASEDATASIZE_OFFSET 57u +#define G4M_ERASEDATASIZE_BYTE_LENGTH 2u +#define G4M_VERIFYDATASIZE_OFFSET 59u +#define G4M_VERIFYDATASIZE_BYTE_LENGTH 2u +#define G4M_ENVMDATASIZE_OFFSET 61u +#define G4M_ENVMDATASIZE_BYTE_LENGTH 2u +#define G4M_ENVMVERIFYDATASIZE_OFFSET 63u +#define G4M_ENVMVERIFYDATASIZE_BYTE_LENGTH 2u + +/* +* G4Main JTAG instructions +*/ +#define G4M_ISC_NOOP 0x8fu +#define G4M_FRAME_INIT 0xaeu +#define G4M_READ_DESIGN_INFO 0xa6u +#define G4M_READ_PROG_INFO 0xe7u +#define G4M_READ_BUFFER 0xf2u +#define G4M_READ_FSN 0xf0u +#define G4M_QUERY_SECURITY 0xb8u +#define G4M_MODE 0xafu +#define G4M_FRAME_DATA 0xeeu +#define G4M_FRAME_STATUS 0xc9u +#define G4M_KEYLO 0xebu +#define G4M_KEYHI 0xecu +#define G4M_UNLOCK_DEBUG_PASSCODE 0xadu +#define G4M_UNLOCK_USER_PASSCODE 0xa8u +#define G4M_UNLOCK_VENDOR_PASSCODE 0xaau +#define G4M_MSSADDR 0xdbu +#define G4M_MSSRD 0xbdu +#define G4M_MSSWR 0xceu +#define G4M_CHECK_DIGESTS 0xbcu +#define G4M_READ_DIGESTS 0xa3u + +#define G4M_MAX_CONTROLLER_POLL 1000000u + +#define ISC_STATUS_REGISTER_BIT_LENGTH 32u +#define G4M_STANDARD_CYCLES 3u +#define G4M_STANDARD_DELAY 10u +#define G4M_MSSADDR_BIT_LENGTH 64u +#define G4M_MSSRD_BIT_LENGTH 16u +#define G4M_MSSWR_BIT_LENGTH 32u + +#define G4M_STATUS_REGISTER_BIT_LENGTH 8u +#define G4M_SECURITY_STATUS_REGISTER_BIT_LENGTH 16u +#define G4M_FRAME_BIT_LENGTH 128u +#define G4M_FRAME_STATUS_BIT_LENGTH 129u +#define G4M_FRAME_BYTE_LENGTH 16u + +#define M2S090_ID 0x0F8071CFu +#define M2S150_ID 0x0F8061CFu + +#define COMPONENT_TYPE_IN_HEADER_BYTE 48u +#define ENVM_MODULE_ID_IN_HEADER_BYTE 301u +#define G4M_FPGA 1u +#define G4M_KEYS 2u +#define G4M_ENVM 3u + +DPUCHAR dp_top_g4 (void); +void dp_init_G4_vars(void); +void dp_check_G4_action(void); +void dp_perform_G4_action (void); + +/* Supported Actions */ +void dp_G4M_device_info_action(void); +void dp_G4M_erase_action(void); +void dp_G4M_program_action(void); +void dp_G4M_verify_action(void); +void dp_G4M_enc_data_authentication_action(void); +void dp_G4M_verify_digest_action(void); + +void dp_check_G4_device_ID (void); +void dp_G4M_poll_device_ready(void); +void dp_G4M_check_core_status(void); +void dp_G4M_read_design_info(void); +void dp_G4M_read_prog_info(void); +void dp_G4M_read_fsn(void); +void dp_G4M_read_bitstream_digest(void); +void dp_G4M_read_security(void); +void dp_G4M_query_security(void); +void dp_G4M_unlock_dpk(void); +void dp_G4M_load_dpk(void); +void dp_G4M_unlock_upk1(void); +void dp_G4M_load_upk1(void); +void dp_G4M_unlock_upk2(void); +void dp_G4M_load_upk2(void); +void dp_read_shared_buffer(DPUCHAR ucNumOfBlocks); +void dp_set_pgm_mode(void); +void dp_G4M_load_bsr(void); +void dp_G4M_perform_isc_enable(void); +void dp_G4M_process_data(DPUCHAR BlockID); +void dp_G4M_process_predata(DPUCHAR BlockID); +void dp_G4M_prepare_bitstream(void); +void dp_G4M_get_data_status(void); +void dp_G4M_setup_eNVM(DPUCHAR BlockID); +void dp_G4M_post_setup_eNVM(void); +void dp_MSS_ADDR_CONFIG(void); +void dp_MSS_RD_DATA_SETUP(void); +void dp_MSS_WR_DATA_SETUP(void); +void dp_MSS_WR_DATA(void); + + +/* Initialization functions */ +void dp_G4M_device_poll(DPUCHAR bits_to_shift, DPUCHAR Busy_bit); +void dp_G4M_device_shift_and_poll(DPUCHAR bits_to_shift, DPUCHAR Busy_bit,DPUCHAR Variable_ID,DPULONG start_bit_index); +void dp_G4M_initialize(void); +void dp_G4M_exit(void); +void dp_set_mode(void); + +/* Erase function */ +void dp_G4M_erase(void); + +#endif /* INC_DPG4ALG_H */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G5Algo/dpG5alg.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G5Algo/dpG5alg.c new file mode 100644 index 0000000..f94eb74 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G5Algo/dpG5alg.c @@ -0,0 +1,1457 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpG5alg.c */ +/* */ +/* Description: Contains initialization and data checking functions. */ +/* */ +/* ************************************************************************ */ + +#include "dpuser.h" +#ifdef ENABLE_G5_SUPPORT +#include "dputil.h" +#include "dpcom.h" +#include "dpalg.h" +#include "dpG5alg.h" +#include "dpjtag.h" + +DPUCHAR g5_pgmmode; +DPUCHAR g5_pgmmode_flag; +DPUCHAR g5_shared_buf[80]; +DPUCHAR g5_poll_buf[17]; +DPULONG g5_poll_index; + + +/**************************************************************************** +* Purpose: main entry function +* This function needs to be called from the main application function with +* the approppriate action code set to intiate the desired action. +****************************************************************************/ +DPUCHAR dp_top_g5 (void) +{ + dp_init_vars(); + dp_init_G5_vars(); + goto_jtag_state(JTAG_TEST_LOGIC_RESET,0u); + dp_check_G5_action(); + if (error_code == DPE_SUCCESS) + { + dp_perform_G5_action(); + } + + return error_code; +} + +void dp_init_G5_vars(void) +{ + g5_pgmmode = 0u; + g5_pgmmode_flag = FALSE; + + return; +} + +void dp_check_G5_action(void) +{ + if ( (Action_code == DP_READ_IDCODE_ACTION_CODE) || (Action_code == DP_DEVICE_INFO_ACTION_CODE) ) + { + #ifndef ENABLE_DISPLAY + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + else if (! ( + (Action_code == DP_ERASE_ACTION_CODE) || + (Action_code == DP_PROGRAM_ACTION_CODE) || + (Action_code == DP_VERIFY_ACTION_CODE) || + (Action_code == DP_ENC_DATA_AUTHENTICATION_ACTION_CODE) || + (Action_code == DP_VERIFY_DIGEST_ACTION_CODE) + )) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nInvalid action."); + #endif + } + return; +} + +void dp_perform_G5_action (void) +{ + #ifdef ENABLE_DISPLAY + if (Action_code == DP_READ_IDCODE_ACTION_CODE) + { + dp_read_idcode_action(); + Action_done = TRUE; + } + else if (Action_code == DP_DEVICE_INFO_ACTION_CODE) + { + dp_G5M_device_info_action(); + Action_done = TRUE; + } + #endif + if (Action_done == FALSE) + { + dp_check_image_crc(); + if (error_code == DPE_SUCCESS) + { + dp_check_G5_device_ID(); + if (error_code == DPE_SUCCESS) + { + switch (Action_code) + { + case DP_ERASE_ACTION_CODE: + dp_G5M_erase_action(); + break; + case DP_PROGRAM_ACTION_CODE: + dp_G5M_program_action(); + break; + case DP_VERIFY_ACTION_CODE: + dp_G5M_verify_action(); + break; + case DP_ENC_DATA_AUTHENTICATION_ACTION_CODE: + dp_G5M_enc_data_authentication_action(); + break; + case DP_VERIFY_DIGEST_ACTION_CODE: + dp_G5M_verify_digest_action(); + break; + } + } + } + } + dp_G5M_exit(); + return; +} + +void dp_G5M_erase_action(void) +{ + dp_G5M_initialize(); + if (error_code == DPE_SUCCESS) + { + g5_pgmmode = 0x1u; + dp_G5M_set_mode(); + + + if (error_code == DPE_SUCCESS) + { + /* Global unit1 is used to hold the number of components */ + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G5M_NUMOFCOMPONENT_OFFSET,G5M_NUMOFCOMPONENT_BYTE_LENGTH); + global_uint2 = global_uint1 - ((DPUINT)dp_get_bytes(Header_ID,G5M_ERASEDATASIZE_OFFSET,G5M_DATASIZE_BYTE_LENGTH) - 1u); + + dp_G5M_process_data(G5M_erasedatastream_ID); + + if(error_code != DPE_SUCCESS) + { + error_code = DPE_ERASE_ERROR; + } + } + } + return; +} + +void dp_G5M_program_action(void) +{ + dp_G5M_initialize(); + if (error_code == DPE_SUCCESS) + { + g5_pgmmode = 0x1u; + dp_G5M_set_mode(); + + + if (error_code == DPE_SUCCESS) + { + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G5M_DATASIZE_OFFSET,G5M_DATASIZE_BYTE_LENGTH); + global_uint2 = 1u; + dp_G5M_process_data(G5M_datastream_ID); + + if(error_code != DPE_SUCCESS) + { + error_code = DPE_CORE_PROGRAM_ERROR; + } + } + + } + + return; +} + +void dp_G5M_verify_action(void) +{ + dp_G5M_initialize(); + + if (error_code == DPE_SUCCESS) + { + g5_pgmmode = 0x2u; + dp_G5M_set_mode(); + + + if (error_code == DPE_SUCCESS) + { + /* Global unit1 is used to hold the number of components */ + global_uint2 = 1u; + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G5M_DATASIZE_OFFSET,G5M_DATASIZE_BYTE_LENGTH); + dp_G5M_process_data(G5M_datastream_ID); + if(error_code != DPE_SUCCESS) + { + error_code = DPE_VERIFY_ERROR; + } + } + } + + return; +} + +void dp_G5M_enc_data_authentication_action(void) +{ + dp_G5M_initialize(); + if (error_code == DPE_SUCCESS) + { + g5_pgmmode = 0x0u; + dp_G5M_set_mode(); + + + if (error_code == DPE_SUCCESS) + { + /* Global unit1 is used to hold the number of components */ + global_uint1 = (DPUINT)dp_get_bytes(Header_ID,G5M_DATASIZE_OFFSET,G5M_DATASIZE_BYTE_LENGTH); + global_uint2 = 1u; + + dp_G5M_process_data(G5M_datastream_ID); + + if(error_code != DPE_SUCCESS) + { + error_code = DPE_AUTHENTICATION_FAILURE; + } + } + + } + return; +} + +void dp_G5M_verify_digest_action(void) +{ + dp_G5M_initialize(); + if (error_code == DPE_SUCCESS) + { + dp_G5M_query_security(); + } + if ((error_code == DPE_SUCCESS) && ((g5_shared_buf[1] & G5M_UL_EXTERNAL_DIGEST_CHECK) == G5M_UL_EXTERNAL_DIGEST_CHECK) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("r\nExternal digest check via JTAG/SPI Slave is disabled."); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + + if (error_code == DPE_SUCCESS) + { + global_buf1[0] = 0x1u; + + opcode = G5M_CHECK_DIGESTS; + IRSCAN_in(); + DRSCAN_in(0u, G5M_SECURITY_STATUS_REGISTER_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + dp_G5M_device_poll(16u, 15u); + + + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to verify digest."); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + else + { + if (g5_poll_buf[1] == 0x40u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to verify digest."); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + else + { + #ifdef ENABLE_DISPLAY + if ((g5_poll_buf[0] & 0x1u )== 0x1u) + { + dp_display_text("\r\n --- FPGA Fabric digest verification: PASS"); + } + else + { + dp_display_text("\r\nWarning: --- FPGA Fabric digest verification: FAIL"); + } + if ((g5_poll_buf[0] & 0x2u )== 0x2u) + { + dp_display_text("\r\n --- Fabric Configuration digest verification: PASS"); + } + else + { + dp_display_text("\r\nWarning: --- Fabric Configuration digest verification: FAIL"); + } + if ((g5_poll_buf[0] & 0x4u )== 0x4u) + { + dp_display_text("\r\n --- sNVM digest verification: PASS"); + } + else + { + dp_display_text("\r\nWarning: --- sNVM digest verification: FAIL"); + } + if ((g5_poll_buf[0] & 0x8u )== 0x8u) + { + dp_display_text("\r\n --- User security policies segment digest verification: PASS" ); + } + else + { + dp_display_text("\r\nWarning: --- User security policies segment digest verification: FAIL" ); + } + if ((g5_poll_buf[0] & 0x10u )== 0x10u) + { + dp_display_text("\r\n --- SMK segment digest verification: PASS"); + } + else + { + dp_display_text("\r\nWarning: --- SMK segment digest verification: FAIL"); + } + if ((g5_poll_buf[0] & 0x20u )== 0x20u) + { + dp_display_text("\r\n --- User Public Key segment digest verification: PASS"); + } + else + { + dp_display_text("\r\nWarning: --- User Public Key segment digest verification: FAIL"); + } + if ((g5_poll_buf[0] & 0x40u )== 0x40u) + { + dp_display_text("\r\n --- UPK1 segment digest verification: PASS" ); + } + else + { + dp_display_text("\r\nWarning: --- UPK1 segment digest verification: FAIL" ); + } + if ((g5_poll_buf[0] & 0x80u )== 0x80u) + { + dp_display_text("\r\n --- UEK1 segment digest verification: PASS" ); + } + else + { + dp_display_text("\r\nWarning: --- UEK1 segment digest verification: FAIL" ); + } + if ((g5_poll_buf[1] & 0x1u )== 0x1u) + { + dp_display_text("\r\n --- DPK segment digest verification: PASS" ); + } + else + { + dp_display_text("\r\nWarning: --- DPK segment digest verification: FAIL" ); + } + if ((g5_poll_buf[1] & 0x2u )== 0x2u) + { + dp_display_text("\r\n --- UPK2 segment digest verification: PASS" ); + } + else + { + dp_display_text("\r\nWarning: --- UPK2 segment digest verification: FAIL" ); + } + if ((g5_poll_buf[1] & 0x4u )== 0x4u) + { + dp_display_text("\r\n --- UEK2 segment digest verification: PASS" ); + } + else + { + dp_display_text("\r\nWarning: --- UEK2 segment digest verification: FAIL" ); + } + if ((g5_poll_buf[1] & 0x10u )== 0x10u) + { + dp_display_text("\r\n --- Factory row and factory key segment digest verification: PASS"); + } + else + { + dp_display_text("\r\nWarning: --- Factory row and factory key segment digest verification: FAIL"); + } + #endif + } + } + } + return; +} + +void dp_G5M_check_core_status(void) +{ + + opcode = G5M_ISC_NOOP; + IRSCAN_out(&global_uchar1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,1u); + + #ifdef ENABLE_DISPLAY + if ((global_uchar1 & 0x80u) == 0x80u) + { + dp_display_text("\r\nFPGA Array is programmed and enabled."); + } + else + { + dp_display_text("\r\nFPGA Array is not enabled."); + } + #endif + +} + +#ifdef ENABLE_DISPLAY +void dp_G5M_device_info_action(void) +{ + dp_display_text("\r\n\r\nDevice info:"); + dp_read_usercode(); + dp_G5M_check_core_status(); + dp_G5M_read_design_info(); + dp_G5M_read_debug_info(); + dp_G5M_read_fsn(); + dp_G5M_read_tvs_monitor(); + dp_G5M_query_security(); + dp_G5M_dump_security(); + + return; +} + + + +void dp_G5M_dump_security(void) +{ + if ((g5_poll_buf[0] & 0x1u) == 0x1u) + { + dp_display_text("\r\nSmartDebug user debug access and active probes are disabled."); + } + if ((g5_poll_buf[0] & 0x2u) == 0x2u) + { + dp_display_text("\r\nSmartDebug sNVM debug is disabled."); + } + if ((g5_poll_buf[0] & 0x4u) == 0x4u) + { + dp_display_text("\r\nSmartDebug Live probes are disabled."); + } + if ((g5_poll_buf[0] & 0x8u) == 0x8u) + { + dp_display_text("\r\nUser JTAG interface is disabled"); + } + if ((g5_poll_buf[0] & 0x10u) == 0x10u) + { + dp_display_text("\r\nJTAG boundary scan is disabled."); + } + if ((g5_poll_buf[0] & 0x20u) == 0x20u) + { + dp_display_text("\r\nReading of temperature and voltage via JTAG/SPI Slave is disabled."); + } + if ((g5_poll_buf[1] & 0x1u) == 0x1u) + { + dp_display_text("\r\nPlaintext passcode unlock is disabled."); + } + if ((g5_poll_buf[1] & 0x2u) == 0x2u) + { + dp_display_text("\r\nFabric erase/write is disabled."); + } + if ((g5_poll_buf[1] & 0x4u) == 0x4u) + { + dp_display_text("\r\nExternal digest check via JTAG/SPI Slave is disabled."); + } + if ((g5_poll_buf[1] & 0x8u) == 0x8u) + { + dp_display_text("\r\nBack level protection is enabled."); + } + if ((g5_poll_buf[1] & 0x10u) == 0x10u) + { + dp_display_text("\r\nMicrosemi factory test mode is disabled."); + } + else + { + dp_display_text("\r\nMicrosemi factory test mode access is allowed."); + } + if ((g5_poll_buf[1] & 0x20u) == 0x20u) + { + dp_display_text("\r\nAuto Programming and IAP Services are disabled."); + } + if ((g5_poll_buf[1] & 0x40u) == 0x40u) + { + dp_display_text("\r\nExternal zeroizations via JTAG/SPI Slave is disabled."); + } + if ((g5_poll_buf[1] & 0x80u) == 0x80u) + { + dp_display_text("\r\nSPI Slave port is disabled."); + } + if ((g5_poll_buf[2] & 0x1u) == 0x1u) + { + dp_display_text("\r\nUser lock segment is locked. FlashLock/UPK1 is required to make changes to security."); + } + if ((g5_poll_buf[2] & 0x2u) == 0x2u) + { + dp_display_text("\r\nAuthenticate programming action for JTAG/SPI Slave is disabled."); + } + if ((g5_poll_buf[2] & 0x4u) == 0x4u) + { + dp_display_text("\r\nProgram action for JTAG/SPI Slave is disabled."); + } + if ((g5_poll_buf[2] & 0x8u) == 0x8u) + { + dp_display_text("\r\nVerify action for JTAG/SPI Slave is disabled."); + } + + if ((g5_poll_buf[2] & 0x40u) == 0x40u) + { + dp_display_text("\r\nBitstream Default encryption key (KLK) is disabled."); + } + if ((g5_poll_buf[2] & 0x80u) == 0x80u) + { + dp_display_text("\r\nBitstream User Encryption Key 1 is disabled."); + } + if ((g5_poll_buf[3] & 0x1u) == 0x1u) + { + dp_display_text("\r\nBitstream User Encryption Key 2 is disabled."); + } + if ((g5_poll_buf[4] & 0x40u) == 0x40u) + { + dp_display_text("\r\nDefault encryption key (KLK) is disabled."); + } + if ((g5_poll_buf[4] & 0x80u) == 0x80u) + { + dp_display_text("\r\nUser Encryption Key 1 is disabled."); + } + if ((g5_poll_buf[5] & 0x1u) == 0x1u) + { + dp_display_text("\r\nUser Encryption Key 2 is disabled."); + } + if ((g5_poll_buf[6] & 0x10u) == 0x10u) + { + dp_display_text("\r\nsNVM write is disabled."); + } + if ((g5_poll_buf[6] & 0x20u) == 0x20u) + { + dp_display_text("\r\nPUF emulation via JTAG/SPI Slave is disabled."); + } + if ((g5_poll_buf[7] & 0x2u) == 0x2u) + { + dp_display_text("\r\nUser Key Set 1 is locked. FlashLock/UPK1 is required to make changes."); + } + if ((g5_poll_buf[7] & 0x4u) == 0x4u) + { + dp_display_text("\r\nUser Key Set 2 is locked. FlashLock/UPK2 is required to make changes."); + } + if ((g5_poll_buf[7] & 0x8u) == 0x8u) + { + dp_display_text("\r\nMicrosemi factory test access is permanently disabled."); + } + if ((g5_poll_buf[7] & 0x10u) == 0x10u) + { + dp_display_text("\r\nSmartDebug debugging is permanently disabled."); + } + if ((g5_poll_buf[7] & 0x20u) == 0x20u) + { + dp_display_text("\r\nFabric erase/write is permanently disabled."); + } + if ((g5_poll_buf[7] & 0x40u) == 0x40u) + { + dp_display_text("\r\nFlashLock/UPK1 unlocking is permanently disabled"); + } + if ((g5_poll_buf[7] & 0x80u) == 0x80u) + { + dp_display_text("\r\nFlashLock/UPK2 unlocking is permanently disabled."); + } + if ((g5_poll_buf[8] & 0x1u) == 0x1u) + { + dp_display_text("\r\nFlashLock/DPK unlocking is permanently disabled."); + } + if ((g5_poll_buf[8] & 0x2u) == 0x2u) + { + dp_display_text("\r\nUPERM segment is permanently locked."); + } + return; +} + +void dp_G5M_read_design_info(void) +{ + opcode = G5M_READ_DESIGN_INFO; + IRSCAN_in(); + DRSCAN_in(0u, G5M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + opcode = G5M_READ_DESIGN_INFO; + dp_G5M_device_poll(8u, 7u); + if (error_code == DPE_SUCCESS) + { + dp_G5M_read_shared_buffer(3u); + if (error_code == DPE_SUCCESS) + { + dp_display_text("\r\nDesign Name: "); + + + for (global_uchar1 = 2u; global_uchar1 < 32u; global_uchar1++) + { + dp_display_value(g5_shared_buf[global_uchar1],CHR); + } + dp_display_text("\r\nChecksum: "); + dp_display_array(g5_shared_buf,2u,HEX); + dp_display_text("\r\nDesign Info: \r\n"); + dp_display_array(g5_shared_buf,34u,HEX); + dp_display_text("\r\nDESIGNVER: "); + dp_display_array(&g5_shared_buf[32],2u,HEX); + dp_display_text("\r\nBACKLEVEL: "); + dp_display_array(&g5_shared_buf[34],2u,HEX); + dp_display_text("\r\n-----------------------------------------------------"); + } + } + + return; +} + +void dp_G5M_read_debug_info(void) +{ + opcode = G5M_READ_DEBUG_INFO; + IRSCAN_in(); + DRSCAN_in(0u, G5M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + + opcode = G5M_READ_DEBUG_INFO; + dp_G5M_device_poll(128u, 127u); + if (error_code == DPE_SUCCESS) + { + dp_G5M_read_shared_buffer(5u); + dp_display_text("\r\nDEBUG_INFO:\r\n"); + dp_display_array(g5_shared_buf,80u,HEX); + + + + + global_uint1 = ((g5_shared_buf[61] << 8u) | (g5_shared_buf[60])); + dp_display_text("\r\nCycle Count: "); + dp_display_value(global_uint1,DEC); + + if (g5_shared_buf[36] == 1u) + { + dp_display_text("\r\nProgramming mode: JTAG"); + } + else if (g5_shared_buf[36] == 2u) + { + dp_display_text("\r\nProgramming mode: IAP"); + } + else if (g5_shared_buf[36] == 3u) + { + dp_display_text("\r\nProgramming mode: SPI-Slave"); + } + + if (((g5_shared_buf[32] &0x3fu) != 0) && ((g5_shared_buf[32] &0x3fu) != 0x3fu)) + { + dp_display_text("\r\nAlgorithm version: "); + dp_display_value(g5_shared_buf[32] & 0x3fu, DEC); + } + + } + + return; +} + +void dp_G5M_read_tvs_monitor(void) +{ + opcode = G5M_TVS_MONITOR; + IRSCAN_in(); + DRSCAN_in(0u, G5M_FRAME_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + opcode = G5M_TVS_MONITOR; + dp_G5M_device_poll(128u, 127u); + if (error_code == DPE_SUCCESS) + { + dp_display_text("\r\nTVS_MONITOR: "); + dp_display_array(g5_poll_buf,G5M_FRAME_BYTE_LENGTH,HEX); + } + + return; +} + + +void dp_G5M_read_fsn(void) +{ + opcode = G5M_READ_FSN; + IRSCAN_in(); + DRSCAN_in(0u, G5M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + opcode = G5M_READ_FSN; + dp_G5M_device_poll(129u, 128u); + #ifdef ENABLE_DISPLAY + dp_display_text("\r\n====================================================================="); + dp_display_text("\r\nDSN: "); + dp_display_array(g5_poll_buf, 16u, HEX); + dp_display_text("\r\n====================================================================="); + #endif + + return; +} +#endif + +/* Checking device ID function. ID is already read in dpalg.c */ +void dp_check_G5_device_ID (void) +{ + /* DataIndex is a variable used for loading the array data but not used now. + * Therefore, it can be used to store the Data file ID for */ + DataIndex = dp_get_bytes(Header_ID,G5M_ID_OFFSET,G5M_ID_BYTE_LENGTH); + + global_ulong1 = dp_get_bytes(Header_ID,G5M_ID_MASK_OFFSET,4U); + + device_ID &= global_ulong1; + DataIndex &= global_ulong1; + + + /* Identifying target device and setting its parms */ + + if ( (DataIndex & 0xfff) == MICROSEMI_ID) + { + if (device_ID == DataIndex ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nActID = "); + dp_display_value(device_ID,HEX); + dp_display_text(" ExpID = "); + dp_display_value(DataIndex,HEX); + dp_display_text("\r\nDevice Rev = "); + dp_display_value(device_rev,HEX); + #endif + device_family = (DPUCHAR) dp_get_bytes(Header_ID,G5M_DEVICE_FAMILY_OFFSET,G5M_DEVICE_FAMILY_BYTE_LENGTH); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text(" ExpID = "); + dp_display_value(DataIndex,HEX); + #endif + error_code = DPE_IDCODE_ERROR; + } + } + else + { + error_code = DPE_IDCODE_ERROR; + } + + return; +} + +/* Check if system controller is ready to enter programming mode */ +void dp_G5M_device_poll(DPUCHAR bits_to_shift, DPUCHAR Busy_bit) +{ + for ( g5_poll_index = 0U; g5_poll_index <= G5M_MAX_CONTROLLER_POLL; g5_poll_index++ ) + { + IRSCAN_in(); + DRSCAN_out(bits_to_shift, (DPUCHAR*)DPNULL, g5_poll_buf); + dp_delay(G5M_STANDARD_DELAY); + if ( ((g5_poll_buf[Busy_bit/8] & (1 << (Busy_bit % 8))) == 0x0u)) + { + break; + } + } + if(g5_poll_index > G5M_MAX_CONTROLLER_POLL) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDevice polling failed: "); + dp_display_array(g5_poll_buf,16,HEX); + #endif + error_code = DPE_POLL_ERROR; + } + + return; +} + +void dp_G5M_device_shift_and_poll(DPUCHAR bits_to_shift, DPUCHAR Busy_bit,DPUCHAR Variable_ID,DPULONG start_bit_index) +{ + for ( g5_poll_index = 0U; g5_poll_index <= G5M_MAX_CONTROLLER_POLL; g5_poll_index++ ) + { + IRSCAN_in(); + dp_get_and_DRSCAN_in_out(Variable_ID, bits_to_shift, start_bit_index, g5_poll_buf); + //DRSCAN_out(bits_to_shift, (DPUCHAR*)DPNULL, g5_poll_buf); + dp_delay(G5M_STANDARD_DELAY); + if ( ((g5_poll_buf[Busy_bit/8] & (1 << (Busy_bit % 8))) == 0x0u)) + { + break; + } + } + if(g5_poll_index > G5M_MAX_CONTROLLER_POLL) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDevice polling failed."); + #endif + error_code = DPE_POLL_ERROR; + } + + return; +} + +void dp_G5M_read_shared_buffer(DPUCHAR ucNumOfBlocks) +{ + + dp_flush_global_buf1(); + for (global_uchar1 = 0u; global_uchar1 < ucNumOfBlocks; global_uchar1++) + { + global_buf1[0] = (global_uchar1 << 1u); + opcode = G5M_READ_BUFFER; + IRSCAN_in(); + DRSCAN_in(0u, G5M_FRAME_STATUS_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + opcode = G5M_READ_BUFFER; + dp_G5M_device_poll(129u, 128u); + for (global_uchar2 = 0;global_uchar2 < 16u; global_uchar2++) + { + g5_shared_buf[global_uchar1*16u + global_uchar2] = g5_poll_buf[global_uchar2]; + } + } + + + return; +} + +void dp_G5M_poll_device_ready(void) +{ + opcode = G5M_ISC_NOOP; + for ( g5_poll_index = 0U; g5_poll_index <= G5M_MAX_CONTROLLER_POLL; g5_poll_index++ ) + { + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + DRSCAN_out(8u, (DPUCHAR*)DPNULL, g5_poll_buf); + + if ((g5_poll_buf[0] & 0x80u) == 0x0u) + { + break; + } + } + if(g5_poll_index > G5M_MAX_CONTROLLER_POLL) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDevice polling failed."); + #endif + error_code = DPE_POLL_ERROR; + } + + return; +} + +void dp_G5M_set_pgm_mode(void) +{ + opcode = G5M_MODE; + IRSCAN_in(); + DRSCAN_in(0u, G5M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + opcode = G5M_MODE; + dp_G5M_device_poll(8u, 7u); + + return; +} + +/**************************************************************************** +* Purpose: Loads the BSR regsiter with data specified in the data file. +* If BSR_SAMPLE is enabled, the data is not loaded. Instead, the last known +* State of the IOs is maintained by stepping through DRCapture JTAG state. +****************************************************************************/ +void dp_G5M_load_bsr(void) +{ + dp_G5M_check_core_status(); + + global_uint1 = (DPUINT) dp_get_bytes(G5M_Header_ID,G5M_NUMOFBSRBITS_OFFSET,G5M_NUMOFBSRBITS_BYTE_LENGTH); + opcode = ISC_SAMPLE; + IRSCAN_in(); + + #ifdef BSR_SAMPLE + /* Capturing the last known state of the IOs is only valid if the core + was programmed. Otherwise, load the BSR with what is in the data file. */ + if ((global_uchar1 & 0x4u) != 0x4u) + { + dp_get_bytes(G5M_BsrPattern_ID,0u,1u); + if (return_bytes) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: FPGA array is not programmed. Loading BSR register..."); + #endif + dp_get_and_DRSCAN_in(G5M_BsrPattern_ID, global_uint1, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nMaintaining last known IO states..."); + #endif + goto_jtag_state(JTAG_CAPTURE_DR,0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + #else + dp_get_bytes(G5M_BsrPattern_ID,0u,1u); + if (return_bytes) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nLoading BSR..."); + #endif + dp_get_and_DRSCAN_in(G5M_BsrPattern_ID, global_uint1, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + #endif + + return; +} + +void dp_G5M_perform_isc_enable(void) +{ + + g5_pgmmode_flag = TRUE; + dp_flush_global_buf1(); + global_buf1[0] |= (G5M_ALGO_VERSION & 0x3fu); + global_buf1[2] |= (G5M_DIRECTC_VERSION & 0x3fu) << 1u; + global_buf1[2] |= (DIRECTC_PROGRAMMING & 0x7u) << 7u; + global_buf1[3] |= (DIRECTC_PROGRAMMING & 0x7u) >> 1u; + global_buf1[3] |= (JTAG_PROGRAMMING_PROTOCOL & 0x7u) << 2u; + + opcode = G5M_ISC_ENABLE; + IRSCAN_in(); + DRSCAN_in(0u, ISC_STATUS_REGISTER_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + + opcode = G5M_ISC_ENABLE; + dp_G5M_device_poll(32u, 31u); + + + if ( (error_code != DPE_SUCCESS) || ((g5_poll_buf[0] & 0x1u) == 1u) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to enter programming mode."); + #endif + error_code = DPE_INIT_FAILURE; + } + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nISC_ENABLE_RESULT: "); + dp_display_array(g5_poll_buf,4u,HEX); + + /* Display CRCERR */ + global_uchar1 = g5_poll_buf[0] & 0x1u; + dp_display_text("\r\nCRCERR: "); + dp_display_value(global_uchar1,HEX); + #endif + + + return; +} +/* Enter programming mode */ +void dp_G5M_initialize(void) +{ + dp_G5M_poll_device_ready(); + if (error_code == DPE_SUCCESS) + { + dp_G5M_query_security(); + if ((error_code == DPE_SUCCESS) && ((g5_shared_buf[7] & G5M_UL_USER_KEY1) == G5M_UL_USER_KEY1) ) + { + dp_G5M_unlock_upk1(); + } + if ((error_code == DPE_SUCCESS) && ((g5_shared_buf[7] & G5M_UL_USER_KEY2) == G5M_UL_USER_KEY2) ) + { + dp_G5M_unlock_upk2(); + } + if (error_code == DPE_SUCCESS) + { + dp_G5M_load_bsr(); + if (error_code == DPE_SUCCESS) + { + dp_G5M_perform_isc_enable(); + } + } + } + + return; +} + + +/* Function is used to exit programming mode */ +void dp_G5M_exit(void) +{ + if (g5_pgmmode_flag == TRUE) + { + opcode = G5M_ISC_DISABLE; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + + opcode = G5M_ISC_DISABLE; + dp_G5M_device_poll(32u, 31u); + #ifdef ENABLE_DISPLAY + if (error_code != DPE_SUCCESS) + { + dp_display_text("\r\nFailed to disable programming mode."); + } + #endif + } + #ifdef ENABLE_DISPLAY + dp_G5M_read_fsn(); + #endif + goto_jtag_state(JTAG_TEST_LOGIC_RESET,5u); + return; +} + +void dp_G5M_set_mode(void) +{ + opcode = G5M_FRAME_INIT; + IRSCAN_in(); + DRSCAN_in(0u, G5M_STATUS_REGISTER_BIT_LENGTH, &g5_pgmmode); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + dp_G5M_device_poll(8u, 7u); + #ifdef ENABLE_DISPLAY + if (error_code != DPE_SUCCESS) + { + dp_display_text("r\nFailed to set programming mode."); + } + #endif + + return; +} + + +void dp_G5M_process_data(DPUCHAR BlockID) +{ + DataIndex = 0u; + /* Global unit1 is used to hold the number of components */ + /* Loop through the number of components */ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\n"); + #endif + + + for (; global_uint2 <= global_uint1; global_uint2++) + { + /* get the number of blocks */ + /* Global ulong1 is used to hold the number of blocks within the components */ + global_ulong1 = dp_get_bytes(G5M_NUMBER_OF_BLOCKS_ID,(DPULONG)(((global_uint2 - 1u) * 22u) / 8u),4u); + global_ulong1 >>= ((global_uint2 - 1U)* 22u) % 8u; + global_ulong1 &= 0x3FFFFFu; + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProcessing component "); + dp_display_value(global_uint2,DEC); + dp_display_text(". Please wait..."); + #endif + + opcode = G5M_FRAME_DATA; + IRSCAN_in(); + dp_get_and_DRSCAN_in(BlockID, G5M_FRAME_BIT_LENGTH, DataIndex); + + + #ifdef ENABLE_DISPLAY + old_progress = 0; + #endif + for (global_ulong2 = 1u; global_ulong2 <= global_ulong1; global_ulong2++) + { + #ifdef ENABLE_DISPLAY + new_progress = (global_ulong2 *100 / global_ulong1); + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + + opcode = G5M_FRAME_DATA; + if (global_ulong2 == global_ulong1) + { + dp_G5M_device_poll(128u, 127u); + } + else + { + dp_G5M_device_shift_and_poll(128u, 127u, BlockID, DataIndex + G5M_FRAME_BIT_LENGTH); + } + if ( ((error_code != DPE_SUCCESS) || ((g5_poll_buf[0] & 0x18u) != 0u)) ) + { + dp_G5M_get_data_status(); + #ifdef ENABLE_DISPLAY + dp_display_text("\r\ncomponentNo: "); + dp_display_value(global_uint2, DEC); + dp_display_text("\r\nblockNo: "); + dp_display_value(global_ulong2, DEC); + dp_display_text("\r\nDATA_STATUS_RESULT: "); + dp_display_array(g5_poll_buf,4u,HEX); + dp_display_text("\r\nERRORCODE: "); + dp_display_value((g5_poll_buf[0]>>3u) & 0x1fu,HEX); + dp_display_text("\r\nAUTHERRCODE: "); + dp_display_value(g5_poll_buf[1],HEX); + #endif + error_code = DPE_PROCESS_DATA_ERROR; + global_uint2 = global_uint1; + break; + } + + DataIndex += G5M_FRAME_BIT_LENGTH; + } + } + + return; +} + +void dp_G5M_get_data_status(void) +{ + opcode = G5M_FRAME_STATUS; + IRSCAN_in(); + DRSCAN_in(0u, G5M_DATA_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + + opcode = G5M_FRAME_STATUS; + dp_G5M_device_poll(G5M_DATA_STATUS_REGISTER_BIT_LENGTH, G5M_DATA_STATUS_REGISTER_BIT_LENGTH-1); + + return; +} + +void dp_G5M_read_security(void) +{ + dp_G5M_query_security(); + if (error_code == DPE_SUCCESS) + { + dp_G5M_unlock_dpk(); + if (error_code == DPE_SUCCESS) + { + dp_G5M_query_security(); + if (error_code == DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: Security cannot be read even after unlocking debug pass key."); + #endif + } + } + } + + return; +} +void dp_G5M_query_security(void) +{ + opcode = G5M_QUERY_SECURITY; + IRSCAN_in(); + DRSCAN_in(0u, G5M_SECURITY_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + opcode = G5M_QUERY_SECURITY; + dp_G5M_device_poll(16u, 15u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to query security information."); + #endif + } + else + { + dp_G5M_read_shared_buffer(1u); + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\n--- Security locks and configuration settings ---\r\n"); + dp_display_array(g5_shared_buf,16u,HEX); + #endif + } + return; +} + +void dp_G5M_unlock_dpk(void) +{ + dp_get_data(G5M_DPK_ID,0u); + if (return_bytes == 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: DPK data is missing."); + #endif + } + else + { + dp_G5M_load_dpk(); + if (error_code == DPE_SUCCESS) + { + opcode = G5M_UNLOCK_DEBUG_PASSCODE; + IRSCAN_in(); + DRSCAN_in(0u, G5M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + } + dp_G5M_device_poll(8u, 7u); + if ((error_code != DPE_SUCCESS) || ((g5_poll_buf[0] & 0x3u) != 0x1u) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to unlock debug pass key."); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDebug security (DPK) is unlocked."); + #endif + } + } + return; +} + + +void dp_G5M_unlock_upk1(void) +{ + dp_get_data(G5M_UPK1_ID,0u); + if (return_bytes == 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: UPK1 data is missing."); + #endif + } + else + { + dp_G5M_load_upk1(); + if (error_code == DPE_SUCCESS) + { + opcode = G5M_UNLOCK_USER_PASSCODE; + IRSCAN_in(); + DRSCAN_in(0u, G5M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + } + dp_G5M_device_poll(8u, 7u); + if ((error_code != DPE_SUCCESS) || ((g5_poll_buf[0] & 0x3u) != 0x1u) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to unlock user pass key 1."); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser security (DPK1) is unlocked."); + #endif + } + } + return; +} + +void dp_G5M_unlock_upk2(void) +{ + dp_get_data(G5M_UPK2_ID,0u); + if (return_bytes == 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: UPK2 data is missing."); + #endif + } + else + { + dp_G5M_load_upk2(); + if (error_code == DPE_SUCCESS) + { + opcode = G5M_UNLOCK_VENDOR_PASSCODE; + IRSCAN_in(); + DRSCAN_in(0u, G5M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + } + dp_G5M_device_poll(8u, 7u); + if ((error_code != DPE_SUCCESS) || ((g5_poll_buf[0] & 0x3u) != 0x1u) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to unlock user pass key 2."); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser security (DPK2) is unlocked."); + #endif + } + } + return; +} + + +void dp_G5M_load_dpk(void) +{ + opcode = G5M_KEYLO; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G5M_DPK_ID, G5M_FRAME_BIT_LENGTH, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + dp_G5M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keylo. \r\nkeylo_result: "); + dp_display_array(g5_poll_buf,G5M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + opcode = G5M_KEYHI; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G5M_DPK_ID, G5M_FRAME_BIT_LENGTH, G5M_FRAME_BIT_LENGTH); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + dp_G5M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keyhi. \r\nkeyhi_result: "); + dp_display_array(g5_poll_buf,G5M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + } + + return; +} + +void dp_G5M_load_upk1(void) +{ + opcode = G5M_KEYLO; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G5M_UPK1_ID, G5M_FRAME_BIT_LENGTH, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + dp_G5M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keylo. \r\nkeylo_result: "); + dp_display_array(g5_poll_buf,G5M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + opcode = G5M_KEYHI; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G5M_UPK1_ID, G5M_FRAME_BIT_LENGTH, G5M_FRAME_BIT_LENGTH); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + dp_G5M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keyhi. \r\nkeyhi_result: "); + dp_display_array(g5_poll_buf,G5M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + } + + return; +} + +void dp_G5M_load_upk2(void) +{ + opcode = G5M_KEYLO; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G5M_UPK2_ID, G5M_FRAME_BIT_LENGTH, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + dp_G5M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keylo. \r\nkeylo_result: "); + dp_display_array(g5_poll_buf,G5M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + else + { + opcode = G5M_KEYHI; + IRSCAN_in(); + dp_get_and_DRSCAN_in(G5M_UPK2_ID, G5M_FRAME_BIT_LENGTH, G5M_FRAME_BIT_LENGTH); + goto_jtag_state(JTAG_RUN_TEST_IDLE,G5M_STANDARD_CYCLES); + dp_delay(G5M_STANDARD_DELAY); + dp_G5M_device_poll(128u, 127u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to load keyhi. \r\nkeyhi_result: "); + dp_display_array(g5_poll_buf,G5M_FRAME_BYTE_LENGTH,HEX); + #endif + error_code = DPE_MATCH_ERROR; + } + } + + return; +} +#endif /* ENABLE_G5_SUPPORT */ + +/* *************** End of File *************** */ + + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G5Algo/dpG5alg.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G5Algo/dpG5alg.h new file mode 100644 index 0000000..e72428f --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/G5Algo/dpG5alg.h @@ -0,0 +1,320 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* DirectC Copyright (C) Microsemi Corporation 2014 */ +/* Version 3.1 Release date November 14, 2014 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpG5alg.h */ +/* */ +/* Description: Contains function prototypes. */ +/* */ +/* ************************************************************************ */ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ***************/ +/* +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the International Traffic in Arms Regulations, and the +sanctions laws administered by the Office of Foreign Assets Control including +any other U.S. Government regulation applicable to the export, re-export, or +disclosure of such controlled technical data (or the products thereof) to +Foreign Nationals, whether within or without the U.S., including those employed +by, or otherwise associated with, Licensee. Licensee shall obtain Licensor’s +written consent prior to submitting any request for authority to export any such +technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. +*/ + +#ifndef INC_DPG5ALG_H +#define INC_DPG5ALG_H + +/* +* Data block ID definitions +*/ +#define G5M_ALGO_VERSION 1u +#define DIRECTC_PROGRAMMING 2u +#define G5M_DIRECTC_VERSION 0u +#define SPI_PROGRAMMING_PROTOCOL 2u +#define JTAG_PROGRAMMING_PROTOCOL 3u + +#define G5M_Header_ID 0u +#define G5M_USER_INFO_ID 1u +#define G5M_ACT_UROW_DESIGN_NAME_ID 2u +#define G5M_BsrPattern_ID 3u +#define G5M_BsrPatternMask_ID 4u +#define G5M_NUMBER_OF_BLOCKS_ID 5u +#define G5M_UPK1_ID 6u +#define G5M_UPK2_ID 7u +#define G5M_datastream_ID 8u +#define G5M_erasedatastream_ID 9u +#define G5M_DPK_ID 13u + +#define G5M_DEVICE_FAMILY_OFFSET 36u +#define G5M_DEVICE_FAMILY_BYTE_LENGTH 1u +#define G5M_ID_OFFSET 37u +#define G5M_ID_BYTE_LENGTH 4u +#define G5M_ID_MASK_OFFSET 41u +#define G5M_ID_MASK_BYTE_LENGTH 4u +#define G5M_SILSIG_OFFSET 45u +#define G5M_SILSIG_BYTE_LENGTH 4u +#define G5M_CHECKSUM_OFFSET 49u +#define G5M_CHECKSUM_BYTE_LENGTH 2u +#define G5M_NUMOFBSRBITS_OFFSET 51u +#define G5M_NUMOFBSRBITS_BYTE_LENGTH 2u +#define G5M_NUMOFCOMPONENT_OFFSET 53u +#define G5M_NUMOFCOMPONENT_BYTE_LENGTH 2u +#define G5M_DATASIZE_OFFSET 55u +#define G5M_DATASIZE_BYTE_LENGTH 2u +#define G5M_ERASEDATASIZE_OFFSET 57u +#define G5M_ERASEDATASIZE_BYTE_LENGTH 2u +#define G5M_VERIFYDATASIZE_OFFSET 59u +#define G5M_VERIFYDATASIZE_BYTE_LENGTH 2u +#define G5M_ENVMDATASIZE_OFFSET 61u +#define G5M_ENVMDATASIZE_BYTE_LENGTH 2u +#define G5M_ENVMVERIFYDATASIZE_OFFSET 63u +#define G5M_ENVMVERIFYDATASIZE_BYTE_LENGTH 2u +#define G5M_UEK1_EXISTS_OFFSET 65u +#define G5M_UEK1_EXISTS_BYTE_LENGTH 1u +#define G5M_UEK2_EXISTS_OFFSET 66u +#define G5M_UEK2_EXISTS_BYTE_LENGTH 1u +#define G5M_DPK_EXISTS_OFFSET 67u +#define G5M_DPK_EXISTS_BYTE_LENGTH 1u + +#define G5M_FAMILY_ID_IN_DAT 0x7u + +/* +* G5Main JTAG instructions +*/ +#define G5M_ISC_ENABLE 0x0bu +#define G5M_ISC_DISABLE 0x0cu +#define G5M_ISC_NOOP 0x0du +#define G5M_FRAME_INIT 0xaeu +#define G5M_READ_DESIGN_INFO 0xa6u +#define G5M_READ_DEBUG_INFO 0xe7u +#define G5M_TVS_MONITOR 0xe3u +#define G5M_READ_BUFFER 0xf2u +#define G5M_READ_FSN 0xf0u +#define G5M_QUERY_SECURITY 0xb8u +#define G5M_MODE 0xafu +#define G5M_FRAME_DATA 0xeeu +#define G5M_FRAME_STATUS 0xd8u +#define G5M_KEYLO 0xebu +#define G5M_KEYHI 0xecu +#define G5M_AUXLO 0xe9u +#define G5M_AUXHI 0xeau +#define G5M_UNLOCK_DEBUG_PASSCODE 0xadu +#define G5M_UNLOCK_USER_PASSCODE 0xa8u +#define G5M_UNLOCK_VENDOR_PASSCODE 0xaau +#define G5M_MSSADDR 0xdbu +#define G5M_MSSRD 0xbdu +#define G5M_MSSWR 0xceu +#define G5M_READ_DEVICE_CERT 0xa2u +#define G5M_GENERATE_OTP 0xf3u +#define G5M_MATCH_OTP 0xedu +#define G5M_VALIDATE_KEYS 0xacu +#define G5M_CHECK_DIGESTS 0xbcu + +#define G5M_MAX_CONTROLLER_POLL 1000000u + +#define ISC_STATUS_REGISTER_BIT_LENGTH 32u +#define G5M_DATA_STATUS_REGISTER_BIT_LENGTH 64u +#define G5M_STANDARD_CYCLES 3u +#define G5M_STANDARD_DELAY 10u +#define G5M_MSSADDR_BIT_LENGTH 64u +#define G5M_MSSRD_BIT_LENGTH 16u +#define G5M_MSSWR_BIT_LENGTH 32u + +#define G5M_STATUS_REGISTER_BIT_LENGTH 8u +#define G5M_SECURITY_STATUS_REGISTER_BIT_LENGTH 16u +#define G5M_FRAME_BIT_LENGTH 128u +#define G5M_FRAME_STATUS_BIT_LENGTH 129u +#define G5M_FRAME_BYTE_LENGTH 16u + +#define G5M_FPGA 1u +#define G5M_KEYS 2u +#define G5M_ENVM 3u + +#define G5M_UL_USER_KEY1 0x2u +#define G5M_UL_USER_KEY2 0x4u +#define G5M_UL_EXTERNAL_DIGEST_CHECK 0x4u + + +DPUCHAR dp_top_g5 (void); +void dp_init_G5_vars(void); +void dp_check_G5_action(void); +void dp_perform_G5_action(void); + +/* Supported Actions */ +void dp_G5M_device_info_action(void); +void dp_G5M_erase_action(void); +void dp_G5M_program_action(void); +void dp_G5M_verify_action(void); +void dp_G5M_enc_data_authentication_action(void); +void dp_G5M_verify_digest_action(void); + +void dp_check_G5_device_ID (void); +void dp_G5M_read_version_code(void); +void dp_G5M_read_design_info(void); + +void dp_G5M_poll_device_ready(void); +void dp_G5M_check_core_status(void); +void dp_G5M_read_debug_info(void); +void dp_G5M_read_tvs_monitor(void); +void dp_G5M_read_fsn(void); +void dp_G5M_read_security(void); +void dp_G5M_query_security(void); +void dp_G5M_dump_security(void); +void dp_G5M_unlock_dpk(void); +void dp_G5M_unlock_upk1(void); +void dp_G5M_unlock_upk2(void); +void dp_G5M_load_dpk(void); +void dp_G5M_load_upk1(void); +void dp_G5M_load_upk2(void); +void dp_G5M_read_shared_buffer(DPUCHAR ucNumOfBlocks); +void dp_G5M_set_pgm_mode(void); +void dp_G5M_load_bsr(void); +void dp_G5M_perform_isc_enable(void); +void dp_G5M_process_data(DPUCHAR BlockID); +void dp_G5M_get_data_status(void); + + +/* Initialization functions */ +void dp_G5M_device_poll(DPUCHAR bits_to_shift, DPUCHAR Busy_bit); +void dp_G5M_device_shift_and_poll(DPUCHAR bits_to_shift, DPUCHAR Busy_bit,DPUCHAR Variable_ID,DPULONG start_bit_index); +void dp_G5M_initialize(void); +void dp_G5M_exit(void); +void dp_G5M_set_mode(void); + +/* Erase function */ +void dp_G5M_erase(void); +#endif /* INC_DPG5ALG_H */ + +/* *************** End of File *************** */ diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpchain.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpchain.c new file mode 100644 index 0000000..c4a51fd --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpchain.c @@ -0,0 +1,429 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpchain.c */ +/* */ +/* Description: Contains chain functions */ +/* */ +/* ************************************************************************ */ +#include "dpuser.h" +#include "dpchain.h" +#include "dpjtag.h" +#include "dpcom.h" + +#ifdef CHAIN_SUPPORT +/* ***************************************************************************** +* Variable that must be intialized with appropriate data depending on the chain +* configuration. See user guide for more information. +*******************************************************************************/ +DPUCHAR dp_preir_data[PREIR_DATA_SIZE]={0xff}; +DPUCHAR dp_predr_data[PREDR_DATA_SIZE]={0x0}; +DPUCHAR dp_postir_data[POSTIR_DATA_SIZE]={0xff}; +DPUCHAR dp_postdr_data[POSTDR_DATA_SIZE]={0x0}; + +DPUINT dp_preir_length = PREIR_LENGTH_VALUE; +DPUINT dp_predr_length = PREDR_LENGTH_VALUE; +DPUINT dp_postir_length = POSTIR_LENGTH_VALUE; +DPUINT dp_postdr_length = POSTDR_LENGTH_VALUE; + +/**************************************************************************** +* Purpose: clock data stored in tdi_data into the device. +* terminate is a flag needed to determine if shifting to pause state should +* be done with the last bit shift. +****************************************************************************/ +void dp_shift_in(DPULONG start_bit, DPUINT num_bits, DPUCHAR tdi_data[], DPUCHAR terminate) +{ + if (current_jtag_state == JTAG_SHIFT_IR) + { + if (dp_preir_length > 0U) + { + dp_do_shift_in(0U,dp_preir_length, dp_preir_data,0U); + } + if (dp_postir_length > 0U) + { + dp_do_shift_in(start_bit,num_bits, tdi_data,0U); + dp_do_shift_in(0U,dp_postir_length, dp_postir_data, terminate); + } + else + { + dp_do_shift_in(start_bit,num_bits, tdi_data,terminate); + } + } + else if (current_jtag_state == JTAG_SHIFT_DR) + { + if (dp_predr_length > 0U) + { + dp_do_shift_in(0U,dp_predr_length, dp_predr_data,0U); + } + if (dp_postdr_length > 0U) + { + dp_do_shift_in(start_bit,num_bits, tdi_data,0U); + dp_do_shift_in(0U,dp_postdr_length, dp_postdr_data, terminate); + } + else + { + dp_do_shift_in(start_bit,num_bits, tdi_data,terminate); + } + } + else + { + } + return; +} +/**************************************************************************** +* Purpose: clock data stored in tdi_data into the device. +* capture data coming out of tdo into tdo_data. +* This function will always clock data starting bit postion 0. +* Jtag state machine will always set the pauseDR or pauseIR state at the +* end of the shift. +****************************************************************************/ +void dp_shift_in_out(DPUINT num_bits, DPUCHAR tdi_data[], DPUCHAR tdo_data[]) +{ + if (current_jtag_state == JTAG_SHIFT_IR) + { + if (dp_preir_length > 0U) + { + dp_do_shift_in(0U,dp_preir_length, dp_preir_data,0U); + } + if (dp_postir_length > 0U) + { + dp_do_shift_in_out(num_bits, tdi_data,tdo_data,0U); + dp_do_shift_in(0U,dp_postir_length, dp_postir_data, 1U); + } + else + { + dp_do_shift_in_out(num_bits, tdi_data,tdo_data,1U); + } + } + else if (current_jtag_state == JTAG_SHIFT_DR) + { + if (dp_predr_length > 0U) + { + dp_do_shift_in(0U,dp_predr_length, dp_predr_data,0U); + } + if (dp_postdr_length > 0U) + { + dp_do_shift_in_out(num_bits, tdi_data,tdo_data,0U); + dp_do_shift_in(0U,dp_postdr_length, dp_postdr_data, 1U); + } + else + { + dp_do_shift_in_out(num_bits, tdi_data,tdo_data,1U); + } + } + else + { + } + return; +} + + +void dp_do_shift_in(DPULONG start_bit, DPUINT num_bits, DPUCHAR tdi_data[], DPUCHAR terminate) +{ + idx = (DPUCHAR) start_bit >> 3; + bit_buf = 1U << (DPUCHAR)(start_bit & 0x7U); + if (tdi_data == (DPUCHAR*)DPNULL) + { + data_buf = 0U; + } + else + { + data_buf = tdi_data[idx] >> ((DPUCHAR)(start_bit & 0x7U)); + } + if (terminate == 0U) + { + num_bits++; + } + while (--num_bits) + { + dp_jtag_tms_tdi(0U, data_buf&0x1U); + data_buf >>= 1; + bit_buf <<= 1; + if ((bit_buf & 0xffU) == 0U ) + { + bit_buf = 1U; + idx++; + if (tdi_data == (DPUCHAR*)DPNULL) + { + data_buf = 0U; + } + else + { + data_buf = tdi_data[idx]; + } + } + } + if (terminate) + { + dp_jtag_tms_tdi(1U, data_buf & 0x1U); + if (current_jtag_state == JTAG_SHIFT_IR) + { + current_jtag_state = JTAG_EXIT1_IR; + } + else if (current_jtag_state == JTAG_SHIFT_DR) + { + current_jtag_state = JTAG_EXIT1_DR; + } + else + { + } + } + return; +} + +void dp_do_shift_in_out(DPUINT num_bits, DPUCHAR tdi_data[], DPUCHAR tdo_data[], DPUCHAR terminate) +{ + bit_buf = 1U; + idx = 0U; + tdo_data[idx] = 0U; + + if (tdi_data == (DPUCHAR*)DPNULL) + { + data_buf = 0U; + } + else + { + data_buf = tdi_data[idx]; + } + + while (--num_bits) + { + if ((bit_buf & 0xffU) == 0U ) + { + bit_buf = 1U; + idx++; + tdo_data[idx] = 0U; + if (tdi_data == (DPUCHAR*)DPNULL) + { + data_buf = 0U; + } + else + { + data_buf = tdi_data[idx]; + } + } + if (dp_jtag_tms_tdi_tdo(0U, data_buf&0x1U)) + { + tdo_data[idx] |= bit_buf; + } + bit_buf <<= 1; + data_buf>>=1; + } + if ((bit_buf & 0xffU) == 0U ) + { + bit_buf = 1U; + idx++; + tdo_data[idx] = 0U; + if (tdi_data == (DPUCHAR*)DPNULL) + { + data_buf = 0U; + } + else + { + data_buf = tdi_data[idx]; + } + } + if(terminate) + { + if (dp_jtag_tms_tdi_tdo(1U, data_buf&0x1U)) + { + tdo_data[idx] |= bit_buf; + } + if (current_jtag_state == JTAG_SHIFT_IR) + { + current_jtag_state = JTAG_EXIT1_IR; + } + else if (current_jtag_state == JTAG_SHIFT_DR) + { + current_jtag_state = JTAG_EXIT1_DR; + } + else + { + } + } + else + { + if (dp_jtag_tms_tdi_tdo(0U, data_buf&0x1U)) + { + tdo_data[idx] |= bit_buf; + } + } + return; +} +/**************************************************************************** +* Purpose: Gets the data block specified by Variable_ID from the image dat +* file and clocks it into the device. +****************************************************************************/ +void dp_get_and_shift_in(DPUCHAR Variable_ID,DPUINT total_bits_to_shift, DPULONG start_bit_index) +{ + DPULONG page_start_bit_index; + DPUINT bits_to_shift; + DPUCHAR terminate; + page_start_bit_index = start_bit_index & 0x7U; + requested_bytes = (DPULONG) (page_start_bit_index + total_bits_to_shift + 7U) >> 3U; + + if (current_jtag_state == JTAG_SHIFT_IR) + { + if (dp_preir_length > 0U) + { + dp_do_shift_in(0U,dp_preir_length, dp_preir_data,0U); + } + } + else if (current_jtag_state == JTAG_SHIFT_DR) + { + if (dp_predr_length > 0U) + { + dp_do_shift_in(0U,dp_predr_length, dp_predr_data,0U); + } + } + else + { + } + + terminate = 0U; + while (requested_bytes) + { + page_buffer_ptr = dp_get_data(Variable_ID,start_bit_index); + + if (return_bytes >= requested_bytes ) + { + return_bytes = requested_bytes; + bits_to_shift = total_bits_to_shift; + terminate = 1U; + if (((current_jtag_state == JTAG_SHIFT_IR) && dp_postir_length) || ((current_jtag_state == JTAG_SHIFT_DR) && dp_postdr_length)) + { + terminate =0U; + } + } + else + { + bits_to_shift = (DPUCHAR) (return_bytes * 8U - page_start_bit_index); + } + dp_do_shift_in(page_start_bit_index, bits_to_shift, page_buffer_ptr,terminate); + + requested_bytes = requested_bytes - return_bytes; + total_bits_to_shift = total_bits_to_shift - bits_to_shift; + start_bit_index += bits_to_shift; + page_start_bit_index = start_bit_index & 0x7U; + } + + if (current_jtag_state == JTAG_SHIFT_IR) + { + if (dp_postir_length > 0U) + { + dp_do_shift_in(0U,dp_postir_length, dp_postir_data,1U); + } + } + else if (current_jtag_state == JTAG_SHIFT_DR) + { + if (dp_postdr_length > 0U) + { + dp_do_shift_in(0U,dp_postdr_length, dp_postdr_data,1U); + } + } + else + { + } + return; +} + +/**************************************************************************** +* Purpose: Get the data block specified by Variable_ID from the image dat +* file and clocks it into the device. Capture the data coming out of tdo +* into tdo_data +****************************************************************************/ +void dp_get_and_shift_in_out(DPUCHAR Variable_ID,DPUCHAR total_bits_to_shift, DPULONG start_bit_index,DPUCHAR* tdo_data) +{ + requested_bytes = ((DPULONG)total_bits_to_shift + 7u) >> 3u; + page_buffer_ptr = dp_get_data(Variable_ID,start_bit_index); + + if (return_bytes >= requested_bytes ) + { + return_bytes = requested_bytes; + dp_shift_in_out((DPUINT)total_bits_to_shift, page_buffer_ptr,tdo_data); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: Page buffer size is not big enough..."); + #endif + } + + return; +} +#endif + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpchain.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpchain.h new file mode 100644 index 0000000..6f64eaa --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpchain.h @@ -0,0 +1,111 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpchain.h */ +/* */ +/* Description: Definitions of chain constants, and functions */ +/* */ +/* ************************************************************************ */ + +#ifndef INC_DPCHAIN_H +#define INC_DPCHAIN_H +#ifdef CHAIN_SUPPORT + +#define PREIR_DATA_SIZE 1u +#define PREDR_DATA_SIZE 1u +#define POSTIR_DATA_SIZE 1u +#define POSTDR_DATA_SIZE 1u +#define PREIR_LENGTH_VALUE 0u +#define PREDR_LENGTH_VALUE 0u +#define POSTIR_LENGTH_VALUE 0u +#define POSTDR_LENGTH_VALUE 0u + +extern DPUCHAR dp_preir_data[PREIR_DATA_SIZE]; +extern DPUCHAR dp_predr_data[PREDR_DATA_SIZE]; +extern DPUCHAR dp_postir_data[POSTIR_DATA_SIZE]; +extern DPUCHAR dp_postdr_data[POSTDR_DATA_SIZE]; + +extern DPUINT dp_preir_length; +extern DPUINT dp_predr_length; +extern DPUINT dp_postir_length; +extern DPUINT dp_postdr_length; + +void dp_do_shift_in(DPULONG start_bit, DPUINT num_bits, DPUCHAR tdi_data[], DPUCHAR terminate); +void dp_do_shift_in_out(DPUINT num_bits, DPUCHAR tdi_data[], DPUCHAR tdo_data[], DPUCHAR terminate); +#endif /* CHAIN_SUPPORT */ +#endif /* INC_DPCHAIN_H */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpjtag.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpjtag.c new file mode 100644 index 0000000..1761302 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpjtag.c @@ -0,0 +1,535 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpjtag.c */ +/* */ +/* Description: Contains JTAG interface functions */ +/* */ +/* ************************************************************************ */ + +#include "dpuser.h" +#include "dputil.h" +#include "dpjtag.h" +#include "dpcom.h" +#include "dpchain.h" +#include "dpalg.h" + + +#ifdef ENABLE_EMBEDDED_SUPPORT +DPUCHAR current_jtag_state; +DPUCHAR idx; +DPUCHAR global_jtag_i; +DPUCHAR data_buf; +DPUCHAR bit_buf; +#endif + +/**************************************************************************** +* Purpose: This function is used to shift JTAG states. +****************************************************************************/ +void IRSCAN_in(void) +{ + #ifdef ENABLE_EMBEDDED_SUPPORT + goto_jtag_state(JTAG_SHIFT_IR,0u); + dp_shift_in(0u, OPCODE_BIT_LENGTH, &opcode, 1u); + goto_jtag_state(JTAG_PAUSE_IR,0u); + #endif + + + return; +} + +void IRSCAN_out(unsigned char* outbuf) +{ + #ifdef ENABLE_EMBEDDED_SUPPORT + goto_jtag_state(JTAG_SHIFT_IR,0u); + dp_shift_in_out(OPCODE_BIT_LENGTH, &opcode, outbuf); + goto_jtag_state(JTAG_PAUSE_IR,0u); + #endif + + + return; +} + + +void DRSCAN_out(unsigned int bits_to_shift,unsigned char* inbuf,unsigned char* outbuf) +{ + #ifdef ENABLE_EMBEDDED_SUPPORT + goto_jtag_state(JTAG_SHIFT_DR,0u); + dp_shift_in_out(bits_to_shift, inbuf, outbuf); + goto_jtag_state(JTAG_PAUSE_DR,0u); + #endif + + return; +} + +void DRSCAN_in(unsigned long start_bit_index, unsigned int bits_to_shift,unsigned char* inbuf) +{ + #ifdef ENABLE_EMBEDDED_SUPPORT + goto_jtag_state(JTAG_SHIFT_DR,0u); + dp_shift_in(start_bit_index, bits_to_shift, inbuf, 1u); + goto_jtag_state(JTAG_PAUSE_DR,0u); + #endif + + return; +} + + +void dp_get_and_DRSCAN_in(DPUCHAR Variable_ID,DPUINT total_bits_to_shift, DPULONG start_bit_index) +{ + #ifdef ENABLE_EMBEDDED_SUPPORT + goto_jtag_state(JTAG_SHIFT_DR,0u); + dp_get_and_shift_in(Variable_ID, total_bits_to_shift, start_bit_index); + goto_jtag_state(JTAG_PAUSE_DR,0u); + #endif + + return; +} + + +void dp_get_and_DRSCAN_in_out(DPUCHAR Variable_ID,DPUCHAR total_bits_to_shift, DPULONG start_bit_index,DPUCHAR* tdo_data) +{ + #ifdef ENABLE_EMBEDDED_SUPPORT + goto_jtag_state(JTAG_SHIFT_DR,0u); + dp_get_and_shift_in_out(Variable_ID, total_bits_to_shift, start_bit_index,tdo_data); + goto_jtag_state(JTAG_PAUSE_DR,0u); + #endif + + return; +} + +/**************************************************************************** +* Purpose: This function is used to shift JTAG states. +****************************************************************************/ +#ifdef ENABLE_EMBEDDED_SUPPORT +void goto_jtag_state(DPUCHAR target_state, DPUCHAR cycles) +#endif +{ + #ifdef ENABLE_EMBEDDED_SUPPORT + DPUCHAR count = 0u; + DPUCHAR tms_bits = 0u; + if (target_state != current_jtag_state) + { + switch (target_state) { + + case JTAG_TEST_LOGIC_RESET: + dp_jtag_init(); + count = 5u; + tms_bits = 0x1Fu; + break; + + case JTAG_SHIFT_DR: + if ((current_jtag_state == JTAG_TEST_LOGIC_RESET) || (current_jtag_state == JTAG_RUN_TEST_IDLE)) + { + count = 4u; + tms_bits = 0x2u; + } + else if ((current_jtag_state == JTAG_PAUSE_IR) || (current_jtag_state == JTAG_PAUSE_DR)) + { + count = 5u; + tms_bits = 0x7u; + } + else + { + } + break; + + case JTAG_SHIFT_IR: + if ((current_jtag_state == JTAG_TEST_LOGIC_RESET) || (current_jtag_state == JTAG_RUN_TEST_IDLE)) + { + count = 5u; + tms_bits = 0x6u; + } + else if ((current_jtag_state == JTAG_PAUSE_DR) || (current_jtag_state == JTAG_PAUSE_IR)) + { + count = 6u; + tms_bits = 0xfu; + } + else if (current_jtag_state == JTAG_UPDATE_DR) + { + count = 4u; + tms_bits = 0x3u; + } + else + { + } + break; + + case JTAG_RUN_TEST_IDLE: + if (current_jtag_state == JTAG_TEST_LOGIC_RESET) + { + count = 1u; + tms_bits = 0x0u; + } + else if ((current_jtag_state == JTAG_EXIT1_IR) || (current_jtag_state == JTAG_EXIT1_DR)) + { + count = 2u; + tms_bits = 0x1u; + } + else if ((current_jtag_state == JTAG_PAUSE_DR) || (current_jtag_state == JTAG_PAUSE_IR)) + { + count = 3u; + tms_bits = 0x3u; + } + else if (current_jtag_state == JTAG_CAPTURE_DR) + { + count = 3u; + tms_bits = 0x3u; + } + else + { + } + break; + + case JTAG_PAUSE_IR: + if (current_jtag_state == JTAG_EXIT1_IR) + { + count = 1u; + tms_bits = 0x0u; + } + break; + + case JTAG_PAUSE_DR: + if (current_jtag_state == JTAG_EXIT1_DR) + { + count = 1u; + tms_bits = 0x0u; + } + else if (current_jtag_state == JTAG_RUN_TEST_IDLE) + { + count = 4u; + tms_bits = 0x5u; + } + else + { + } + break; + + case JTAG_UPDATE_DR: + if ((current_jtag_state == JTAG_EXIT1_DR) || (current_jtag_state == JTAG_EXIT1_IR)) + { + count = 1u; + tms_bits = 0x1u; + } + else if (current_jtag_state == JTAG_PAUSE_DR) + { + count = 2u; + tms_bits = 0x3u; + } + else + { + } + break; + + case JTAG_CAPTURE_DR: + if (current_jtag_state == JTAG_PAUSE_IR) + { + count = 5u; + tms_bits = 0xeu; + } + else + { + } + break; + + default: + error_code = DPE_JTAG_STATE_NOT_HANDLED; + break; + } + + for (global_jtag_i = 0u; global_jtag_i < count; global_jtag_i++) + { + dp_jtag_tms(tms_bits&0x1u); + tms_bits >>= 1u; + } + current_jtag_state = target_state; + } + for (global_jtag_i=0u; global_jtag_i < cycles; global_jtag_i++) + { + dp_jtag_tms(0u); + } + #endif + + return; +} + + +void dp_wait_cycles(DPUCHAR cycles) +{ + #ifdef ENABLE_EMBEDDED_SUPPORT + for (global_jtag_i=0U; global_jtag_i < cycles; global_jtag_i++) + { + dp_jtag_tms(0U); + } + #endif + return; +} + +#ifdef ENABLE_EMBEDDED_SUPPORT +#ifndef CHAIN_SUPPORT +/**************************************************************************** +* Purpose: clock data stored in tdi_data into the device. +* terminate is a flag needed to determine if shifting to pause state should +* be done with the last bit shift. +****************************************************************************/ +void dp_shift_in(DPULONG start_bit, DPUINT num_bits, DPUCHAR tdi_data[], DPUCHAR terminate) +{ + idx = (DPUCHAR) start_bit >> 3; + bit_buf = 1U << (DPUCHAR)(start_bit & 0x7U); + if (tdi_data == (DPUCHAR*)DPNULL) + { + data_buf = 0U; + } + else + { + data_buf = tdi_data[idx] >> ((DPUCHAR)(start_bit & 0x7U)); + } + if (terminate == 0U) + { + num_bits++; + } + while (--num_bits) + { + dp_jtag_tms_tdi(0U, data_buf&0x1U); + data_buf >>= 1; + bit_buf <<= 1; + if ((bit_buf & 0xffU) == 0U ) + { + bit_buf = 1U; + idx++; + if (tdi_data == (DPUCHAR*)DPNULL) + { + data_buf = 0U; + } + else + { + data_buf = tdi_data[idx]; + } + } + } + if (terminate) + { + dp_jtag_tms_tdi(1U, data_buf & 0x1U); + if (current_jtag_state == JTAG_SHIFT_IR) + { + current_jtag_state = JTAG_EXIT1_IR; + } + else if (current_jtag_state == JTAG_SHIFT_DR) + { + current_jtag_state = JTAG_EXIT1_DR; + } + else + { + } + } + return; +} +/**************************************************************************** +* Purpose: clock data stored in tdi_data into the device. +* capture data coming out of tdo into tdo_data. +* This function will always clock data starting bit postion 0. +* Jtag state machine will always be set the pauseDR or pauseIR state at the +* end of the shift. +****************************************************************************/ +void dp_shift_in_out(DPUINT num_bits, DPUCHAR tdi_data[], DPUCHAR tdo_data[]) +{ + bit_buf = 1U; + idx = 0U; + tdo_data[idx] = 0U; + if (tdi_data == (DPUCHAR*)DPNULL) + { + data_buf = 0U; + } + else + { + data_buf = tdi_data[idx]; + } + + while (--num_bits) + { + if ((bit_buf & 0xffU) == 0U ) + { + bit_buf = 1U; + idx++; + tdo_data[idx] = 0U; + if (tdi_data == (DPUCHAR*)DPNULL) + { + data_buf = 0U; + } + else + { + data_buf = tdi_data[idx]; + } + } + if (dp_jtag_tms_tdi_tdo(0U, data_buf&0x1U)) + { + tdo_data[idx] |= bit_buf; + } + bit_buf <<= 1U; + data_buf >>= 1U; + } + if ((bit_buf & 0xffU) == 0U ) + { + bit_buf = 1U; + idx++; + tdo_data[idx] = 0U; + if (tdi_data == (DPUCHAR*)DPNULL) + { + data_buf = 0U; + } + else + { + data_buf = tdi_data[idx]; + } + } + if (dp_jtag_tms_tdi_tdo(1U, data_buf&0x1U)) + { + tdo_data[idx] |= bit_buf; + } + if (current_jtag_state == JTAG_SHIFT_IR) + { + current_jtag_state = JTAG_EXIT1_IR; + } + else if (current_jtag_state == JTAG_SHIFT_DR) + { + current_jtag_state = JTAG_EXIT1_DR; + } + else + { + } + return; +} +/**************************************************************************** +* Purpose: Get the data block specified by Variable_ID from the image dat +* file and clocks it into the device. +****************************************************************************/ +void dp_get_and_shift_in(DPUCHAR Variable_ID,DPUINT total_bits_to_shift, DPULONG start_bit_index) +{ + DPULONG page_start_bit_index; + DPUINT bits_to_shift; + DPUCHAR terminate; + page_start_bit_index = start_bit_index & 0x7U; + requested_bytes = (page_start_bit_index + total_bits_to_shift + 7U) >> 3U; + + terminate = 0U; + while (requested_bytes) + { + page_buffer_ptr = dp_get_data(Variable_ID,start_bit_index); + if (return_bytes >= requested_bytes ) + { + return_bytes = requested_bytes; + bits_to_shift = total_bits_to_shift; + terminate = 1U; + } + else + { + bits_to_shift = (DPUCHAR) (return_bytes * 8U - page_start_bit_index); + } + dp_shift_in(page_start_bit_index, bits_to_shift, page_buffer_ptr,terminate); + + requested_bytes = requested_bytes - return_bytes; + total_bits_to_shift = total_bits_to_shift - bits_to_shift; + start_bit_index += bits_to_shift; + page_start_bit_index = start_bit_index & 0x7u; + } + return; +} +/**************************************************************************** +* Purpose: Get the data block specified by Variable_ID from the image dat +* file and clocks it into the device. Capture the data coming out of tdo +* into tdo_data +****************************************************************************/ +void dp_get_and_shift_in_out(DPUCHAR Variable_ID,DPUCHAR total_bits_to_shift, DPULONG start_bit_index,DPUCHAR* tdo_data) +{ + requested_bytes = ( ( (DPULONG) total_bits_to_shift ) + 7U) >> 3U; + page_buffer_ptr = dp_get_data(Variable_ID,start_bit_index); + + if (return_bytes >= requested_bytes ) + { + return_bytes = requested_bytes; + dp_shift_in_out( (DPUINT) total_bits_to_shift, page_buffer_ptr,tdo_data); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nError: Page buffer size is not big enough..."); + #endif + } + + return; +} +#endif +#endif + +/* *************** End of File *************** */ diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpjtag.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpjtag.h new file mode 100644 index 0000000..897cf55 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/JTAG/dpjtag.h @@ -0,0 +1,130 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpjtag.h */ +/* */ +/* Description: Definitions of JTAG constants, types, and functions */ +/* */ +/* ************************************************************************ */ +#ifndef INC_DPJTAG_H +#define INC_DPJTAG_H + +/****************************************************************************/ +/* JTAG states codes used to identify current and target JTAG states */ +/****************************************************************************/ +#define JTAG_TEST_LOGIC_RESET 1u +#define JTAG_RUN_TEST_IDLE 2u +#define JTAG_SHIFT_DR 3u +#define JTAG_SHIFT_IR 4u +#define JTAG_EXIT1_DR 5u +#define JTAG_EXIT1_IR 6u +#define JTAG_PAUSE_DR 7u +#define JTAG_PAUSE_IR 8u +#define JTAG_UPDATE_DR 9u +#define JTAG_UPDATE_IR 10u +#define JTAG_CAPTURE_DR 11u + +/****************************************************************************/ +/* Function prototypes */ +/****************************************************************************/ +#ifdef ENABLE_EMBEDDED_SUPPORT +void goto_jtag_state(DPUCHAR target_state,DPUCHAR cycles); +void dp_shift_in(DPULONG start_bit, DPUINT num_bits, DPUCHAR tdi_data[],DPUCHAR terminate); +void dp_shift_in_out(DPUINT num_bits, DPUCHAR tdi_data[],DPUCHAR tdo_data[]); +void dp_get_and_shift_in(DPUCHAR Variable_ID,DPUINT total_bits_to_shift, DPULONG start_bit_index); +void dp_get_and_shift_in_out(DPUCHAR Variable_ID,DPUCHAR total_bits_to_shift, DPULONG start_bit_index,DPUCHAR* tdo_data); +#endif + + +void dp_wait_cycles(DPUCHAR cycles); +void IRSCAN_in(void); +void IRSCAN_out(unsigned char* outbuf); +void DRSCAN_in(unsigned long start_bit_index, unsigned int bits_to_shift,unsigned char* inbuf); +void DRSCAN_out(unsigned int bits_to_shift,unsigned char* inbuf,unsigned char* outbuf); +void dp_get_and_DRSCAN_in(DPUCHAR Variable_ID,DPUINT total_bits_to_shift, DPULONG start_bit_index); +void dp_get_and_DRSCAN_in_out(DPUCHAR Variable_ID,DPUCHAR total_bits_to_shift, DPULONG start_bit_index,DPUCHAR* tdo_data); + +#ifdef ENABLE_EMBEDDED_SUPPORT +extern DPUCHAR global_jtag_i; +extern DPUCHAR current_jtag_state; +extern DPUCHAR idx; +extern DPUCHAR data_buf; +extern DPUCHAR bit_buf; +#endif +extern DPUCHAR error_code; + +#endif /* INC_DPJTAG_H */ + +/* *************** End of File *************** */ diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/RTG4Algo/dpRTG4alg.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/RTG4Algo/dpRTG4alg.c new file mode 100644 index 0000000..f5e2e9e --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/RTG4Algo/dpRTG4alg.c @@ -0,0 +1,1058 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpRTG4alg.c */ +/* */ +/* Description: Contains initialization and data checking functions. */ +/* */ +/* ************************************************************************ */ + +#include "dpuser.h" +#ifdef ENABLE_RTG4_SUPPORT +#include "dputil.h" +#include "dpcom.h" +#include "dpalg.h" +#include "dpRTG4alg.h" +#include "dpjtag.h" + +DPUCHAR rtg4_pgmmode; +DPUCHAR rtg4_pgmmode_flag; +DPUCHAR rtg4_shared_buf[688]; // Maximum of 768 +DPUCHAR rtg4_poll_buf[17]; +DPULONG rtg4_poll_index; + + +/**************************************************************************** +* Purpose: main entry function +* This function needs to be called from the main application function with +* the approppriate action code set to intiate the desired action. +****************************************************************************/ +DPUCHAR dp_top_rtg4 (void) +{ + dp_init_vars(); + dp_init_RTG4_vars(); + goto_jtag_state(JTAG_TEST_LOGIC_RESET,0u); + dp_check_RTG4_action(); + if (error_code == DPE_SUCCESS) + { + dp_perform_RTG4_action(); + } + + return error_code; +} + +void dp_init_RTG4_vars(void) +{ + rtg4_pgmmode_flag = FALSE; + return; +} + +void dp_RTG4_exit_avionics_mode(void) +{ + /* In order to exit avioncs mode, trstb must be held high and then either power cycle the device + or toggle devrst pin */ + return; +} + + +void dp_check_RTG4_action(void) +{ + if ( (Action_code == DP_READ_IDCODE_ACTION_CODE) || (Action_code == DP_DEVICE_INFO_ACTION_CODE) ) + { + #ifndef ENABLE_DISPLAY + error_code = DPE_CODE_NOT_ENABLED; + #endif + } + else if (! ( + (Action_code == DP_ERASE_ACTION_CODE) || + (Action_code == DP_PROGRAM_ACTION_CODE) || + (Action_code == DP_VERIFY_ACTION_CODE) || + (Action_code == DP_CHECK_BITSTREAM_ACTION_CODE) || + (Action_code == DP_VERIFY_DIGEST_ACTION_CODE) + )) + { + error_code = DPE_ACTION_NOT_SUPPORTED; + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nInvalid action."); + #endif + } + return; +} + +void dp_perform_RTG4_action (void) +{ + #ifdef ENABLE_DISPLAY + if (Action_code == DP_READ_IDCODE_ACTION_CODE) + { + dp_read_idcode_action(); + Action_done = TRUE; + } + else if (Action_code == DP_DEVICE_INFO_ACTION_CODE) + { + dp_RTG4M_device_info_action(); + Action_done = TRUE; + } + #endif + if (Action_done == FALSE) + { + dp_check_image_crc(); + if (error_code == DPE_SUCCESS) + { + dp_check_RTG4_device_ID(); + if (error_code == DPE_SUCCESS) + { + switch (Action_code) + { + case DP_ERASE_ACTION_CODE: + dp_RTG4M_erase_action(); + break; + case DP_PROGRAM_ACTION_CODE: + dp_RTG4M_program_action(); + break; + case DP_VERIFY_ACTION_CODE: + dp_RTG4M_verify_action(); + break; + case DP_CHECK_BITSTREAM_ACTION_CODE: + dp_RTG4M_check_bitstream_action(); + break; + case DP_VERIFY_DIGEST_ACTION_CODE: + dp_RTG4M_verify_digest_action(); + break; + } + } + } + } + dp_RTG4M_exit(); + return; +} + + +void dp_RTG4M_erase_action(void) +{ + dp_RTG4M_initialize(); + if (error_code == DPE_SUCCESS) + { + rtg4_pgmmode = 0x1u; + dp_RTG4M_set_mode(); + + if (error_code == DPE_SUCCESS) + { + + /* Global unit1 is used to hold the number of components */ + global_uint2 = 2u; + dp_RTG4M_process_data(RTG4M_erasedatastream_ID); + if(error_code != DPE_SUCCESS) + { + error_code = DPE_ERASE_ERROR; + } + } + } + return; +} + +void dp_RTG4M_program_action(void) +{ + dp_RTG4M_initialize(); + + if (error_code == DPE_SUCCESS) + { + rtg4_pgmmode = 0x1u; + dp_RTG4M_set_mode(); + } + if (error_code == DPE_SUCCESS) + { + + global_uint2 = 1u; + dp_RTG4M_process_data(RTG4M_datastream_ID); + if(error_code != DPE_SUCCESS) + { + error_code = DPE_CORE_PROGRAM_ERROR; + } + + } + + return; +} + +void dp_RTG4M_verify_action(void) +{ + dp_RTG4M_initialize(); + + if (error_code == DPE_SUCCESS) + { + rtg4_pgmmode = 0x2u; + dp_RTG4M_set_mode(); + } + if (error_code == DPE_SUCCESS) + { + + global_uint2 = 1u; + dp_RTG4M_process_data(RTG4M_datastream_ID); + if(error_code != DPE_SUCCESS) + { + error_code = DPE_CORE_PROGRAM_ERROR; + } + } + + return; +} + +void dp_RTG4M_check_bitstream_action(void) +{ + dp_RTG4M_initialize(); + if (error_code == DPE_SUCCESS) + { + rtg4_pgmmode = 0x0u; + dp_RTG4M_set_mode(); + + if (error_code == DPE_SUCCESS) + { + /* Global unit2 is used to hold the number of components */ + global_uint2 = 1u; + dp_RTG4M_process_data(RTG4M_datastream_ID); + if(error_code != DPE_SUCCESS) + { + error_code = DPE_AUTHENTICATION_FAILURE; + } + } + } + return; +} + +void dp_RTG4M_verify_digest_action(void) +{ + dp_RTG4M_initialize(); + if (error_code == DPE_SUCCESS) + { + + opcode = RTG4M_VERIFY_DIGEST; + IRSCAN_in(); + dp_flush_global_buf1(); + global_buf1[0] = 0x1u; + DRSCAN_in(0u, RTG4M_STATUS_REGISTER_BIT_LENGTH, global_buf1); + + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + dp_delay(RTG4M_STANDARD_DELAY); + + + opcode = RTG4M_VERIFY_DIGEST; + dp_RTG4M_device_poll(64u, 63u); + if (error_code == DPE_SUCCESS) + { + if (( rtg4_poll_buf[1] & 0x40u) == 0x40u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFPGA array digest check is disabled."); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + else if (( rtg4_poll_buf[1] & 0x80u) == 0x80u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDevice is blank."); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFCRC: "); + dp_display_array(&rtg4_poll_buf[2],4u,HEX); + #endif + if (( rtg4_poll_buf[0] & 0x1u) == 0x1u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFPGA Fabric digest verification: PASS."); + #endif + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFPGA Fabric digest verification: FAIL."); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + if (( rtg4_poll_buf[0] & 0x4u) == 0x0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFactory row segment digest verification: FAIL."); + #endif + error_code = DPE_VERIFY_DIGEST_ERROR; + } + } + } + } + return; +} + +void dp_RTG4M_check_core_status(void) +{ + + opcode = RTG4M_ISC_NOOP; + IRSCAN_out(&global_uchar1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,1u); + + #ifdef ENABLE_DISPLAY + if ((global_uchar1 & 0x4u) == 0x4u) + { + dp_display_text("\r\nFPGA Array is programmed and enabled."); + } + else + { + dp_display_text("\r\nFPGA Array is not enabled."); + } + #endif + + return; +} + + +#ifdef ENABLE_DISPLAY +void dp_RTG4M_device_info_action(void) +{ + dp_RTG4M_initialize(); + dp_read_idcode(); + + + opcode = USERCODE; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,1u); + DRSCAN_out(IDCODE_LENGTH, (DPUCHAR*)DPNULL, global_buf1); + dp_display_text("\r\nSILSIG: "); + dp_display_array(global_buf1,4,HEX); + + + dp_RTG4M_check_core_status(); + dp_RTG4M_read_design_info(); + dp_RTG4M_read_prog_info(); + dp_RTG4M_query_security(); + dp_RTG4M_read_digest(); + + return; +} + +void dp_RTG4M_read_design_info(void) +{ + opcode = RTG4M_READ_DESIGN_INFO; + IRSCAN_in(); + DRSCAN_in(0u, RTG4M_DESIGN_INFO_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + dp_delay(RTG4M_STANDARD_DELAY); + opcode = RTG4M_READ_DESIGN_INFO; + dp_RTG4M_device_poll(8u, 7u); + if (error_code == DPE_SUCCESS) + { + dp_RTG4M_read_shared_buffer(4u); + + if (error_code == DPE_SUCCESS) + { + dp_display_text("\r\nREAD_DESIGN_INFO:\r\n"); + dp_display_array(rtg4_shared_buf,50u,HEX); + + dp_display_text("\r\nDesign Name: "); + + for (global_uchar1 = 2u; global_uchar1 < 32u; global_uchar1++) + { + dp_display_value(rtg4_shared_buf[global_uchar1],CHR); + } + dp_display_text("\r\nChecksum: "); + dp_display_array(rtg4_shared_buf,2u,HEX); + dp_display_text("\r\nDESIGNVER: "); + dp_display_array(&rtg4_shared_buf[32],2u,HEX); + } + } + return; +} + +void dp_RTG4M_read_prog_info(void) +{ + opcode = RTG4M_READ_PROG_INFO; + IRSCAN_in(); + DRSCAN_in(0u, RTG4M_FRAME_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + dp_delay(RTG4M_STANDARD_DELAY); + + opcode = RTG4M_READ_PROG_INFO; + dp_RTG4M_device_poll(128u, 127u); + if (error_code == DPE_SUCCESS) + { + dp_display_text("\r\nPROG_INFO: "); + dp_display_array(rtg4_poll_buf,16u,HEX); + if ( ((rtg4_poll_buf[8] & 0x3f) != 0u) && ((rtg4_poll_buf[8] & 0x3f) != 0x3fu) ) + { + dp_display_text("\r\nAlgorithm Version: "); + dp_display_value((rtg4_poll_buf[8] & 0x3f),DEC); + } + + global_uchar1 = ((rtg4_poll_buf[8] >> 6) | (rtg4_poll_buf[9] << 2)) & 0xfu; + dp_display_text("\r\nProgrammer code: "); + dp_display_value(global_uchar1, DEC); + + global_uchar1 = ((rtg4_poll_buf[10] >> 1)) & 0x3fu; + dp_display_text("\r\nSoftware version code: "); + dp_display_value(global_uchar1, DEC); + + global_uchar1 = ((rtg4_poll_buf[10] >> 7) | (rtg4_poll_buf[11] << 1)) & 0x7u; + dp_display_text("\r\nProgramming Software code: "); + dp_display_value(global_uchar1, DEC); + + global_uchar1 = ((rtg4_poll_buf[11] >> 2)) & 0x7u; + dp_display_text("\r\nProgramming Interface Protocol code: "); + dp_display_value(global_uchar1, DEC); + + global_uchar1 = ((rtg4_poll_buf[11] >> 5)) & 0x7u; + dp_display_text("\r\nProgramming File Type code: "); + dp_display_value(global_uchar1, DEC); + + } + + return; +} + +void dp_RTG4M_read_dsn(void) +{ + opcode = RTG4M_READ_DSN; + IRSCAN_in(); + DRSCAN_in(0u, RTG4M_FRAME_STATUS_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + opcode = RTG4M_READ_DSN; + dp_RTG4M_device_poll(129u, 128u); + dp_display_text("\r\n====================================================================="); + dp_display_text("\r\nDSN: "); + dp_display_array(rtg4_poll_buf, 16u, HEX); + dp_display_text("\r\n====================================================================="); + + return; +} + + +void dp_RTG4M_read_digest(void) +{ + opcode = RTG4M_READ_DIGEST; + IRSCAN_in(); + DRSCAN_in(0u, RTG4M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + dp_delay(RTG4M_STANDARD_DELAY); + opcode = RTG4M_READ_DIGEST; + dp_RTG4M_device_poll(64u, 63u); + if (error_code == DPE_SUCCESS) + { + if (( rtg4_poll_buf[0] & 0x1u) == 0x1u) + { + dp_display_text("\r\nFPGA array digest read is protected."); + } + else if (( rtg4_poll_buf[0] & 0x2u) == 0x2u) + { + dp_display_text("\r\nDevice is blank and digest cannot be read."); + } + else if (( rtg4_poll_buf[0] & 0x4u) == 0x4u) + { + dp_display_text("\r\nFailed to read digest."); + } + else + { + dp_display_text("\r\nFCRC: "); + dp_display_array(&rtg4_poll_buf[2],4u,HEX); + } + } + return; +} + +#endif + +/* Checking device ID function. ID is already read in dpalg.c */ +void dp_check_RTG4_device_ID (void) +{ + + /* DataIndex is a variable used for loading the array data but not used now. + * Therefore, it can be used to store the Data file ID for */ + DataIndex = dp_get_bytes(Header_ID,RTG4M_ID_OFFSET,RTG4M_ID_BYTE_LENGTH); + + global_ulong1 = dp_get_bytes(Header_ID,RTG4M_ID_MASK_OFFSET,4U); + + device_ID &= global_ulong1; + DataIndex &= global_ulong1; + + + /* Identifying target device and setting its parms */ + if ( (DataIndex & 0xfff) == MICROSEMI_ID) + { + if (device_ID == DataIndex ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nActID = "); + dp_display_value(device_ID,HEX); + dp_display_text(" ExpID = "); + dp_display_value(DataIndex,HEX); + dp_display_text("\r\nDevice Rev = "); + dp_display_value(device_rev,HEX); + #endif + device_family = (DPUCHAR) dp_get_bytes(Header_ID,RTG4M_DEVICE_FAMILY_OFFSET,RTG4M_DEVICE_FAMILY_BYTE_LENGTH); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text(" ExpID = "); + dp_display_value(DataIndex,HEX); + #endif + error_code = DPE_IDCODE_ERROR; + } + } + else + { + error_code = DPE_IDCODE_ERROR; + } + + return; +} + +/* Check if system controller is ready to enter programming mode */ +void dp_RTG4M_device_poll(DPUCHAR bits_to_shift, DPUCHAR Busy_bit) +{ + for ( rtg4_poll_index = 0U; rtg4_poll_index <= RTG4M_MAX_CONTROLLER_POLL; rtg4_poll_index++ ) + { + IRSCAN_in(); + DRSCAN_out(bits_to_shift, (DPUCHAR*)DPNULL, rtg4_poll_buf); + dp_delay(RTG4M_STANDARD_DELAY); + if ( ((rtg4_poll_buf[Busy_bit/8] & (1 << (Busy_bit % 8))) == 0x0u)) + { + break; + } + } + if(rtg4_poll_index > RTG4M_MAX_CONTROLLER_POLL) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDevice polling failed."); + #endif + error_code = DPE_POLL_ERROR; + } + + return; +} + +void dp_RTG4M_read_shared_buffer(DPUCHAR ucNumOfBlocks) +{ + + dp_flush_global_buf1(); + + for (global_uchar1 = 0u; global_uchar1 < ucNumOfBlocks; global_uchar1++) + { + global_buf1[0] = (global_uchar1 << 1u); + opcode = RTG4M_READ_BUFFER; + IRSCAN_in(); + DRSCAN_in(0u, RTG4M_FRAME_STATUS_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + dp_delay(RTG4M_STANDARD_DELAY); + opcode = RTG4M_READ_BUFFER; + dp_RTG4M_device_poll(129u, 128u); + for (global_uchar2 = 0;global_uchar2 < 16u; global_uchar2++) + { + rtg4_shared_buf[global_uchar1*16u + global_uchar2] = rtg4_poll_buf[global_uchar2]; + } + } + + + return; +} + +void dp_RTG4M_poll_device_ready(void) +{ + opcode = RTG4M_ISC_NOOP; + for ( rtg4_poll_index = 0U; rtg4_poll_index <= RTG4M_MAX_CONTROLLER_POLL; rtg4_poll_index++ ) + { + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + dp_delay(RTG4M_STANDARD_DELAY); + DRSCAN_out(8u, (DPUCHAR*)DPNULL, rtg4_poll_buf); + + if ((rtg4_poll_buf[0] & 0x80u) == 0x0u) + { + break; + } + } + if(rtg4_poll_index > RTG4M_MAX_CONTROLLER_POLL) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nDevice polling failed."); + #endif + error_code = DPE_POLL_ERROR; + } + + return; +} +/**************************************************************************** +* Purpose: Loads the BSR regsiter with data specified in the data file. +* If BSR_SAMPLE is enabled, the data is not loaded. Instead, the last known +* State of the IOs is maintained by stepping through DRCapture JTAG state. +****************************************************************************/ +void dp_RTG4M_load_bsr(void) +{ + + global_uint1 = (DPUINT) dp_get_bytes(RTG4M_Header_ID,RTG4M_NUMOFBSRBITS_OFFSET,RTG4M_NUMOFBSRBITS_BYTE_LENGTH); + + opcode = ISC_SAMPLE; + IRSCAN_in(); + + #ifdef BSR_SAMPLE + /* Capturing the last known state of the IOs is only valid if the core + was programmed. Otherwise, load the BSR with what is in the data file. */ + if ((global_uchar1 & 0x4u) != 0x4u) + { + dp_get_bytes(RTG4M_BsrPattern_ID,0u,1u); + if (return_bytes) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nWarning: FPGA array is not programmed. Loading BSR register..."); + #endif + dp_get_and_DRSCAN_in(RTG4M_BsrPattern_ID, global_uint1, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nMaintaining last known IO states..."); + #endif + goto_jtag_state(JTAG_CAPTURE_DR,0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + #else + dp_get_bytes(RTG4M_BsrPattern_ID,0u,1u); + if (return_bytes) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nLoading BSR..."); + #endif + dp_get_and_DRSCAN_in(RTG4M_BsrPattern_ID, global_uint1, 0u); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + } + #endif + + + return; +} + +void dp_RTG4M_perform_isc_enable(void) +{ + + rtg4_pgmmode_flag = TRUE; + + opcode = ISC_ENABLE; + IRSCAN_in(); + DRSCAN_in(0u, RTG4_ISC_STATUS_REGISTER_BIT_LENGTH, DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + dp_delay(RTG4M_STANDARD_DELAY); + + opcode = ISC_ENABLE; + dp_RTG4M_device_poll(32u, 31u); + + + if ( (error_code != DPE_SUCCESS) || ((rtg4_poll_buf[0] & 0x1u) == 1u) ) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to enter programming mode."); + #endif + error_code = DPE_INIT_FAILURE; + } + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nISC_ENABLE_RESULT: "); + dp_display_array(rtg4_poll_buf,4u,HEX); + + /* Display CRCERR */ + global_uchar1 = rtg4_poll_buf[0] & 0x1u; + dp_display_text("\r\nCRCERR: "); + dp_display_value(global_uchar1,HEX); + + /* Display EDCERR */ + global_uchar1 = (rtg4_poll_buf[0] & 0x2u) >> 1u; + dp_display_text("\r\nECCRCVR: "); + dp_display_value(global_uchar1,HEX); + + /* Display TEMPRANGE */ + global_uchar1 = (rtg4_poll_buf[0] >> 2) & 0x3u; + if (global_uchar1 == 0u) + { + dp_display_text("\r\nTEMPRANGE: COLD"); + } + else if (global_uchar1 == 1u) + { + dp_display_text("\r\nTEMPRANGE: ROOM"); + } + if (global_uchar1 == 2u) + { + dp_display_text("\r\nTEMPRANGE: HOT"); + } + dp_display_text("\r\nTEMP: "); + dp_display_value(rtg4_poll_buf[1],DEC); + #endif + + + return; +} + +/* Enter programming mode */ +void dp_RTG4M_initialize(void) +{ + dp_RTG4M_poll_device_ready(); + if (error_code == DPE_SUCCESS) + { + dp_RTG4M_load_bsr(); + if (error_code == DPE_SUCCESS) + { + dp_RTG4M_perform_isc_enable(); + } + } + + return; +} + + +/* Function is used to exit programming mode */ +void dp_RTG4M_exit(void) +{ + + if (rtg4_pgmmode_flag == TRUE) + { + #ifdef ENABLE_DISPLAY + dp_RTG4M_read_dsn(); + #endif + + opcode = ISC_DISABLE; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + dp_delay(RTG4M_STANDARD_DELAY); + + opcode = ISC_DISABLE; + dp_RTG4M_device_poll(32u, 31u); + #ifdef ENABLE_DISPLAY + if (error_code != DPE_SUCCESS) + { + dp_display_text("\r\nFailed to disable programming mode."); + } + #endif + } + + opcode = RTG4M_JTAG_RELEASE; + IRSCAN_in(); + dp_delay(RTG4M_RESET_DELAY); + goto_jtag_state(JTAG_TEST_LOGIC_RESET,RTG4M_RESET_CYCLES); + return; +} + +void dp_RTG4M_set_mode(void) +{ + + dp_flush_global_buf1(); + if (Action_code != DP_ERASE_ACTION_CODE) + { + global_buf1[4] |= (RTG4M_ALGO_VERSION & 0x3fu); + global_buf1[6] |= (RTG4M_DIRECTC_VERSION & 0x3fu) << 1u; + global_buf1[6] |= (DIRECTC_PROGRAMMING & 0x7u) << 7u; + global_buf1[7] |= (DIRECTC_PROGRAMMING & 0x7u) >> 1u; + global_buf1[7] |= 0x4Cu; + } + + global_buf1[0] |= (rtg4_pgmmode & 0x3u); + + opcode = RTG4M_FRAME_INIT; + IRSCAN_in(); + DRSCAN_in(0u, RTG4M_STATUS_REGISTER_BIT_LENGTH, global_buf1); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + dp_delay(RTG4M_STANDARD_DELAY); + + + dp_RTG4M_device_poll(64u, 63u); + #ifdef ENABLE_DISPLAY + if (error_code != DPE_SUCCESS) + { + dp_display_text("r\nFailed to set programming mode."); + } + #endif + + return; +} + +void dp_RTG4M_process_data(DPUCHAR BlockID) +{ + + DataIndex = 0u; + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\n"); + #endif + + /* get the number of blocks */ + /* Global ulong1 is used to hold the number of blocks within the components */ + global_ulong1 = dp_get_bytes(RTG4M_NUMBER_OF_BLOCKS_ID,(DPULONG)(((global_uint2 - 1u) * 22u) / 8u),4u); + global_ulong1 >>= ((global_uint2 - 1U)* 22u) % 8u; + global_ulong1 &= 0x3FFFFFu; + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nProcessing component "); + dp_display_value(global_uint2,DEC); + dp_display_text(". Please wait..."); + #endif + + #ifdef ENABLE_DISPLAY + old_progress = 0; + #endif + for (global_ulong2 = 1u; global_ulong2 <= global_ulong1; global_ulong2++) + { + #ifdef ENABLE_DISPLAY + new_progress = (global_ulong2 *100 / global_ulong1); + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + + opcode = RTG4M_FRAME_DATA; + IRSCAN_in(); + dp_get_and_DRSCAN_in(BlockID, RTG4M_FRAME_BIT_LENGTH, DataIndex); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + dp_delay(RTG4M_STANDARD_DELAY); + + opcode = RTG4M_FRAME_DATA; + dp_RTG4M_device_poll(128u, 127u); + + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nInstruction timed out."); + dp_display_text("\r\ncomponentNo: "); + dp_display_value(global_uint2, DEC); + dp_display_text("\r\nblockNo: "); + dp_display_value(global_ulong2, DEC); + #endif + error_code = DPE_PROCESS_DATA_ERROR; + break; + } + else + { + dp_RTG4M_get_data_status(); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nInstruction timed out."); + dp_display_text("\r\ncomponentNo: "); + dp_display_value(global_uint2, DEC); + dp_display_text("\r\nblockNo: "); + dp_display_value(global_ulong2, DEC); + #endif + error_code = DPE_PROCESS_DATA_ERROR; + break; + } + else if ((rtg4_poll_buf[0] & 0x4u) != 0u) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\ncomponentNo: "); + dp_display_value(global_uint2, DEC); + dp_display_text("\r\nblockNo: "); + dp_display_value(global_ulong2, DEC); + dp_display_text("\r\nDATA_STATUS_RESULT: "); + dp_display_array(rtg4_poll_buf,4u,HEX); + dp_display_text("\r\nERRORCODE: "); + dp_display_value((rtg4_poll_buf[0]>>3u) & 0x1fu,HEX); + dp_display_text("\r\nAUTHERRCODE: "); + dp_display_value(rtg4_poll_buf[1],HEX); + #endif + error_code = DPE_PROCESS_DATA_ERROR; + break; + } + } + DataIndex += RTG4M_FRAME_BIT_LENGTH; + } + + + return; +} + +void dp_RTG4M_get_data_status(void) +{ + opcode = RTG4M_FRAME_STATUS; + IRSCAN_in(); + DRSCAN_in(0u, RTG4_ISC_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + dp_delay(RTG4M_STANDARD_DELAY); + + opcode = RTG4M_FRAME_STATUS; + dp_RTG4M_device_poll(32u, 31u); + + return; +} + +void dp_RTG4M_query_security(void) +{ + opcode = RTG4M_QUERY_SECURITY; + IRSCAN_in(); + DRSCAN_in(0u, RTG4M_STATUS_REGISTER_BIT_LENGTH, (DPUCHAR*)(DPUCHAR*)DPNULL); + goto_jtag_state(JTAG_RUN_TEST_IDLE,RTG4M_STANDARD_CYCLES); + opcode = RTG4M_QUERY_SECURITY; + dp_RTG4M_device_poll(64u, 63u); + if (error_code != DPE_SUCCESS) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nFailed to query security information."); + #endif + } + else + { + #ifdef ENABLE_DISPLAY + if ((rtg4_poll_buf[0] & 0x4u) == 0x4u) + { + dp_display_text("\r\n --- Device is protected with pass key"); + } + + global_uint1 = (rtg4_poll_buf[4] | (rtg4_poll_buf[5] >> 8u)) & 0x3ffu; + dp_display_text("\r\nCYCLE COUNT: "); + if (global_uint1 != 0x3ffu) + { + dp_display_value(global_uint1,DEC); + } + else + { + dp_display_text(" Not available. "); + } + + + dp_display_text("\r\n--- Security locks and configuration settings ---\r\n"); + if ((rtg4_poll_buf[2] & 0x1u) == 0x1u) + { + dp_display_text("\r\n --- JTAG interface is disabled."); + } + if ((rtg4_poll_buf[2] & 0x2u) == 0x2u) + { + dp_display_text("\r\n --- SPI interface is disabled."); + } + if ((rtg4_poll_buf[2] & 0x4u) == 0x4u) + { + dp_display_text("\r\n --- FPGA array erase/write is disabled."); + } + if ((rtg4_poll_buf[2] & 0x8u) == 0x8u) + { + dp_display_text("\r\n --- FPGA array verify is disabled."); + } + if ((rtg4_poll_buf[2] & 0x20u) == 0x20u) + { + dp_display_text("\r\n --- JTAG programming is disabled."); + } + if ((rtg4_poll_buf[2] & 0x40u) == 0x40u) + { + dp_display_text("\r\n --- SPI programming is disabled."); + } + if ((rtg4_poll_buf[2] & 0x80u) == 0x80u) + { + dp_display_text("\r\n --- User segment read is disabled."); + } + if ((rtg4_poll_buf[3] & 0x1u) == 0x1u) + { + dp_display_text("\r\n --- System controller suspend mode is enabled."); + } + if ((rtg4_poll_buf[3] & 0x4u) == 0x4u) + { + dp_display_text("\r\n --- Probe write is disabled."); + } + if ((rtg4_poll_buf[3] & 0x8u) == 0x8u) + { + dp_display_text("\r\n --- Probe read is disabled."); + } + if ((rtg4_poll_buf[3] & 0x10u) == 0x10u) + { + dp_display_text("\r\n --- UJTAG access to Fabric is protected."); + } + if ((rtg4_poll_buf[3] & 0x20u) == 0x20u) + { + dp_display_text("\r\n --- Exit power up if voltage is out of range is enabled."); + } + if ((rtg4_poll_buf[3] & 0x40u) == 0x40u) + { + dp_display_text("\r\n --- User lock bits bypass is enabled."); + } + if ((rtg4_poll_buf[3] & 0x80u) == 0x80u) + { + dp_display_text("\r\n --- User passcode is needed for programming."); + } + #endif + } + return; +} +#endif /* ENABLE_RTG4_SUPPORT */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/RTG4Algo/dpRTG4alg.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/RTG4Algo/dpRTG4alg.h new file mode 100644 index 0000000..614ec7f --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/RTG4Algo/dpRTG4alg.h @@ -0,0 +1,177 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpRTG4alg.h */ +/* */ +/* Description: Contains function prototypes. */ +/* */ +/* ************************************************************************ */ + +#ifndef INC_DPRTG4ALG_H +#define INC_DPRTG4ALG_H + +/* +* Data block ID definitions +*/ +#define RTG4M_ALGO_VERSION 1u +#define RTG4M_DIRECTC_VERSION 0u + +#define RTG4M_Header_ID 0u +#define RTG4M_BsrPattern_ID 3u +#define RTG4M_BsrPatternMask_ID 4u +#define RTG4M_NUMBER_OF_BLOCKS_ID 5u +#define RTG4M_datastream_ID 8u +#define RTG4M_erasedatastream_ID 9u + +#define RTG4M_DEVICE_FAMILY_OFFSET 36u +#define RTG4M_DEVICE_FAMILY_BYTE_LENGTH 1u +#define RTG4M_ID_OFFSET 37u +#define RTG4M_ID_BYTE_LENGTH 4u +#define RTG4M_ID_MASK_OFFSET 41u +#define RTG4M_ID_MASK_BYTE_LENGTH 4u +#define RTG4M_SILSIG_OFFSET 45u +#define RTG4M_SILSIG_BYTE_LENGTH 4u +#define RTG4M_CHECKSUM_OFFSET 49u +#define RTG4M_CHECKSUM_BYTE_LENGTH 2u +#define RTG4M_NUMOFBSRBITS_OFFSET 51u +#define RTG4M_NUMOFBSRBITS_BYTE_LENGTH 2u +/* +* RTG4Main JTAG instructions +*/ +#define RTG4M_ISC_NOOP 0x8fu +#define RTG4M_FRAME_INIT 0xd8u +#define RTG4M_READ_DESIGN_INFO 0xa6u +#define RTG4M_READ_PROG_INFO 0xe7u +#define RTG4M_READ_BUFFER 0xf2u +#define RTG4M_READ_DSN 0xf0u +#define RTG4M_QUERY_SECURITY 0xdau +#define RTG4M_JTAG_RELEASE 0xafu +#define RTG4M_FRAME_DATA 0xeeu +#define RTG4M_FRAME_STATUS 0xc9u +#define RTG4M_VERIFY_DIGEST 0xdcu +#define RTG4M_READ_DIGEST 0xdbu + +#define RTG4M_MAX_CONTROLLER_POLL 1000000u + +#define RTG4_ISC_STATUS_REGISTER_BIT_LENGTH 32u +#define RTG4M_STANDARD_CYCLES 3u +#define RTG4M_STANDARD_DELAY 10u +#define RTG4M_RESET_CYCLES 5u +#define RTG4M_RESET_DELAY 1000u + +#define RTG4M_STATUS_REGISTER_BIT_LENGTH 64u +#define RTG4M_DESIGN_INFO_REGISTER_BIT_LENGTH 8u +#define RTG4M_FRAME_BIT_LENGTH 128u +#define RTG4M_FRAME_STATUS_BIT_LENGTH 129u + +DPUCHAR dp_top_rtg4 (void); +void dp_init_RTG4_vars(void); +void dp_RTG4_exit_avionics_mode(void); +void dp_check_RTG4_action(void); +void dp_perform_RTG4_action (void); + +/* Supported Actions */ +void dp_RTG4M_device_info_action(void); +void dp_RTG4M_erase_action(void); +void dp_RTG4M_program_action(void); +void dp_RTG4M_verify_action(void); +void dp_RTG4M_check_bitstream_action(void); +void dp_RTG4M_verify_digest_action(void); +// +void dp_check_RTG4_device_ID (void); +void dp_RTG4M_poll_device_ready(void); +void dp_RTG4M_check_core_status(void); +void dp_RTG4M_read_design_info(void); +void dp_RTG4M_read_prog_info(void); +void dp_RTG4M_read_dsn(void); +void dp_RTG4M_query_security(void); +void dp_RTG4M_read_digest(void); +void dp_RTG4M_read_shared_buffer(DPUCHAR ucNumOfBlocks); +void dp_RTG4M_load_bsr(void); +void dp_RTG4M_perform_isc_enable(void); +void dp_RTG4M_process_data(DPUCHAR BlockID); +void dp_RTG4M_get_data_status(void); + +/* Initialization functions */ +void dp_RTG4M_device_poll(DPUCHAR bits_to_shift, DPUCHAR Busy_bit); +void dp_RTG4M_initialize(void); +void dp_RTG4M_exit(void); +void dp_RTG4M_set_mode(void); + + +#endif /* INC_DPRTG4ALG_H */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpalg.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpalg.c new file mode 100644 index 0000000..5d20743 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpalg.c @@ -0,0 +1,252 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpalg.c */ +/* */ +/* Description: Contains initialization and data checking functions. */ +/* */ +/* ************************************************************************ */ +#include "dpuser.h" +#include "dputil.h" +#include "dpalg.h" +#include "dpG3alg.h" +#include "dpG4alg.h" +#include "dpG5alg.h" +#include "dpRTG4alg.h" +#include "dpjtag.h" +#include "dpcom.h" + +DPUCHAR Action_code; /* used to hold the action codes as defined in dpalg.h */ +DPUCHAR Action_done; /* used to hold the action codes as defined in dpalg.h */ +DPUCHAR opcode; /* Holds the opcode value of the IR register prior to loading */ + +DPULONG device_ID; /* Holds the device ID */ +DPUCHAR device_rev; /* Holds the device revision */ +DPUCHAR device_family = 0U; /* Read from the data file AFS, or G3 */ + +#ifdef ENABLE_DISPLAY +DPULONG old_progress = 0; +DPULONG new_progress; +#endif + + +#ifdef ENABLE_G3_SUPPORT +DPUINT device_bsr_bit_length; /* Holds the bit length of the BSR register */ +#endif + +/* DataIndex variable is used to keep track of the position of the data +* loaded in the file +*/ +DPULONG DataIndex; + +/* error_code holds the error code that could be set in the programming +* functions +*/ +DPUCHAR error_code; + +DPUCHAR dp_top (void) +{ + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nIdentifying device..."); + #endif + + error_code = DPE_SUCCESS; + dp_init_com_vars(); + /* This function call is exit Avionics mode on RTG4 */ + dp_exit_avionics_mode(); + dp_check_and_get_image_size(); + + if (error_code == DPE_SUCCESS) + { + goto_jtag_state(JTAG_TEST_LOGIC_RESET,0u); + error_code = DPE_CODE_NOT_ENABLED; + Action_done = FALSE; + + #ifdef ENABLE_G3_SUPPORT + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nLooking for A3P/AFS device..."); + #endif + + error_code = DPE_SUCCESS; + dp_read_idcode(); + dp_check_device_ID(); + if (error_code == DPE_SUCCESS) + { + dp_top_g3(); + Action_done = TRUE; + } + #endif + + #ifdef ENABLE_G4_SUPPORT + if (Action_done == FALSE) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nLooking for M2S/M2GL device..."); + #endif + error_code = DPE_SUCCESS; + dp_read_idcode(); + dp_check_G4_device_ID(); + if ((error_code == DPE_SUCCESS) && (device_family == G4_FAMILY)) + { + dp_top_g4 (); + Action_done = TRUE; + } + } + #endif + + #ifdef ENABLE_RTG4_SUPPORT + if (Action_done == FALSE) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nLooking for RTG4 device..."); + #endif + error_code = DPE_SUCCESS; + dp_read_idcode(); + dp_check_RTG4_device_ID(); + if ((error_code == DPE_SUCCESS) && (device_family == RTG4_FAMILY)) + { + dp_top_rtg4 (); + Action_done = TRUE; + } + } + #endif + + #ifdef ENABLE_G5_SUPPORT + if (Action_done == FALSE) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nLooking for MPF device..."); + #endif + error_code = DPE_SUCCESS; + dp_read_idcode(); + dp_check_G5_device_ID(); + if ((error_code == DPE_SUCCESS) && (device_family == G5_FAMILY)) + { + dp_top_g5 (); + Action_done = TRUE; + } + } + #endif + + } + return error_code; +} + +void dp_read_idcode(void) +{ + + opcode = IDCODE; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + DRSCAN_out(IDCODE_LENGTH, (DPUCHAR*)DPNULL, global_buf1); + device_ID = (DPULONG)global_buf1[0] | (DPULONG)global_buf1[1] << 8u | + (DPULONG)global_buf1[2] << 16u | (DPULONG)global_buf1[3] << 24u; + device_rev = (DPUCHAR) (device_ID >> 28); + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nActID = "); + dp_display_value(device_ID,HEX); + #endif + + + return; +} + +void dp_read_usercode(void) +{ + + opcode = USERCODE; + IRSCAN_in(); + goto_jtag_state(JTAG_RUN_TEST_IDLE,0u); + DRSCAN_out(USERCODE_LENGTH, (DPUCHAR*)DPNULL, global_buf1); + + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nUser Code = "); + dp_display_array(global_buf1,4u,HEX); + #endif + + + return; +} + + +#ifdef ENABLE_DISPLAY +void dp_read_idcode_action(void) +{ + return; +} +#endif + +/* *************** End of File *************** */ diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpalg.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpalg.h new file mode 100644 index 0000000..49e588a --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpalg.h @@ -0,0 +1,237 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpalg.h */ +/* */ +/* Description: Contains the function prototypes. */ +/* */ +/* ************************************************************************ */ +#ifndef INC_DPALG_H +#define INC_DPALG_H + +/* Programming method. Common to all families */ +#define DIRECTC_PROGRAMMING 2u + +extern DPUCHAR Action_code; +extern DPUCHAR Action_done; +extern DPUCHAR opcode; +extern DPULONG device_ID; +extern DPUCHAR device_rev; +extern DPUCHAR device_family; +extern DPULONG DataIndex; +extern DPUCHAR error_code; +#ifdef ENABLE_DISPLAY +extern DPULONG old_progress; +extern DPULONG new_progress; +#endif + + + +/************************************************************/ +/* Instrunction Set */ +/************************************************************/ +/* General opcodes */ +#define ISC_ENABLE 0x80u +#define ISC_DISABLE 0x81u +#define ISC_SAMPLE 0x01u + +#define IDCODE 0x0Fu +#define OPCODE_BIT_LENGTH 8u +#define USERCODE 0x0Eu + +#define IDCODE_LENGTH 32u +#define USERCODE_LENGTH 32u + +/* Action Names -- match actions function */ +/* These codes are passed to the main entry function "dp_top" to indicate +* which action to perform */ +#define DP_NO_ACTION_FOUND 0u +#define DP_DEVICE_INFO_ACTION_CODE 1u +#define DP_READ_IDCODE_ACTION_CODE 2u +#define DP_ERASE_ACTION_CODE 3u +#define DP_PROGRAM_ACTION_CODE 5u +#define DP_VERIFY_ACTION_CODE 6u +/* Array only actions */ +#define DP_ENC_DATA_AUTHENTICATION_ACTION_CODE 7u +#define DP_ERASE_ARRAY_ACTION_CODE 8u +#define DP_PROGRAM_ARRAY_ACTION_CODE 9u +#define DP_VERIFY_ARRAY_ACTION_CODE 10u +/* FROM only actions */ +#define DP_ERASE_FROM_ACTION_CODE 11u +#define DP_PROGRAM_FROM_ACTION_CODE 12u +#define DP_VERIFY_FROM_ACTION_CODE 13u +/* Security only actions */ +#define DP_ERASE_SECURITY_ACTION_CODE 14u +#define DP_PROGRAM_SECURITY_ACTION_CODE 15u +/* NVM only actions */ +#define DP_PROGRAM_NVM_ACTION_CODE 16u +#define DP_VERIFY_NVM_ACTION_CODE 17u +#define DP_VERIFY_DEVICE_INFO_ACTION_CODE 18u +#define DP_READ_USERCODE_ACTION_CODE 19u +/* For P1 device, The following two actions are only supported with data files +* generated form V86 or later. ENABLE_V85_DAT_SUPPORT must be disabled */ +#define DP_PROGRAM_NVM_ACTIVE_ARRAY_ACTION_CODE 20u +#define DP_VERIFY_NVM_ACTIVE_ARRAY_ACTION_CODE 21u +#define DP_IS_CORE_CONFIGURED_ACTION_CODE 22u +#define DP_PROGRAM_PRIVATE_CLIENTS_ACTION_CODE 23u +#define DP_VERIFY_PRIVATE_CLIENTS_ACTION_CODE 24u +#define DP_PROGRAM_PRIVATE_CLIENTS_ACTIVE_ARRAY_ACTION_CODE 25u +#define DP_VERIFY_PRIVATE_CLIENTS_ACTIVE_ARRAY_ACTION_CODE 26u +#define DP_CHECK_BITSTREAM_ACTION_CODE 27u +#define DP_VERIFY_DIGEST_ACTION_CODE 28u +#define DP_VALIDATE_USER_ENC_KEYS_ACTION_CODE 29u + +/************************************************************/ +/* Error code definitions */ +/************************************************************/ +#define DPE_SUCCESS 0u +#define DPE_PROCESS_DATA_ERROR 2u +#define DPE_IDCODE_ERROR 6u +#define DPE_CHECKSUM_ERROR 9u +#define DPE_INIT_FAILURE 25u +#define DPE_ERASE_ERROR 8u +#define DPE_CORE_PROGRAM_ERROR 10u +#define DPE_CORE_VERIFY_ERROR 11u +#define DPE_PROGRAM_RLOCK_ERROR 10u +#define DPE_POLL_ERROR 7u +#define DPE_PROGRAM_UROW_ERROR 24u +#define DPE_FROM_VERIFY_ERROR 20u +#define DPE_FROM_PROGRAM_ERROR 10u +#define DPE_DMK_VERIFY_ERROR 31u +#define DPE_UROW_ERROR 11u +#define DPE_VERIFY_ERROR 12u +#define DPE_NVM_PROGRAM_ERROR 41u +#define DPE_NVM_VERIFY_ERROR 39u +#define DPE_SEC_PROGRAMMING_ERROR 22u +#define DPE_AES_PROGRAMMING_ERROR 23u +#define DPE_ULOCK_ERROR 16u +#define DPE_MATCH_ERROR 35u +#define DPE_AUTHENTICATION_FAILURE 18u +#define DPE_CORE_ENC_ERROR 33u +#define DPE_CORE_PLAIN_ERROR 37u +#define DPE_FROM_ENC_ERROR 34u +#define DPE_FROM_PLAIN_ERROR 36u +#define DPE_NVM0_ENC_ERROR 47u +#define DPE_NVM0_PLAIN_ERROR 49u +#define DPE_NVM1_ENC_ERROR 47u +#define DPE_NVM1_PLAIN_ERROR 49u +#define DPE_NVM2_ENC_ERROR 47u +#define DPE_NVM2_PLAIN_ERROR 49u +#define DPE_NVM3_ENC_ERROR 47u +#define DPE_NVM3_PLAIN_ERROR 49u +#define DPE_USER_LOCK_SETTING_ERROR 42u +#define DPE_UROW_SETTING_ERROR 43u +#define DPE_AES_SEC_ERROR 31u +#define DPE_SILSIG_PROGRAM_ERROR 14u +#define DPE_PROGRAM_SECURITY_ERROR 38u +#define DPE_NVM_ACCESS_ERROR 54u +#define DPE_VERIFY_DIGEST_ERROR 60u +#define DPE_CRC_MISMATCH 100u +#define DPE_JTAG_STATE_NOT_HANDLED 110u +#define DPE_ACTION_NOT_FOUND 150u +#define DPE_ACTION_NOT_SUPPORTED 151u +#define DPE_CODE_NOT_ENABLED 152u +#define CALIBRATION_OVERLAP_ERROR 153u +#define DPE_SECURITY_BIT_MISMATCH 154u +#define DPE_DAT_VERSION_MISMATCH 160u +#define DPE_DAT_FILE_ACCESS_ERROR 165u +#define DPE_HARDWARE_NOT_SELECTED 170u +#define DPE_DAT_ACCESS_FAILURE 180u + + + + +/************************************************************/ +/* Family code definitions */ +/************************************************************/ +#define MICROSEMI_ID 0x1CFu +#define AXX_BIT 0x1u +#define AFS_BIT 0x2u +#define SFS_BIT 0x4u +#define A4P_BIT 0x8u +#define G4_FAMILY 0x5u +#define RTG4_FAMILY 0x6u +#define G5_FAMILY 0x7u + +DPUCHAR dp_top(void); +void dp_read_idcode(void); +void dp_read_usercode(void); +#ifdef ENABLE_DISPLAY +void dp_read_idcode_action(void); +#endif + +#endif /* INC_DPALG_H */ + +/* *************** End of File *************** */ diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpcom.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpcom.c new file mode 100644 index 0000000..0371718 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpcom.c @@ -0,0 +1,405 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpcom.c */ +/* */ +/* Description: Contains functions for data table initialization & */ +/* pointers passing of the various data blocks needed. */ +/* */ +/* ************************************************************************ */ +#include "dpuser.h" +#include "dpcom.h" + +#include <directc_wrapper.h> + +/* +* Paging System Specific Implementation. User attention required: +*/ +DPUCHAR *image_buffer; /* Pointer to the image in the system memory */ +DPUCHAR *page_buffer_ptr; +#ifdef USE_PAGING +DPUCHAR page_global_buffer[PAGE_BUFFER_SIZE]; /* Page_global_buffer simulating the global_buf1fer that is accessible by DirectC code*/ +DPULONG page_address_offset; +DPULONG start_page_address = 0u; +DPULONG end_page_address = 0u; +#endif + +DPULONG return_bytes; +DPULONG requested_bytes; +/* +* current_block_address holds the data block starting address in the image file that the page global_buf1fer data is currently holding +*/ +DPULONG current_block_address=0U; +DPUCHAR current_var_ID=Header_ID; +DPULONG image_size=MIN_IMAGE_SIZE; + +/* +* Module: dp_init_com_vars(void) +* purpose: This function is called at the begining to initialize starting and ending page addresses. +* Arguments: +* None. +* Return value: +* None. +* +*/ +void dp_init_com_vars(void) +{ + #ifdef USE_PAGING + start_page_address = 0u; + end_page_address = 0u; + // Jan Sucan + // Pred operaciou je potrebne inicializovat aj dalsie premenne suvisiace so strankovanim. + // Ak sa neinicializuje image_size, moze sa pri aktualnej operacii vyziadat viac dat z .DAT suboru + // (hodnota pouzita predchadzajucou operaciou) nez ako ma .DAT subor pre aktualnu operaciu. + current_block_address = 0u; + current_var_ID = Header_ID; + image_size = MIN_IMAGE_SIZE; + #endif + return; +} + + +/* +* Module: dp_get_data +* purpose: This function is called only when access to the any data block within the image is needed. +* It is designed to return the pointer address of the first byte containing bit_index in the data block +* requested by the var_identifier (var_ID). +* Arguments: +* DPUCHAR * var_ID, an unsigned integer variable contains an identifier specifying which +* block address to return. +* DPULONG bit_index: The bit location of the first bit to be processed (clocked in) within the data block specified by Var_ID. +* Return value: +* Address point to the first element in the block. +* +*/ +DPUCHAR* dp_get_data(DPUCHAR var_ID,DPULONG bit_index) +{ + DPUCHAR * data_address = (DPUCHAR*)DPNULL; + dp_get_data_block_address(var_ID); + if ((current_block_address == 0U) && (var_ID != Header_ID)) + { + return_bytes = 0U; + } + else + { + data_address = dp_get_data_block_element_address(bit_index); + } + return data_address; +} + +/* +* Module: dp_get_header_data +* purpose: This function is called only when access to the header data block within the image is needed. +* It is designed to return the pointer address of the first byte containing bit_index in the header block. +* Arguments: +* DPULONG bit_index: The bit location of the first bit to be processed (clocked in) within the data block specified by Var_ID. +* Return value: +* Address point to the first element in the block. +* +*/ +DPUCHAR* dp_get_header_data(DPULONG bit_index) +{ + /* The first block in the image is the header. There is no need to get the address of its block. It is zero. */ + current_block_address = 0U; + + /* Calculating the relative address of the data block needed within the image */ + return dp_get_data_block_element_address(bit_index); +} + +/* +* User attention: +* Module: dp_get_page_data +* purpose: This function is called by dp_get_data function. This is done every time a new data block is needed +* or when requested data is not in the current page. This function expects the location of the first byte to return +* and will fill the entire page with valid data. +* Arguments: +* DPULONG image_requested_address, a ulong variable containing the relative address location of the first needed byte +* Return value: +* None. +* +*/ +#ifdef USE_PAGING +void dp_get_page_data(DPULONG image_requested_address) +{ + #ifdef ENABLE_EMBEDDED_SUPPORT + return_bytes = PAGE_BUFFER_SIZE; + /* Image size will initially be the header size which is part of the image file. + * This must be done to avoid accessing data that is outside the image boundaries in case the + * page_global_buffer size is greater than the image itself + * image_size variable will be read from the image file at a later time. + */ + + /* This is needed to avoid out of bound memory access*/ + if (image_requested_address + return_bytes > image_size) + { + return_bytes = image_size - image_requested_address; + } + + /* + * Add a funciton call here to get the page data from the external storage device. + */ + dcw_get_page_data_from_external_storage(image_requested_address, &return_bytes, &start_page_address, &end_page_address); + + #endif + return; +} +#endif + + +/* +* Module: dp_get_data_block_address +* purpose: This function sets current_block_address to the first relative address of the requested +* data block within the data file. +* Return value: +* None. +*/ +void dp_get_data_block_address(DPUCHAR requested_var_ID) +{ + DPUINT var_idx; + DPULONG image_index; + DPUINT num_vars; + DPUCHAR variable_ID; + + /* If the current data block ID is the same as the requested one, there is no need to caluclate its starting address. + * it is already calculated. + */ + if (current_var_ID != requested_var_ID) + { + current_block_address=0U; + current_var_ID=Header_ID; + if (requested_var_ID != Header_ID) + { + /*The lookup table is at the end of the header*/ + image_index = dp_get_header_bytes((HEADER_SIZE_OFFSET),1U); + image_size = dp_get_header_bytes(IMAGE_SIZE_OFFSET,4U); + + /* The last byte in the header is the number of data blocks in the dat file */ + num_vars = (DPUINT) dp_get_header_bytes(image_index-1U,1U); + + for (var_idx=0U;var_idx<num_vars;var_idx++) + { + variable_ID = (DPUCHAR) dp_get_header_bytes(image_index+BTYES_PER_TABLE_RECORD*var_idx,1U); + if (variable_ID == requested_var_ID) + { + current_block_address = dp_get_header_bytes(image_index+BTYES_PER_TABLE_RECORD*var_idx+1U,4U); + current_var_ID = variable_ID; + break; + } + } + } + } + return; +} + +/* +* Module: dp_get_data_block_element_address +* purpose: This function return unsigned char pointer of the byte containing bit_index +* within the data file. +* Return value: +* DPUCHAR *: unsigned character pointer to the byte containing bit_index. +*/ +DPUCHAR * dp_get_data_block_element_address(DPULONG bit_index) +{ + DPULONG image_requested_address; + /* Calculating the relative address of the data block needed within the image */ + image_requested_address = current_block_address + bit_index / 8U; + + #ifdef USE_PAGING + /* If the data is within the page, adjust the pointer to point to the particular element requested */ + /* For first load, start_page_address = end_page_address = 0u */ + /* Jan Sucan: removed && ((image_requested_address + MIN_VALID_BYTES_IN_PAGE) <= end_page_address) */ + if ( + (start_page_address != end_page_address) && + (image_requested_address >= start_page_address) && (image_requested_address <= end_page_address) + ) + { + page_address_offset = image_requested_address - start_page_address; + return_bytes = end_page_address - image_requested_address + 1u; + } + /* Otherwise, call dp_get_page_data which would fill the page with a new data block */ + else + { + dp_get_page_data(image_requested_address); + page_address_offset = 0u; + } + return &page_global_buffer[page_address_offset]; + #else + return_bytes=image_size - image_requested_address; + /* + Misra - C 2004 deviation: + image_buffer is a pointer that is being treated as an array. + Refer to DirectC user guide for more information. + */ + return &image_buffer[image_requested_address]; + #endif +} + + +/* +* Module: dp_get_bytes +* purpose: This function is designed to return all the requested bytes specified. Maximum is 4. +* DPINT * var_ID, an integer variable contains an identifier specifying which +* block address to return. +* DPULONG byte_index: The relative address location of the first byte in the specified data block. +* DPULONG requested_bytes: The number of requested bytes. +* Return value: +* DPULONG: The combined value of all the requested bytes. +* Restrictions: +* requested_bytes cannot exceed 4 bytes since DPULONG can only hold 4 bytes. +* +*/ +DPULONG dp_get_bytes(DPUCHAR var_ID,DPULONG byte_index,DPUCHAR bytes_requested) +{ + DPULONG ret = 0U; + DPUCHAR i; + DPUCHAR j; + j=0U; + + while (bytes_requested) + { + page_buffer_ptr = dp_get_data(var_ID,byte_index*8U); + /* If Data block does not exist, need to exit */ + if (return_bytes == 0u) + { + break; + } + if (return_bytes > (DPULONG) bytes_requested ) + { + return_bytes = (DPULONG) bytes_requested; + } + for (i=0u; i < (DPUCHAR) return_bytes;i++) + { + /* + Misra - C 2004 deviation: + page_buffer_ptr is a pointer that is being treated as an array. + Refer to DirectC user guide for more information. + */ + ret |= ((DPULONG) (page_buffer_ptr[i])) << ( j++ * 8U); + } + byte_index += return_bytes; + bytes_requested = bytes_requested - (DPUCHAR) return_bytes; + } + return ret; +} + +/* +* Module: dp_get_header_bytes +* purpose: This function is designed to return all the requested bytes specified from the header section. +* Maximum is 4. +* DPINT * var_ID, an integer variable contains an identifier specifying which +* block address to return. +* DPULONG byte_index: The relative address location of the first byte in the specified data block. +* DPULONG requested_bytes: The number of requested bytes. +* Return value: +* DPULONG: The combined value of all the requested bytes. +* Restrictions: +* requested_bytes cannot exceed 4 bytes since DPULONG can only hold 4 bytes. +* +*/ +DPULONG dp_get_header_bytes(DPULONG byte_index,DPUCHAR bytes_requested) +{ + DPULONG ret = 0U; + DPUCHAR i; + DPUCHAR j=0u; + + while (bytes_requested) + { + page_buffer_ptr = dp_get_header_data(byte_index*8U); + /* If Data block does not exist, need to exit */ + if (return_bytes == 0U) + { + break; + } + if (return_bytes > (DPULONG) bytes_requested ) + { + return_bytes = (DPULONG) bytes_requested; + } + for (i=0u; i < (DPUCHAR)return_bytes; i++) + { + /* + Misra - C 2004 deviation: + page_buffer_ptr is a pointer that is being treated as an array. + Refer to DirectC user guide for more information. + */ + ret |= (((DPULONG) page_buffer_ptr[i])) << ( j++ * 8U); + } + byte_index += return_bytes; + bytes_requested = bytes_requested - (DPUCHAR) return_bytes; + } + return ret; +} + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpcom.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpcom.h new file mode 100644 index 0000000..a20eb26 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpcom.h @@ -0,0 +1,120 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpcom.h */ +/* */ +/* Description: Contains functions prototypes needed to access the data */ +/* from external flash or other means of communication */ +/* */ +/* ************************************************************************ */ + +#ifndef INC_DPCOM_H +#define INC_DPCOM_H + +extern DPULONG return_bytes; +extern DPULONG image_size; +extern DPULONG requested_bytes; +extern DPUCHAR *page_buffer_ptr; + +/* user attention is required. PAGE_BUFFER_SIZE needs to be specified in bytes */ +#define PAGE_BUFFER_SIZE 1024u +#define MIN_VALID_BYTES_IN_PAGE 16u + +#ifdef USE_PAGING +extern DPUCHAR page_global_buffer[PAGE_BUFFER_SIZE]; /* Page_global_buffer simulating the global_buf1fer that is accessible by DirectC code*/ +#endif + +/* +* Location of special variables needed in the header section of the image file +*/ +#define Header_ID 0u +#define BTYES_PER_TABLE_RECORD 9u +#define ACTEL_HEADER_SIZE 24u +#define HEADER_SIZE_OFFSET 24u +#define IMAGE_SIZE_OFFSET 25u +#define MIN_IMAGE_SIZE 56u + +void dp_init_com_vars(void); +DPUCHAR * dp_get_data(DPUCHAR var_ID,DPULONG bit_index); +DPUCHAR * dp_get_header_data(DPULONG bit_index); +void dp_get_page_data(DPULONG image_requested_address); +void dp_get_data_block_address(DPUCHAR requested_var_ID); +DPUCHAR * dp_get_data_block_element_address(DPULONG bit_index); +DPULONG dp_get_bytes(DPUCHAR var_ID,DPULONG byte_index,DPUCHAR bytes_requested); +DPULONG dp_get_header_bytes(DPULONG byte_index,DPUCHAR bytes_requested); +#endif /* INC_DPCOM_H */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpuser.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpuser.c new file mode 100644 index 0000000..6d9053f --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpuser.c @@ -0,0 +1,278 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpuser.c */ +/* */ +/* Description: user specific file containing JTAG interface functions */ +/* and delay function */ +/* */ +/****************************************************************************/ + +#include "dpuser.h" +#include "dpalg.h" +#include "dputil.h" +/* +* User attention: +* Include files needed to support hardware JTAG interface operations. +* +*/ + +#include <directc_wrapper.h> + +/* This variable is used to select external programming vs IAP programming */ +DPUCHAR hardware_interface = GPIO_SEL; +DPUCHAR enable_mss_support = FALSE; + + +/* +* User attention: +* Module: dp_exit_avionics_mode +* purpose: Either power cycle RTG4 device or toggle devrst pin. +* Return value: None +* +*/ +void dp_exit_avionics_mode(void) +{ + return; +} + +#ifdef ENABLE_EMBEDDED_SUPPORT + +/* +* User attention: +* jtag_port_reg: 8 bit Static variable to keep track of the state of all the JTAG pins +* at all times during the programming operation. +* Note: User check the variable size to make sure it can cover the hardware IO register. +* +*/ +static DPUCHAR jtag_port_reg; +/* +* User attention: +* Module: jtag_inp +* purpose: report the logic state of tdo jtag pin +* Arguments: None +* Return value: 8 bit value +* 0, 0x80 +* +*/ +DPUCHAR jtag_inp(void) +{ + return dcw_jtag_inp(); +} +/* +* User attention: +* Module: jtag_outp +* purpose: Set the JTAG port (all JTAG pins) +* Arguments: 8 bit value containing the new state of all the JTAG pins +* Return value: None +* +*/ +void jtag_outp(DPUCHAR outdata) +{ + dcw_jtag_outp(outdata); +} + +/* +* No need to change this function +* Module: dp_jtag_init +* purpose: Set tck and trstb pins to logic level one +* Arguments: +* None +* Return value: None +* +*/ +void dp_jtag_init(void) +{ + jtag_port_reg = TCK | TRST; + jtag_outp(jtag_port_reg); + + return; +} + +/* +* No need to change this function +* Module: dp_jtag_tms +* purpose: Set tms pin to a logic level one or zero and pulse tck. +* Arguments: +* tms: 8 bit value containing the new state of tms +* Return value: None +* Constraints: Since jtag_outp function sets all the jtag pins, jtag_port_reg is used +* to modify the required jtag pins and preseve the reset. +* +*/ +void dp_jtag_tms(DPUCHAR tms) +{ + jtag_port_reg &= ~(TMS | TCK); + jtag_port_reg |= (tms ? TMS : 0u); + jtag_outp(jtag_port_reg); + jtag_port_reg |= TCK; + jtag_outp(jtag_port_reg); + return; +} + +/* +* No need to change this function +* Module: dp_jtag_tms_tdi +* purpose: Set tms amd tdi pins to a logic level one or zero and pulse tck. +* Arguments: +* tms: 8 bit value containing the new state of tms +* tdi: 8 bit value containing the new state of tdi +* Return value: None +* Constraints: Since jtag_outp function sets all the jtag pins, jtag_port_reg is used +* to modify the required jtag pins and preseve the reset. +* +*/ +void dp_jtag_tms_tdi(DPUCHAR tms, DPUCHAR tdi) +{ + jtag_port_reg &= ~(TMS | TCK | TDI); + jtag_port_reg |= ((tms ? TMS : 0u) | (tdi ? TDI : 0u)); + jtag_outp(jtag_port_reg); + jtag_port_reg |= TCK; + jtag_outp(jtag_port_reg); + return; +} + +/* +* No need to change this function +* Module: dp_jtag_tms_tdi_tdo +* purpose: Set tms amd tdi pins to a logic level one or zero, +* pulse tck and return tdi level +* Arguments: +* tms: 8 bit value containing the new state of tms +* tdi: 8 bit value containing the new state of tdi +* Return value: +* ret: 8 bit variable ontaining the state of tdo. +* Valid return values: +* 0x80: indicating a logic level high on tdo +* 0: indicating a logic level zero on tdo +* Constraints: Since jtag_outp function sets all the jtag pins, jtag_port_reg is used +* to modify the required jtag pins and preseve the reset. +* +*/ +DPUCHAR dp_jtag_tms_tdi_tdo(DPUCHAR tms, DPUCHAR tdi) +{ + DPUCHAR ret = 0x80u; + jtag_port_reg &= ~(TMS | TCK | TDI); + jtag_port_reg |= ((tms ? TMS : 0u) | (tdi ? TDI : 0u)); + jtag_outp(jtag_port_reg); + ret = jtag_inp(); + jtag_port_reg |= TCK; + jtag_outp(jtag_port_reg); + return ret; +} + +/* +* User attention: +* Module: dp_delay +* purpose: Execute a time delay for a specified amount of time. +* Arguments: +* microseconeds: 32 bit value containing the amount of wait time in microseconds. +* Return value: None +* +*/ +void dp_delay(DPULONG microseconds) +{ + dcw_delay(microseconds); +} + + +#ifdef ENABLE_DISPLAY +void dp_report_progress(DPUCHAR value) +{ + dcw_dp_report_progress(value); +} + + +void dp_display_text(DPCHAR *text) +{ + dcw_dp_display_text(text); +} + +void dp_display_value(DPULONG value,DPUINT descriptive) +{ + dcw_dp_display_value(value, descriptive); +} + +void dp_display_array(DPUCHAR *outbuf,DPUINT bytes, DPUINT descriptive) +{ + dcw_dp_display_array(outbuf, bytes, descriptive); +} +#endif +#endif + + + + +/* *************** End of File *************** */ diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpuser.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpuser.h new file mode 100644 index 0000000..6d7ddca --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dpuser.h @@ -0,0 +1,200 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dpuser.h */ +/* */ +/* Description: DP user specific file */ +/* users should define their own functions */ +/* */ +/* ************************************************************************ */ +#ifndef INC_DPUSER_H +#define INC_DPUSER_H + +/* Compiler switches */ +#define ENABLE_EMBEDDED_SUPPORT + +#define ENABLE_DISPLAY +#define ENABLE_GPIO_SUPPORT +#define PERFORM_CRC_CHECK +#define ENABLE_G3_SUPPORT + +/* Jan Sucan +#define ENABLE_G4_SUPPORT +#define ENABLE_G5_SUPPORT +*/ + +/* +Warning 1: RTG4 FPGA programming circuitry is not radiation hardened. +Please refer to the latest data on reprogramming in radiation environments. +Warning 2: Before programming, please make sure to exit the System Controller +Suspend Mode, which is used to protect the device from unintended behavior +due to single event upsets (SEUs) in radiation environment. +*/ + +/* Jan Sucan +#define ENABLE_RTG4_SUPPORT +*/ + +#define USE_PAGING +/* #define CHAIN_SUPPORT */ +/* Enable BSR_SAMPLE switch maintains the last known state of the IOs regardless +* of the data file setting. */ +/* #define BSR_SAMPLE */ + +/*************** End of compiler switches ***********************************/ + + + +/*************** Hardware related constants *****************************/ +/* +* User Attention: +* Bit assignments in the hardware JTAG port register +* +*/ +#define TCK 0x8u +#define TDI 0x1u +#define TMS 0x4u +#define TRST 0x10u +#define TDO 0x2u +/*************** End of hardware related constants ************************/ +// Jan Sucan: DirectC bug: #endif + + + +/***********************************************/ +/* DPCHAR -- 8-bit Windows (ANSI) character */ +/* i.e. 8-bit signed integer */ +/* DPINT -- 16-bit signed integer */ +/* DPLONG -- 32-bit signed integer */ +/* DPBOOL -- boolean variable (0 or 1) */ +/* DPUCHAR -- 8-bit unsigned integer */ +/* DPUSHORT -- 16-bit unsigned integer */ +/* DPUINT -- 16-bit unsigned integer */ +/* DPULONG -- 32-bit unsigned integer */ +/***********************************************/ +typedef unsigned char DPUCHAR; +typedef unsigned short DPUSHORT; +typedef unsigned int DPUINT; +typedef unsigned long DPULONG; +typedef unsigned char DPBOOL; +typedef char DPCHAR; +typedef signed int DPINT; +typedef signed long DPLONG; + +#define DPNULL ((void*)0) +#define TRUE 1U +#define FALSE 0U + +#define GPIO_SEL 1u +#define IAP_SEL 2u + + +extern DPUCHAR *image_buffer; +extern DPUCHAR hardware_interface; +extern DPUCHAR enable_mss_support; + + +void dp_exit_avionics_mode(void); +void dp_delay(DPULONG microseconds); + +#ifdef ENABLE_EMBEDDED_SUPPORT +DPUCHAR jtag_inp(void); +void jtag_outp(DPUCHAR outdata); +void dp_jtag_init(void); +void dp_jtag_tms(DPUCHAR tms); +void dp_jtag_tms_tdi(DPUCHAR tms, DPUCHAR tdi); +DPUCHAR dp_jtag_tms_tdi_tdo(DPUCHAR tms, DPUCHAR tdi); +#endif + + + +#ifdef ENABLE_DISPLAY +#define HEX 0u +#define DEC 1u +#define CHR 2u + +/******************************************************************************/ +/* users should define their own functions to replace the following functions */ +/******************************************************************************/ +void dp_display_text(DPCHAR *text); +void dp_display_value(DPULONG value,DPUINT descriptive); +void dp_display_array(DPUCHAR *value,DPUINT bytes, DPUINT descriptive); +void dp_report_progress(DPUCHAR value); + +#endif + +#endif /* INC_DPUSER_H */ + +/* *************** End of File *************** */ diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dputil.c b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dputil.c new file mode 100644 index 0000000..cccd989 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dputil.c @@ -0,0 +1,331 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dputil.c */ +/* */ +/* Description: Contains initialization and data checking functions. */ +/* */ +/* ************************************************************************ */ + +#include "dpuser.h" +#include "dputil.h" +#include "dpcom.h" +#include "dpalg.h" + +/* +* General purpose Global variables needed in the program +*/ +DPUCHAR global_uchar1; /* Global tmp should be used once and released */ +DPUCHAR global_uchar2; /* Global tmp should be used once and released */ +DPULONG global_ulong1; +DPULONG global_ulong2; +DPUINT global_uint1; +DPUINT global_uint2; +/* global_buf_SIZE needs to be set to 16 for G3 support. Increasing the value does not hurt but not needed +as long as it does not exceed 255 */ +DPUCHAR global_buf1[global_buf_SIZE]; /* General purpose global_buf1fer */ +DPUCHAR global_buf2[global_buf_SIZE]; /* global_buffer to hold UROW data */ + + + +void dp_flush_global_buf1(void) +{ + DPUCHAR index; + for (index=0u; index < global_buf_SIZE; index++) + { + global_buf1[index] = 0u; + } + return; +} + +void dp_flush_global_buf2(void) +{ + DPUCHAR index; + for (index=0u; index < global_buf_SIZE; index++) + { + global_buf2[index]=0u; + } + return; +} + +void dp_init_vars(void) +{ + error_code = DPE_SUCCESS; + return; +} + +/* +* Module: dp_check_image_crc +* purpose: Performs crc on the entire image. +* Return value: +* DPINT: User defined integer value which reports DPE_SUCCESS if there is a match or DPE_CRC_MISMATCH if failed. +* +*/ +void dp_check_image_crc(void) +{ + DPUINT expected_crc; + #ifdef PERFORM_CRC_CHECK + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nChecking data CRC..."); + #endif + #endif + + + global_ulong1 = dp_get_bytes(Header_ID,0u,4u); + if ( (global_ulong1 == 0x69736544u) || (global_ulong1 == 0x65746341u) || (global_ulong1 == 0x2D4D3447u) || (global_ulong1 == 0x34475452u) || (global_ulong1 == 0x2D4D3547u)) + { + requested_bytes = 0u; + image_size = dp_get_bytes(Header_ID,IMAGE_SIZE_OFFSET,4u); + expected_crc = (DPUINT) dp_get_bytes(Header_ID,image_size - 2u,2u); + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nExpected CRC="); + dp_display_value( expected_crc ,HEX); + #endif + if (image_size == 0u) + { + error_code = DPE_CRC_MISMATCH; + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nData file is not loaded... \r\n"); + #endif + } + else + { + #ifdef PERFORM_CRC_CHECK + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nCalculating actual CRC. Please wait...\r\n"); + #endif + /* Global_uint is used to hold the value of the calculated CRC */ + global_uint1 = 0u; + /* DataIndex is used to keep track the byte position in the image that is needed per get_data_request */ + #ifdef ENABLE_DISPLAY + old_progress = 0; + #endif + DataIndex = 0u; + requested_bytes = image_size - 2u; + while (requested_bytes) + { + page_buffer_ptr = dp_get_data(Header_ID,DataIndex*8u); + if (return_bytes > requested_bytes ) + return_bytes = requested_bytes; + for (global_ulong1=0u; global_ulong1< return_bytes;global_ulong1++) + { + global_uchar1 = page_buffer_ptr[global_ulong1]; + dp_compute_crc(); + } + DataIndex += return_bytes; + requested_bytes -= return_bytes; + + #ifdef ENABLE_DISPLAY + new_progress = (DataIndex *100 / (image_size - 2u)); + if (new_progress != old_progress) + { + #ifdef ENABLE_EMBEDDED_SUPPORT + dp_report_progress(new_progress); + #endif + old_progress = new_progress; + } + #endif + } + + if (global_uint1 != expected_crc) + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nCRC verification failed. Expected CRC = "); + dp_display_value(global_uint1,HEX); + dp_display_text(" Actual CRC = "); + dp_display_value((DPUINT) dp_get_bytes(Header_ID,image_size - 2,2),HEX); + dp_display_text("\r\n"); + #endif + error_code = DPE_CRC_MISMATCH; + } + #else + #ifdef ENABLE_DISPLAY + dp_display_text("\r\n\r\nWARNING: Skipping CRC verification...\r\n"); + #endif + #endif + } + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nData file is not valid. "); + #endif + error_code = DPE_CRC_MISMATCH; + } + return; +} + + +void dp_compute_crc(void) +{ + for (global_uchar2 = 0u; global_uchar2 < 8u; global_uchar2++) + { + global_uint2 = (global_uchar1 ^ global_uint1) & 0x01u; + global_uint1 >>= 1u; + if (global_uint2) + { + global_uint1 ^= 0x8408u; + } + global_uchar1 >>= 1u; + } + + return; +} + +void dp_check_and_get_image_size(void) +{ + + global_ulong1 = dp_get_bytes(Header_ID,0u,4u); + if ( (global_ulong1 == 0x69736544u) || (global_ulong1 == 0x65746341u) || (global_ulong1 == 0x2D4D3447u) || (global_ulong1 == 0x34475452u) || (global_ulong1 == 0x2D4D3547u)) + { + requested_bytes = 0u; + image_size = dp_get_bytes(Header_ID,IMAGE_SIZE_OFFSET,4u); + } + else + { + #ifdef ENABLE_DISPLAY + dp_display_text("\r\nData file is not valid. "); + #endif + error_code = DPE_DAT_ACCESS_FAILURE; + } + return; +} + +#ifdef ENABLE_DISPLAY +#define NB_NIBBLES_IN_INT 8 +int int_to_hex_int(int value, unsigned char * p_result, int result_size) +{ + int nibble_idx, nb_nibbles; + unsigned char conv_array[NB_NIBBLES_IN_INT]; + unsigned int uvalue; + nibble_idx = 0; + uvalue = (unsigned int)value; + + do { + int nibble = uvalue & 0x0F; + + if ( nibble < 10 ) + conv_array[nibble_idx] = nibble + '0'; + else + conv_array[nibble_idx] = nibble - 10 + 'A'; + uvalue = (uvalue >> 4); + nibble_idx++; + } while ( ( nibble_idx < NB_NIBBLES_IN_INT ) && ( uvalue > 0 ) ); + + nb_nibbles = nibble_idx; + for ( nibble_idx = 0; (nibble_idx < nb_nibbles) && (nibble_idx < result_size) ;nibble_idx++ ) + { + p_result[nibble_idx] = conv_array[nb_nibbles - nibble_idx - 1]; + } + return nibble_idx; +} + +int int_to_dec_int (int value, unsigned char * p_result) +{ + unsigned char conv_array[NB_NIBBLES_IN_INT]; + unsigned int uvalue; + unsigned int remainder; + unsigned int digit_idx,nb_digits; + + uvalue = (unsigned int)value; + digit_idx=0; + if (uvalue) + { + while (uvalue) + { + remainder = uvalue % 10; + conv_array[digit_idx] = remainder + '0'; + uvalue /= 10; + digit_idx++; + } + } + else + { + conv_array[digit_idx] = '0'; + digit_idx++; + } + + + nb_digits = digit_idx; + for ( digit_idx = 0; (digit_idx < nb_digits); digit_idx++ ) + { + p_result[digit_idx] = conv_array[nb_digits - digit_idx - 1]; + } + return digit_idx; +} +#endif + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dputil.h b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dputil.h new file mode 100644 index 0000000..b3bde12 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/DirectC/dputil.h @@ -0,0 +1,119 @@ +/* ************ MICROSEMI SOC CORP. DIRECTC LICENSE AGREEMENT ************* */ +/* ------------------------------------------------------------------------ +PLEASE READ: BEFORE INSTALLING THIS SOFTWARE, CAREFULLY READ THE FOLLOWING +MICROSEMI SOC CORP LICENSE AGREEMENT REGARDING THE USE OF THIS SOFTWARE. +INSTALLING THIS SOFTWARE INDICATES THAT YOU ACCEPT AND UNDERSTAND THIS AGREEMENT +AND WILL ABIDE BY IT. + +Note: This license agreement (“License”) only includes the following software: +DirectC. DirectC is licensed under the following terms and conditions. + +Hereinafter, Microsemi SoC Corp. shall be referred to as “Licensor” or “Author,” +whereas the other party to this License shall be referred to as “Licensee.” Each +party to this License shall be referred to, singularly, as a “Party,” or, +collectively, as the “Parties.” + +Permission to use, copy, modify, and/or distribute DirectC for any purpose, with +or without fee, is hereby granted by Licensor to Licensee, provided that the +above Copyright notice and this permission notice appear in all copies, +modifications and/or distributions of DirectC. + +DIRECTC IS PROVIDED "AS IS" AND THE AUTHOR/LICENSOR DISCLAIMS ALL WARRANTIES +WITH REGARD TO DIRECTC INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS. IN NO EVENT SHALL AUTHOR/LICENSOR BE LIABLE TO LICENSEE FOR ANY DAMAGES, +INCLUDING SPECIAL, DIRECT,INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF +CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION +WITH THE USE OR PERFORMANCE OF DIRECTC. + +Export Control: Information furnished to Licensee may include United States +origin technical data. Accordingly, Licensee is responsible for complying with, +and warrants to Licensor that it will comply with, all U.S. export control laws +and regulations, including the provisions of the Export Administration Act of +1979 and the Export Administration Regulations promulgated thereunder, the Arms +Export Control Act, and the sanctions laws administered by the Office of Foreign +Assets Control including any other U.S. Government regulation applicable to the +export, re-export, or disclosure of such controlled technical data (or the +products thereof) to Foreign Nationals, whether within or without the U.S., +including those employed by, or otherwise associated with, Licensee. Licensee +shall obtain Licensor’s written consent prior to submitting any request for +authority to export any such technical data. + +ADR: Any dispute between the Parties arising from or related to this License or +the subject matter hereof, including its validity, construction or performance +thereunder, shall be exclusively resolved through arbitration by a mutually +acceptable impartial and neutral arbitrator appointed by the Judicial +Arbitration and Mediation Services (JAMS) in accordance with its rules and +procedures. If the Parties are not able to agree on an arbitrator within 10 days +of the date of request for mediation is served, then JAMS shall appoint an +arbitrator. Notice of arbitration shall be served and filed with the JAMS main +offices in Irvine, California. Each Party shall be responsible for all costs +associated with the preparation and representation by attorneys, or any other +persons retained thereby, to assist in connection with any such Arbitration. +However, all costs charged by the mutually agreed upon Arbitration entity shall +be equally shared by the Parties. The Party seeking Mediation and/or Arbitration +as provided herein agrees that the venue for any such Mediation and Arbitration +shall be selected by the other Party and that such venue must be Los Angeles, +California; New York, New York; or Chicago, Illinois; whereby the applicable law +and provisions of the Evidence Code of the State selected thereby shall be +applicable and shall govern the validity, construction and performance of this +License. + +Governing Law: This license will be governed by the laws of the State of +California, without regard to its conflict of law provisions. + +Entire Agreement: This document constitutes the entire agreement between the +Parties with respect to the subject matter herein and supersedes all other +communications whether written or oral. */ + +/* ************************************************************************ */ +/* */ +/* JTAG_DirectC Copyright (C) Microsemi Corporation */ +/* Version 4.1 Release date January 29, 2018 */ +/* */ +/* ************************************************************************ */ +/* */ +/* Module: dputil.h */ +/* */ +/* Description: Contains functions prototypes needed to access the data */ +/* from external flash or other means of communication */ +/* */ +/* ************************************************************************ */ + +#ifndef INC_DPUTIL_H +#define INC_DPUTIL_H +#include "dpuser.h" + +/****************************************************************************/ +/* External common global variables */ +/****************************************************************************/ +/* global_buf_SIZE should not exceed 255 bytes. Only 16 is needed for G3 */ +#define global_buf_SIZE 17u + +extern DPUCHAR global_uchar1; /* Global tmp should be used once and released */ +extern DPUCHAR global_uchar2; +extern DPUINT global_uint1; +extern DPUINT global_uint2; +extern DPULONG global_ulong1; +extern DPULONG global_ulong2; +extern DPUCHAR global_buf1[global_buf_SIZE]; /* General purpose global_buffer */ +extern DPUCHAR global_buf2[global_buf_SIZE]; + + +void dp_flush_global_buf1(void); +void dp_flush_global_buf2(void); +void dp_init_vars(void); +/* Function used to identify which block is supported in the dat file and their encryption status. */ + +void dp_compute_crc(void); +void dp_check_image_crc(void); +void dp_check_and_get_image_size(void); + +#ifdef ENABLE_DISPLAY +int int_to_hex_int(int value, unsigned char * p_result, int result_size); +int int_to_dec_int(int value, unsigned char * p_result); +#endif +#endif /* INC_DPUTIL_H */ + +/* *************** End of File *************** */ + diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/Release/DMAppFpgaProg.bin b/impl/DMAppFpgaProg/DMAppFpgaProg/Release/DMAppFpgaProg.bin Binary files differnew file mode 100644 index 0000000..e6890c2 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/Release/DMAppFpgaProg.bin diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/application_state.c b/impl/DMAppFpgaProg/DMAppFpgaProg/application_state.c new file mode 100644 index 0000000..839c8da --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/application_state.c @@ -0,0 +1,14 @@ +/* Author: Jan Sucan */ + +#include <application_state.h> + +application_state_t application_state; + +void +application_state_init(void) +{ + application_state.state = APPLICATION_STATE_WAITING_FOR_OPERATION_CODE; + application_state.directc_operation_code = APPLICATION_STATE_NO_DIRECTC_OPEARATION; + application_state.directc_paging_image_offset = 0; + application_state.directc_paging_bytes_requested = 0; +}
\ No newline at end of file diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/application_state.h b/impl/DMAppFpgaProg/DMAppFpgaProg/application_state.h new file mode 100644 index 0000000..4bb87de --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/application_state.h @@ -0,0 +1,26 @@ +/* Author: Jan Sucan */ + +#ifndef APPLICATION_STATE_H_ +#define APPLICATION_STATE_H_ + +#include <stdint.h> + +#define APPLICATION_STATE_NO_DIRECTC_OPEARATION UINT8_MAX + +enum application_state_codes { + APPLICATION_STATE_WAITING_FOR_OPERATION_CODE = 0, + APPLICATION_STATE_OPERATION_WAITING_FOR_DATA +}; + +typedef struct application_state_s { + uint8_t state; /**< Stav aplikacie. */ + uint8_t directc_operation_code; /**< Kod aktualne spustenej DirectC operacie. */ + uint32_t directc_paging_image_offset; /**< Offset stranky z .DAT suboru, ak je aplikacia v stave, kedy DirectC operacia caka na data. */ + uint32_t directc_paging_bytes_requested; /**< Pocet bajtov stranky z .DAT suboru, ak je aplikacia v stave, kedy DirectC operacia caka na data.*/ +} application_state_t; + +extern application_state_t application_state; + +void application_state_init(void); + +#endif /* APPLICATION_STATE_H_ */
\ No newline at end of file diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/directc_wrapper.c b/impl/DMAppFpgaProg/DMAppFpgaProg/directc_wrapper.c new file mode 100644 index 0000000..9b91942 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/directc_wrapper.c @@ -0,0 +1,341 @@ +/* Author: Jan Sucan */ + +#include <directc_wrapper.h> + +#include <diagnostic_module/diagnostic_module.h> +#include <protocol.h> +#include <protocol_return_codes.h> +#include <application_state.h> +#include <setjmp_buffers.h> + +#include <DirectC/dpalg.h> + +#include <stdarg.h> +#include <stdint.h> +#include <stdio.h> + +/** + * @brief Pocet tikov systemoveho COUNT registra pre odmeranie 1 mikrosekundy. + */ +#define DCW_COUNT_DIFF_FOR_1_US 65 + +/* + * TDI = PD00, gpio 96, port 3 + * TDO = PD01, gpio 97, port 3 + * TCK = PD02, gpio 98, port 3 + * TMS = PD03, gpio 99, port 3 + * TRST = PD13, gpio 109, port 3 + */ +#define DCW_TDI 96 +#define DCW_TDO 97 +#define DCW_TCK 98 +#define DCW_TMS 99 +#define DCW_TRST 109 + +/** + * @brief Buffer pre ulozenie textovych vypisov z DirectC operacii. + * + * 1 bajt navyse je vyhradeny pre ukoncovaci nulovy bajt znakoveho retazca. + */ +char dcw_display_buffer[DCW_DISPLAY_BUFFER_SIZE + 1U]; + +/** + * @brief Index do bufferu pre ulozenie textovych vypisov z DirectC operacii. + * + * Ukazuje na dalsi volny znak. + */ +unsigned dcw_display_buffer_index = 0U; + +static void dcw_display_buffer_clear(void); +static void dcw_print(const char * format, ...); +static void dcw_configure_io(void); + +/** + * @brief Inicializacia wrapperu pre DirectC. + * + * Nastavia sa I/O piny pre emulovany JTAG. + */ +void +dcw_init(void) +{ + dcw_configure_io(); +} + +/** + * @brief Spustenie DirectC operacie. + * + * @param opcode Operacny kod DirectC operacie (treba najst v dokumentacii k DirectC). + */ +int +dcw_execute_operation(DPUCHAR opcode) +{ + // Zmazat vypis z predchadzajucej operacie + dcw_display_buffer_clear(); + // Urcit spustanu DirectC akciu + Action_code = opcode; + return dp_top(); +} + +/** + * @brief Ziskanie textoveho vypisu DirectC operacie. + * + * @param text Ukazovatel na ukazovatel na zaciatok bufferu s textovym vypisom DirectC operacie. + * @param chars Ukazovatel na premennu pre ulozenie poctu znakov textoveho vypisu. + */ +void +dcw_get_displayed_text(const char ** const text, size_t * const chars) +{ + *text = dcw_display_buffer; + *chars = dcw_display_buffer_index; +} + +/** + * @brief Blokujuce cakanie pre potreby DirectC kodu. + * + * @param microseconds Pocet mikrosekund, kolko sa ma cakat (moze sa aj viac). + */ +void +dcw_delay(DPULONG microseconds) +{ + uint32_t a = 1; // a < b, vynuti sa opakovanie merania aktualnej mikrosekundy + uint32_t b = 0; + + while (microseconds > 0) { + if (b < a) { + // Doslo k preteceniu casovaca, meranie aktualnej mikrosekundy sa spusti znovu + a = SYSREG_COUNT_GET; + } else if ((b - a) >= DCW_COUNT_DIFF_FOR_1_US) { + // Uplynula minimalne 1 mikrosekunda, zacne sa s meranim dalsej + --microseconds; + a = SYSREG_COUNT_GET; + } + b = SYSREG_COUNT_GET; + } +} + +/** + * @brief Ziskanie hodnoty vstupneho JTAG pinu. + * + * Funkcia zapise logicku hodnotu vstupu do datoveho registra, ktory pouziva DirectC. + */ +DPUCHAR +dcw_jtag_inp(void) +{ + const unsigned port = DCW_TDO / 32U; + const unsigned pin = DCW_TDO % 32U; + const uint32_t m = (1 << pin); + + return ((DPUCHAR) ((AVR32_GPIO.port[port].pvr & m) >> pin)) << 7; +} + +/** + * @brief Nastavenie hodnot vystupnych JTAG pinov. + * + * Funkcia zapise logicke hodnoty vystupov z formatu, ktory pouziva DirectC, do GPIO registrov MCU. + * + * @param outdata Slovo s logickymi hodnotami vystupnych JTAG pinov. + */ +void +dcw_jtag_outp(DPUCHAR outdata) +{ + const unsigned directc_output_masks[] = {TDI, TCK, TMS, TRST}; + const unsigned gpio_outputs[] = {DCW_TDI, DCW_TCK, DCW_TMS, DCW_TRST}; + + const unsigned output_count = sizeof(gpio_outputs) / sizeof(gpio_outputs[0]); + + for (unsigned i = 0; i < output_count; ++i) { + const unsigned port = gpio_outputs[i] / 32U; + const unsigned pin = gpio_outputs[i] % 32U; + const uint32_t m = (1 << pin); + const unsigned value = outdata & directc_output_masks[i]; + + if (value == 0) { + AVR32_GPIO.port[port].ovrc = m; + } else { + AVR32_GPIO.port[port].ovrs = m; + } + } +} + +/** + * @brief Pridanie textu do textoveho bufferu vypisov DirectC operacie. + * + * @param text Ukazatel na znakovy retazec pre zapis do bufferu pre DirectC vystup. + */ +void +dcw_dp_display_text(const char *text) +{ + dcw_print(text); +} + +/** + * @brief Pridanie textu, reprezentujuceho ciselnu hodnotu, do textoveho bufferu vypisov DirectC operacie. + * + * Predvolena volba pri neznamej hodnote @p descriptive je desiatkovy format. + * + * @param value Ciselna hodnota. + * @param descriptive DirectC kod urcujuci, v akom formate bude hodnota vypisana. + */ +void +dcw_dp_display_value(DPULONG value, DPUINT descriptive) +{ + switch (descriptive) + { + case HEX: + dcw_print("%X", value); + break; + case CHR: + dcw_print("%c", value); + break; + default: // DEC, DPULONG + dcw_print("%lu", value); + break; + } +} + +/** + * @brief Pridanie textu, reprezentujuceho pole ciselnych hodnot, do textoveho bufferu vypisov DirectC operacie. + * + * Predvolena volba pri neznamej hodnote @p descriptive je desiatkovy format. + * + * @param value Ukazatel na pole ciselnych hodnot. + * @param bytes Pocet prvkov pola @p value. + * @param descriptive DirectC kod urcujuci, v akom formate bude hodnota vypisana. + */ +void +dcw_dp_display_array(DPUCHAR *value, DPUINT bytes, DPUINT descriptive) +{ + if (bytes >= 1) { + dcw_dp_display_value(value[0], descriptive); + } + for (DPUINT i = 1; i < bytes; ++i) { + dcw_print(", "); + dcw_dp_display_value(value[i], descriptive); + } +} + +/** + * @brief Pridanie textu, reprezentujuceho postup DirectC operacie, do textoveho bufferu vypisov DirectC operacie. + * + * Ciselna hodnota postupu P sa vypise ako retazec "Progress: P". + * + * @param value Ciselna hodnota udavajuca postup DirectC operacie. + */ +void +dcw_dp_report_progress(DPUCHAR value) +{ + dcw_print("Progress: %d", value); +} + +/** + * @brief Ziskanie stranky z .DAT suboru. + * + * Odosle poziadavku na stranku. + * + * Funkcia je volana DirectC kodom, ked je potrebne ziskat dalsiu stranku z .DAT suboru. V tomto pripade nedojde k navratu z funkcie, ale + * je zavolana hlavna slucka aplikacneho protkolu a caka sa na prikaz od PC, ktory doda prislusnu stranku z .DAT suboru. + * + * Do funkcie sa tiez moze skocit zvonku pomocou longjmp() vtedy, ked PC poslal stranku z .DAT suboru. Az potom dojde k navratu z funkcie + * a k pokracovaniu DirectC kodu, ktory tuto funkciu zavolal. + * + * @param image_requested_address Offset dat stranky v .DAT subore. + * @param return_bytes Ukazatel na premennu obsahujucu pocet bajtov stranky. V nej bude po skonceni funkcie ulozeny pocet skutocne nacitanych bajtov alebo 0 pri chybe. + * @param start_page_address Ukazatel na premennu pre ulozenie offsetu prveho bajtu stranky v .DAT subore. + * @param end_page_address Ukazatel na premennu pre ulozenie offsetu posledneho bajtu stranky v .DAT subore. + */ +void +dcw_get_page_data_from_external_storage(DPULONG image_requested_address, DPULONG * const return_bytes, + DPULONG * const start_page_address, DPULONG * const end_page_address) +{ + // Odoslat poziadavku na usek z .DAT suboru + uint8_t request_data[sizeof(uint8_t) + (2U * sizeof(uint32_t))]; + SET_BYTES_FROM_UINT8_T(request_data, 0U, application_state.directc_operation_code); + SET_BYTES_FROM_UINT32_T(request_data, 1U, (uint32_t) image_requested_address); + SET_BYTES_FROM_UINT32_T(request_data, 5U, (uint32_t) *return_bytes); + data_send(request_data, sizeof(request_data)); + + // Nastavit stav aplikacie signalizujuci, ze DirectC operacia caka na stranku z .DAT suboru + application_state.state = APPLICATION_STATE_OPERATION_WAITING_FOR_DATA; + application_state.directc_paging_image_offset = (uint32_t) image_requested_address; + application_state.directc_paging_bytes_requested = (uint32_t) *return_bytes; + + // Navratovy kod setjmp() je bude 0 alebo pocet prijatych bajtov stranky .DAT suboru + const int setjmp_ret = setjmp(setjmp_buffer_provide_data_to_operation); + + if (!setjmp_ret) { + // Su potrebne data pre DirectC operaciu + // Stav je ulozeny, znovu vstupit do prikazovej slucky aplikacneho protokolu pre prijem prikazov + protocol_loop_wait_for_command(); + } else { + // Bolo zavolane longjmp(), tzn. ze boli dodane nejake data pre DirectC operaciu, ktore uz su naopirovane v DirectC page_global_buffer + *return_bytes = (DPULONG) setjmp_ret; + *start_page_address = image_requested_address; + *end_page_address = image_requested_address + *return_bytes - 1; + } + // Pokracuje sa v spracovavani DirectC operacie s dodanymi datami z .DAT suboru +} + +/* Static functions */ + +/** + * @brief Vycistenie bufferu pre vypisy DirectC operacie. + */ +void +dcw_display_buffer_clear(void) +{ + dcw_display_buffer_index = 0; +} + +void +dcw_print(const char * format, ...) { + const size_t free_chars = DCW_DISPLAY_BUFFER_SIZE - dcw_display_buffer_index; + + if (free_chars > 0) { + va_list args; + va_start(args, format); + char * const buf = dcw_display_buffer + dcw_display_buffer_index; + const size_t chars_written = vsnprintf(buf, free_chars + 1, format, args); + va_end(args); + + if ((chars_written > 0) && (chars_written <= free_chars)) { + // Write was successful, update index for the next write + dcw_display_buffer_index += chars_written; + } + } +} + +void +dcw_configure_io(void) +{ + const unsigned gpio_inputs[] = {DCW_TDO}; + const unsigned gpio_outputs[] = {DCW_TDI, DCW_TCK, DCW_TMS, DCW_TRST}; + + const unsigned gpio_input_count = sizeof(gpio_inputs) / sizeof(gpio_inputs[0]); + const unsigned gpio_output_count = sizeof(gpio_outputs) / sizeof(gpio_outputs[0]); + + for (unsigned i = 0; i < gpio_input_count; ++i) { + const unsigned port = gpio_inputs[i] / 32U; + const unsigned pin = gpio_inputs[i] % 32U; + const uint32_t m = (1 << pin); + // Odpoji sa pull-up a pull-down rezistor + AVR32_GPIO.port[port].puerc = m; + AVR32_GPIO.port[port].pderc = m; + // Nastavi sa ako vstup, deaktivuje sa output driver + AVR32_GPIO.port[port].oderc = m; + // Bude ovladany GPIO + AVR32_GPIO.port[port].gpers = m; + } + + for (unsigned i = 0; i < gpio_output_count; ++i) { + const unsigned port = gpio_outputs[i] / 32U; + const unsigned pin = gpio_outputs[i] % 32U; + const uint32_t m = (1 << pin); + // Odpoji sa pull-up a pull-down rezistor + AVR32_GPIO.port[port].puerc = m; + AVR32_GPIO.port[port].pderc = m; + // Nastavi sa ako vystup, aktivuje sa output driver + AVR32_GPIO.port[port].oders = m; + // Bude ovladany GPIO + AVR32_GPIO.port[port].gpers = m; + } +}
\ No newline at end of file diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/directc_wrapper.h b/impl/DMAppFpgaProg/DMAppFpgaProg/directc_wrapper.h new file mode 100644 index 0000000..3633f22 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/directc_wrapper.h @@ -0,0 +1,33 @@ +/* Author: Jan Sucan */ + +#ifndef DIRECTC_WRAPPER_H_ +#define DIRECTC_WRAPPER_H_ + +#include <DirectC/dpuser.h> + +#include <stdlib.h> + +/** + * @brief Velkost bufferu pre ulozenie znakov textoveho vypisu o priebehu DirectC operacie. + */ +#define DCW_DISPLAY_BUFFER_SIZE 8192U // znakov + +/* Interface to DirectC library */ +int dcw_execute_operation(DPUCHAR opcode); +void dcw_get_displayed_text(const char ** const text, size_t * const chars); + +/* Functions from dpuser.h */ +void dcw_init(void); +void dcw_delay(DPULONG microseconds); +DPUCHAR dcw_jtag_inp(void); +void dcw_jtag_outp(DPUCHAR outdata); +void dcw_dp_display_text(const char *text); +void dcw_dp_display_value(DPULONG value,DPUINT descriptive); +void dcw_dp_display_array(DPUCHAR *value,DPUINT bytes, DPUINT descriptive); +void dcw_dp_report_progress(DPUCHAR value); + +/* Functions from dpcom.h */ +void dcw_get_page_data_from_external_storage(DPULONG image_requested_address, DPULONG * const return_bytes, + DPULONG * const start_page_address, DPULONG * const end_page_address); + +#endif /* DIRECTC_WRAPPER_H_ */
\ No newline at end of file diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/fpga.c b/impl/DMAppFpgaProg/DMAppFpgaProg/fpga.c new file mode 100644 index 0000000..dc32b52 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/fpga.c @@ -0,0 +1,44 @@ +/* Author: Jan Sucan */ + +#include <avr32/io.h> +#include <fpga.h> + +/** + * @brief Inicializacia I/O pre ovladanie FPGA. + * + * Nastavi sa vystup PD30 pre ovladanie signalu nPRG. Predvoleny stav je vypnute napajanie. + */ +void +fpga_init(void) +{ + /* PD30 = nPRG = GPIO number 126 = port 3 pin 30 */ + + /* PD30 je ovladany GPIO, nie perifernou funkciou */ + AVR32_GPIO.port[3].gpers = 1 << 30; + /* Aktivacia driveru pinu */ + AVR32_GPIO.port[3].oders = 1 << 30; + /* Diagnosticky modul uz ma pripojeny pull-up, vypne sa pull-up v MCU */ + AVR32_GPIO.port[3].puerc = 1 << 30; + /* Vypne sa pull-down */ + AVR32_GPIO.port[3].pderc = 1 << 30; + /* Predvoleny stav napajania */ + fpga_power_supply_off(); +} + +/** + * @brief Zapnutie napajania FPGA pomocou signalu nPRG. + */ +void +fpga_power_supply_on(void) +{ + AVR32_GPIO.port[3].ovrc = 1 << 30; +} + +/** + * @brief Vypnutie napajania FPGA pomocou signalu nPRG. + */ +void +fpga_power_supply_off(void) +{ + AVR32_GPIO.port[3].ovrs = 1 << 30; +} diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/fpga.h b/impl/DMAppFpgaProg/DMAppFpgaProg/fpga.h new file mode 100644 index 0000000..75130dd --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/fpga.h @@ -0,0 +1,10 @@ +/* Author: Jan Sucan */ + +#ifndef FPGA_H_ +#define FPGA_H_ + +void fpga_init(void); +void fpga_power_supply_on(void); +void fpga_power_supply_off(void); + +#endif /* FPGA_H_ */
\ No newline at end of file diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/main.c b/impl/DMAppFpgaProg/DMAppFpgaProg/main.c new file mode 100644 index 0000000..b7a65df --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/main.c @@ -0,0 +1,20 @@ +/* Author: Jan Sucan */ + +#include <avr32/io.h> + +#include <diagnostic_module/diagnostic_module.h> +#include <protocol.h> +#include <fpga.h> + +int main(void) +{ + diagnostic_module_init(); + fpga_init(); + + protocol_loop(); + + // Sem sa tok programu nikdy nedostane + while (1) { + ; + } +}
\ No newline at end of file diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/protocol.c b/impl/DMAppFpgaProg/DMAppFpgaProg/protocol.c new file mode 100644 index 0000000..ec4e5c4 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/protocol.c @@ -0,0 +1,437 @@ +/* Author: Jan Sucan */ + +#include <stdint.h> +#include <stdlib.h> +#include <stdbool.h> +#include <string.h> + +#include <diagnostic_module/diagnostic_module.h> + +#include <protocol.h> +#include <application_state.h> +#include <protocol_return_codes.h> +#include <directc_wrapper.h> +#include <setjmp_buffers.h> +#include <fpga.h> + +#include <dpcom.h> // Pre pristup k hodnote PAGE_BUFFER_SIZE + +/** + * @brief Pocet bajtov platneho prikazu pre spustenie DirectC operacie pre FPGA. + * + * 1B je kod prikazu v aplikacnom protokole a 1B je kod DirectC operacie. + */ +#define PROTOCOL_CMD_EXECUTE_OPERATION_BYTES 2U + +/** + * @brief Pocet bajtov prikazu pre ziskanie textoveho vypisu o priebehu naposledy spustenej DirectC operacie. + */ +#define PROTOCOL_CMD_GET_OPERATION_LOG_BYTES 1U + +/** + * @brief Pocet bajtov prikazu pre ziskanie stavu aplikacie. + */ +#define PROTOCOL_CMD_GET_APPLICATION_STATUS_BYTES 1U + +/** + * @brief Pocet bajtov prikazu pre zrusenie aktualne prebiehajucej DirectC operacie. + */ +#define PROTOCOL_CMD_CANCEL_CURRENT_OPERATION_BYTES 1U + +/** + * @brief Maximalny pocet bajtov prikazu pre dodanie stranky .DAT suboru do aktualne prebiehajucej DirectC operacie. + * + * 1B je kod prikazu v aplikacnom protokole a PAGE_BUFFER_SIZE su data z prislusnej stranky .DAT suboru. + */ +#define PROTOCOL_CMD_DELIVER_DATA_TO_OPERATION_MAX_BYTES (1U + PAGE_BUFFER_SIZE) + +/** + * @brief Pocet bajtov platneho prikazu pre ovladanie napajania FPGA. + * + * 1B je kod prikazu v aplikacnom protokole a 1B je priznak zapnutia/vypnutia napajania. + */ +#define PROTOCOL_CMD_FPGA_POWER_SUPPLY_CTRL_BYTES 2U + +/** + * @brief Pocet bajtov najvacsieho platneho prikazu. + * + * Najvacsi platny prikaz je prikaz pre spustenie DirectC operacie. Ma 2 bajty (kod prikzu, kod DirectC operacie). + */ +#define PROTOCOL_CMD_MAX_BYTES PROTOCOL_CMD_DELIVER_DATA_TO_OPERATION_MAX_BYTES + +/** + * @brief Nazov aplikacie. + * + * Pouzity v identifikacnom retazci aplikacie. + */ +#define PROTOCOL_APPLICATION_NAME "DMAppFpgaProg" + +/** + * @brief Verzia aplikacie. + * + * Pouzita v identifikacnom retazci aplikacie. + */ +#define PROTOCOL_APPLICATION_VERSION "0.1.0" + +enum protocol_command_codes { + PROTOCOL_CMD_EXECUTE_OPERATION = 0, + PROTOCOL_CMD_GET_OPERATION_LOG, + PROTOCOL_CMD_GET_APPLICATION_STATUS, + PROTOCOL_CMD_CANCEL_CURRENT_OPERATION, + PROTOCOL_CMD_DELIVER_DATA_TO_OPERATION, + PROTOCOL_CMD_FPGA_POWER_SUPPLY_CTRL, + PROTOCOL_CMD_GET_APPLICATION_ID = UINT8_MAX +}; + +static void protocol_cmd_execute_operation(const uint8_t * const buf, size_t bytes_received); +static void protocol_cmd_get_operation_log(size_t bytes_received); +static void protocol_cmd_get_application_status(size_t bytes_received); +static void protocol_cmd_cancel_current_operation(size_t bytes_received); +static void protocol_cmd_deliver_data_to_operation(const uint8_t * const buf, size_t bytes_received); +static void protocol_cmd_fpga_power_supply_ctrl(const uint8_t * const buf, size_t bytes_received); +static void protocol_cmd_get_application_id(void); +static void protocol_send_reply_with_data(uint8_t ret_code, uint8_t * const data, uint16_t data_size); +static void protocol_send_reply(uint8_t ret_code); + +/** + * @brief Inicializacia aplikacneho protokolu pre programovanie FPGA a vstup do prikazovej slucky pre cakanie na prikazy. + * + * Podporovane prikazy: + * Spustenie DirectC operacie pre FPGA: + * 1 B - kod prikazu + * 1 B - kod DirectC operacie + * Odpoved v pripade chyby: + * 1 B - navratovy kod chyby + * Odpoved v pripade dokoncenia operacie: + * 1 B - navratovy kod aplikacneho protokolu + * 1 B - navratovy kod DirectC operacie + * Odpoved v pripade potreby dalsej stranky z .DAT suboru: + * 1 B - kod aktualne spustenej DirectC operacie + * 4 B - offset pozadovanej stranky z .DAT suboru + * 4 B - pocet bajtov pozadovanej stranky z .DAT suboru + * + * + * Ziskanie textoveho vypisu o priebehu naposledy spustenej DirectC operacie: + * 1 B - kod prikazu + * Odpoved v pripade chyby: + * 1 B - navratovy kod chyby + * Odpoved v pripade uspechu: + * 1 B - navratovy kod signalizujuci uspech + * ASCII znaky textoveho vypisu o priebehu naposledy spustenej DirectC operacie bez ukoncovacich znakov '\0'. + * + * + * Ziskanie stavu aplikacie: + * 1 B - kod prikazu + * Odpoved v pripade chyby: + * 1 B - navratovy kod chyby + * Odpoved v pripade, kedy aplikacia caka na kod prikazu DirectC operacie: + * 1 B - navratovy kod aplikacie signalizujuci uspech + * Odpoved v pripade, kedy prebiehajuca DirectC operacia caka na stranku z .DAT suboru: + * 1 B - kod aktualne prebiehajucej DirectC operacie + * 4 B - offset pozadovanej stranky z .DAT suboru + * 4 B - pocet bajtov pozasovanej stranky z daneho offsetu + * + * + * Zrusenie aktualne prebiehajucej DirectC operacie: + * 1 B - kod prikazu + * Odpoved v pripade chyby: + * 1 B - navratovy kod chyby + * Odpoved v pripade uspechu: + * 1 B - navratovy kod signalizujuci uspech + * + * + * Dodanie stranky z .DAT suboru do aktualne prebiehajucej DirectC operacie: + * 1 B - kod prikazu + * N B - data stranky z .DAT suboru + * Odpoved v pripade dokoncenia operacie: + * 1 B - navratovy kod aplikacneho protokolu + * 1 B - navratovy kod DirectC operacie + * Odpoved v pripade potreby dalsej stranky z .DAT suboru: + * 1 B - kod aktualne spustenej DirectC operacie + * 4 B - offset pozadovanej stranky z .DAT suboru + * 4 B - pocet bajtov pozadovanej stranky z .DAT suboru + * + * + * Zapinanie a vypinanie napajania FPGA cez signal nPRG + * 1 B - kod prikazu + * 1 B - 0 vypnut napajanie, != 0 zapnut napajanie + * Odpoved: + * 1 B - navratovy kod + * + * + * Ziskanie identifikacneho retazca aplikacie: + * 1 B - kod prikazu + * Odpoved: + * ASCII znaky ID retazca bez ukoncovacieho znaku '\0'. + */ +void +protocol_loop(void) +{ + // Nie je potrebne rozlisovat, ci sa sem tok programu dostal cez longjmp() alebo nie + // V kazdom pripade sa inicializuje protokol + setjmp(setjmp_buffer_cancel_operation); + // Inicializacia wrapperu pre DirectC (stav JTAG I/O pinov) + dcw_init(); + // Inicializacia stavu aplikacie + application_state_init(); + protocol_loop_wait_for_command(); +} + +/** + * @brief Prikazova slucka aplikacneho protokolu pre prijem a spracovavanie prikazov. + * + * Kod tejto prikazovej slucky nemoze byt priamo sucastou funkcie protocol_loop(), + * ale musi to byt samostatna funkcia. Z main() sa k tejto prikazovej slucke musi + * dostat riadenie s inicializaciou (vo funkcii protocol_loop()). Ked sa ale vracia + * riadenie do slucky z DirectC wrapperu, inicializacia sa musi preskocit, inak sa + * 1) ulozi setjmp kontext spolu s rozpracovanym prikazom a 2) prepise sa stav + * aplikacie na stav po initializacii. + */ +void +protocol_loop_wait_for_command(void) +{ + while (1) { + uint8_t buf[PROTOCOL_CMD_MAX_BYTES]; + size_t bytes_received; + + // Prijmu sa data prikazu + while (data_receive(buf, PROTOCOL_CMD_MAX_BYTES, &bytes_received) != DATA_OK); + + // Ziska sa kod prikazu + const uint8_t cmd_code = GET_UINT8_T_FROM_BYTES(buf, 0); + + // Dalej sa spracje konkretny prikaz + switch (cmd_code) { + case PROTOCOL_CMD_EXECUTE_OPERATION: + protocol_cmd_execute_operation(buf, bytes_received); + break; + + case PROTOCOL_CMD_GET_OPERATION_LOG: + protocol_cmd_get_operation_log(bytes_received); + break; + + case PROTOCOL_CMD_GET_APPLICATION_STATUS: + protocol_cmd_get_application_status(bytes_received); + break; + + case PROTOCOL_CMD_CANCEL_CURRENT_OPERATION: + protocol_cmd_cancel_current_operation(bytes_received); + break; + + case PROTOCOL_CMD_DELIVER_DATA_TO_OPERATION: + protocol_cmd_deliver_data_to_operation(buf, bytes_received); + break; + + case PROTOCOL_CMD_FPGA_POWER_SUPPLY_CTRL: + protocol_cmd_fpga_power_supply_ctrl(buf, bytes_received); + break; + + case PROTOCOL_CMD_GET_APPLICATION_ID: + protocol_cmd_get_application_id(); + break; + + default: + // Neznamy kod prikazu + protocol_send_reply(PROTOCOL_ERROR_UNKNOWN_CMD_CODE); + break; + } + } +} + +/** + * @brief Spracovanie prikazu pre spustenie DirectC operacie pre FPGA. + * + * \param buf Data prijateho prikazu. + * \param bytes_received Pocet bajtov bufferu \p buf. + */ +void +protocol_cmd_execute_operation(const uint8_t * const buf, size_t bytes_received) +{ + if (bytes_received != PROTOCOL_CMD_EXECUTE_OPERATION_BYTES) { + // Neplatna velkost prikazu + protocol_send_reply(PROTOCOL_ERROR_INCORRECT_CMD_SIZE); + } else if (application_state.state != APPLICATION_STATE_WAITING_FOR_OPERATION_CODE) { + // Nejaka DirectC operacia uz aktualne prebieha + protocol_send_reply(PROTOCOL_ERROR_OPERATION_IN_PROGRESS); + } else { + // OK, ziska sa kod operacie, overenie jeho spravnosti sa necha na DirectC kod + const uint8_t directc_operation_code = GET_UINT8_T_FROM_BYTES(buf, 1); + // Kod spustenej operacie sa ulozi do stavu aplikacie + application_state.directc_operation_code = directc_operation_code; + // Navratove hodnoty DirectC operacii sa vojdu do 8 bitov (manualne skontrolovane v DrectC/dpalg.h) + const uint8_t directc_retcode = dcw_execute_operation((DPUCHAR) directc_operation_code); + // Operacia dokoncena, zmeni sa stav aplikacie (bude sa cakat na kod dalsej DirectC operacie) + application_state.state = APPLICATION_STATE_WAITING_FOR_OPERATION_CODE; + // Odosle sa vysledok DirectC operacie (1 B pre kod aplikacneho protokolu, 1 B pre navratovy kod DirectC) + uint8_t data[2]; + data[1] = directc_retcode; + protocol_send_reply_with_data(PROTOCOL_OK, data, sizeof(data)); + } +} + +/** + * @brief Spracovanie prikazu pre ziskanie textoveho vypisu o priebehu naposledy spustenej DirectC operacie. + * + * \param bytes_received Pocet bajtov prijateho prikazu. + */ +void +protocol_cmd_get_operation_log(size_t bytes_received) +{ + if (bytes_received != PROTOCOL_CMD_GET_OPERATION_LOG_BYTES) { + // Neplatna velkost prikazu + protocol_send_reply(PROTOCOL_ERROR_INCORRECT_CMD_SIZE); + } else { + // OK, zostavi sa odpoved + // 1 B vyhradeny pre navratovy kod aplikacie + uint8_t data[1U + DCW_DISPLAY_BUFFER_SIZE]; + const char * log_data; + size_t log_size; + dcw_get_displayed_text(&log_data, &log_size); + // Prekopirovat data do bufferu s vyhradenym prvym bajtom na zaciatku + memcpy(data + 1U, log_data, log_size); + // Odoslanie logu + protocol_send_reply_with_data(PROTOCOL_OK, data, 1U + log_size); + } +} + +/** + * @brief Spracovanie prikazu pre ziskanie stavu aplikacie. + * + * \param bytes_received Pocet bajtov prijateho prikazu. + */ +void +protocol_cmd_get_application_status(size_t bytes_received) +{ + if (bytes_received != PROTOCOL_CMD_GET_APPLICATION_STATUS_BYTES) { + // Neplatna velkost prikazu + protocol_send_reply(PROTOCOL_ERROR_INCORRECT_CMD_SIZE); + } else if (application_state.state == APPLICATION_STATE_WAITING_FOR_OPERATION_CODE) { + // OK, aplikacia caka na spustenie DirectC operacie + protocol_send_reply(PROTOCOL_OK); + } else { + // OK, prebieha DirectC operacia a caka na stranku z .DAT suboru + const size_t data_size = sizeof(application_state.directc_operation_code) + + sizeof(application_state.directc_paging_image_offset) + + sizeof(application_state.directc_paging_bytes_requested); + uint8_t data[data_size]; + // Kod stavu aplikacie sa bude odosielat vzdy + SET_BYTES_FROM_UINT8_T(data, 0U, application_state.directc_operation_code); + SET_BYTES_FROM_UINT32_T(data, 1U, application_state.directc_paging_image_offset); + SET_BYTES_FROM_UINT32_T(data, 5U, application_state.directc_paging_bytes_requested); + + // Odoslat pripravene data odpovede + protocol_send_reply_with_data(PROTOCOL_OK, data, data_size); + } +} + +/** + * @brief Spracovanie prikazu pre zrusenie aktualne prebiehajucej DirectC operacie. + * + * \param bytes_received Pocet bajtov prijateho prikazu. + */ +void +protocol_cmd_cancel_current_operation(size_t bytes_received) +{ + if (bytes_received != PROTOCOL_CMD_CANCEL_CURRENT_OPERATION_BYTES) { + // Neplatna velkost prikazu + protocol_send_reply(PROTOCOL_ERROR_INCORRECT_CMD_SIZE); + } else if (application_state.state == APPLICATION_STATE_WAITING_FOR_OPERATION_CODE) { + // Ziadna DirectC operacia neprebieha + protocol_send_reply(PROTOCOL_ERROR_NO_OPERATION_IN_PROGRESS); + } else { + // OK, odosle sa odpoved + protocol_send_reply(PROTOCOL_OK); + // Skoci sa na zaciatok slucky aplikacneho protokolu + longjmp(setjmp_buffer_cancel_operation, 1); + } +} + +/** + * @brief Spracovanie prikazu pre dodanie stranky .DAT suboru do aktualne prebiehajucej DirectC operacie. + * + * \param buf Data prijateho prikazu. + * \param bytes_received Pocet bajtov bufferu \p buf. + */ +void +protocol_cmd_deliver_data_to_operation(const uint8_t * const buf, size_t bytes_received) +{ + if (application_state.state == APPLICATION_STATE_WAITING_FOR_OPERATION_CODE) { + // Ziadna DirectC operacia neprebieha + protocol_send_reply(PROTOCOL_ERROR_NO_OPERATION_IN_PROGRESS); + } else if (((bytes_received - 1U) < application_state.directc_paging_bytes_requested) + || (bytes_received > PROTOCOL_CMD_DELIVER_DATA_TO_OPERATION_MAX_BYTES)) { + // Neplatna velkost prikazu + protocol_send_reply(PROTOCOL_ERROR_INCORRECT_CMD_SIZE); + } else { + // OK, nakopirovat data do DirectC page bufferu + memcpy(page_global_buffer, buf + 1U, bytes_received - 1U); + // Pocet prijatych bajtov .DAT suboru je urcite nenulovy (definovany konstantami pre kontrolu velkosti prijateho prikazu) + // Do DirectC wrapperu sa pocet bajtov stranky preda cez setjmp()/longjmp() + longjmp(setjmp_buffer_provide_data_to_operation, (int) (bytes_received - 1U)); + } +} + +/** + * @brief Spracovanie prikazu pre zapinanie a vypinanie napajania FPGA. + * + * \param buf Data prijateho prikazu. + * \param bytes_received Pocet bajtov bufferu \p buf. + */ +void +protocol_cmd_fpga_power_supply_ctrl(const uint8_t * const buf, size_t bytes_received) +{ + if (bytes_received != PROTOCOL_CMD_FPGA_POWER_SUPPLY_CTRL_BYTES) { + // Neplatna velkost prikazu + protocol_send_reply(PROTOCOL_ERROR_INCORRECT_CMD_SIZE); + } else { + // OK, zapne/vypne sa napajanie FPGA + if (buf[1U] == 0) { + fpga_power_supply_off(); + } else { + fpga_power_supply_on(); + } + protocol_send_reply(PROTOCOL_OK); + } +} + +/** + * @brief Spracovanie prikazu pre ziskanie identifikacneho retazca aplikacie. + */ +void +protocol_cmd_get_application_id(void) +{ + // Prikaz pre ziskanie identifikacneho retazca aplikacie je OK + // Zostavi sa identifikacny retazec + char id_string[64]; + int id_string_length = firmware_identification_string(id_string, PROTOCOL_APPLICATION_NAME, PROTOCOL_APPLICATION_VERSION); + // Odosle sa + data_send((uint8_t *) id_string, id_string_length); +} + + +/** + * @brief Odoslanie odpovede aplikacneho protokolu, ktora nesie data. + * + * @param ret_code Navratovy kod v odpovedi. + * @param data Ukazovatel na buffer dat pre odoslanie. Musi mat vyhradeny prvy bajt pre umiestnenie navratoveho kodu. + * @param data_size Velkost bufferu v bajtoch. + */ +void +protocol_send_reply_with_data(uint8_t ret_code, uint8_t * const data, uint16_t data_size) +{ + data[0] = ret_code; + // Predpoklada sa, ze sa odosiela navratovy kod 1B + 512B dat stranky + data_send(data, data_size); +} + +/** + * @brief Odoslanie odpovede aplikacneho protokolu bez pripojenych dat. + * + * @param ret_code Navratovy kod v odpovedi. + */ +void +protocol_send_reply(uint8_t ret_code) +{ + // Nekontroluje sa uspesnost odoslania + data_send(&ret_code, 1); +} diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/protocol.h b/impl/DMAppFpgaProg/DMAppFpgaProg/protocol.h new file mode 100644 index 0000000..3eb4e7c --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/protocol.h @@ -0,0 +1,9 @@ +/* Author: Jan Sucan */ + +#ifndef PROTOCOL_H_ +#define PROTOCOL_H_ + +void protocol_loop(void); +void protocol_loop_wait_for_command(void); + +#endif /* PROTOCOL_H_ */
\ No newline at end of file diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/protocol_return_codes.h b/impl/DMAppFpgaProg/DMAppFpgaProg/protocol_return_codes.h new file mode 100644 index 0000000..80acd43 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/protocol_return_codes.h @@ -0,0 +1,16 @@ +/* Author: Jan Sucan */ + +#ifndef PROTOCOL_RETURN_CODES_H_ +#define PROTOCOL_RETURN_CODES_H_ + +enum protocol_return_codes { + PROTOCOL_OK = 0x00, + PROTOCOL_DIRECTC_PAGE_REQUEST = 0x01, + // Chyby protokolu + PROTOCOL_ERROR_UNKNOWN_CMD_CODE = 0x10, + PROTOCOL_ERROR_INCORRECT_CMD_SIZE = 0x11, + PROTOCOL_ERROR_NO_OPERATION_IN_PROGRESS = 0x12, + PROTOCOL_ERROR_OPERATION_IN_PROGRESS = 0x13 +}; + +#endif /* PROTOCOL_RETURN_CODES_H_ */
\ No newline at end of file diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/setjmp_buffers.c b/impl/DMAppFpgaProg/DMAppFpgaProg/setjmp_buffers.c new file mode 100644 index 0000000..bebbcc9 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/setjmp_buffers.c @@ -0,0 +1,6 @@ +/* Author: Jan Sucan */ + +#include <setjmp_buffers.h> + +jmp_buf setjmp_buffer_cancel_operation; +jmp_buf setjmp_buffer_provide_data_to_operation; diff --git a/impl/DMAppFpgaProg/DMAppFpgaProg/setjmp_buffers.h b/impl/DMAppFpgaProg/DMAppFpgaProg/setjmp_buffers.h new file mode 100644 index 0000000..dd436e4 --- /dev/null +++ b/impl/DMAppFpgaProg/DMAppFpgaProg/setjmp_buffers.h @@ -0,0 +1,11 @@ +/* Author: Jan Sucan */ + +#ifndef SETJMP_BUFFERS_H_ +#define SETJMP_BUFFERS_H_ + +#include <setjmp.h> + +extern jmp_buf setjmp_buffer_cancel_operation; +extern jmp_buf setjmp_buffer_provide_data_to_operation; + +#endif /* SETJMP_BUFFERS_H_ */
\ No newline at end of file diff --git a/impl/DMAppFpgaProg/linker_script.x b/impl/DMAppFpgaProg/linker_script.x new file mode 100644 index 0000000..a859740 --- /dev/null +++ b/impl/DMAppFpgaProg/linker_script.x @@ -0,0 +1,205 @@ +/* Default linker script, for normal executables */ +/* Upraveny pre nahranie aplikacneho firmwaru za bootloader */ +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", + "elf32-avr32") +OUTPUT_ARCH(avr32:uc) +ENTRY(_start) +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +MEMORY +{ + FLASH (rxai!w) : ORIGIN = 0x80004000, LENGTH = 496K /* Tu treba upravit 1 hodnotu */ + CPUSRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0xFFFC + USERPAGE : ORIGIN = 0x80800000, LENGTH = 512 + FACTORYPAGE : ORIGIN = 0x80800200, LENGTH = 512 + FLASHVAULT_FLASH_SIZE (r) : ORIGIN = 0x80800400, LENGTH = 8 + FLASHVAULT_RAM_SIZE (r) : ORIGIN = 0x80800408, LENGTH = 8 +} +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x80004000); . = 0x80004000; /* Tu treba upravit 2 hodnoty */ + .interp : { *(.interp) } >FLASH AT>FLASH + .reset : { *(.reset) } >FLASH AT>FLASH + .hash : { *(.hash) } >FLASH AT>FLASH + .dynsym : { *(.dynsym) } >FLASH AT>FLASH + .dynstr : { *(.dynstr) } >FLASH AT>FLASH + .gnu.version : { *(.gnu.version) } >FLASH AT>FLASH + .gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH + .gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH + .rel.init : { *(.rel.init) } >FLASH AT>FLASH + .rela.init : { *(.rela.init) } >FLASH AT>FLASH + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH + .rel.fini : { *(.rel.fini) } >FLASH AT>FLASH + .rela.fini : { *(.rela.fini) } >FLASH AT>FLASH + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH + .rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH + .rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH + .rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH + .rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH + .rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH + .rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH + .rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH + .rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH + .rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH + .rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH + .rel.got : { *(.rel.got) } >FLASH AT>FLASH + .rela.got : { *(.rela.got) } >FLASH AT>FLASH + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH + .rel.plt : { *(.rel.plt) } >FLASH AT>FLASH + .rela.plt : { *(.rela.plt) } >FLASH AT>FLASH + .init : + { + KEEP (*(.init)) + } >FLASH AT>FLASH =0xd703d703 + .plt : { *(.plt) } >FLASH AT>FLASH + .text : + { + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + } >FLASH AT>FLASH =0xd703d703 + .fini : + { + KEEP (*(.fini)) + } >FLASH AT>FLASH =0xd703d703 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH + .rodata1 : { *(.rodata1) } >FLASH AT>FLASH + .eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH + .dalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH + PROVIDE (_data = ORIGIN(CPUSRAM)); + . = ORIGIN(CPUSRAM); + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >CPUSRAM AT>FLASH + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >CPUSRAM AT>FLASH + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >CPUSRAM AT>FLASH + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >CPUSRAM + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + PROVIDE (__preinit_array_start = ALIGN(32 / 8)); + .preinit_array : { KEEP (*(.preinit_array)) } >CPUSRAM AT>FLASH + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { KEEP (*(.init_array)) } >CPUSRAM AT>FLASH + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { KEEP (*(.fini_array)) } >CPUSRAM AT>FLASH + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin*.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >CPUSRAM AT>FLASH + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >CPUSRAM AT>FLASH + .jcr : { KEEP (*(.jcr)) } >CPUSRAM AT>FLASH + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >CPUSRAM AT>FLASH + .dynamic : { *(.dynamic) } >CPUSRAM AT>FLASH + .got : { *(.got.plt) *(.got) } >CPUSRAM AT>FLASH + .data : + { + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } >CPUSRAM AT>FLASH + .data1 : { *(.data1) } >CPUSRAM AT>FLASH + .balign : { . = ALIGN(8); _edata = .; } >CPUSRAM AT>FLASH + _edata = .; + PROVIDE (edata = .); + __bss_start = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(8); + } >CPUSRAM + . = ALIGN(8); + _end = .; + PROVIDE (end = .); + __heap_start__ = ALIGN(8); + . = ORIGIN(CPUSRAM) + LENGTH(CPUSRAM) - _stack_size; + __heap_end__ = .; + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .stack ORIGIN(CPUSRAM) + LENGTH(CPUSRAM) - _stack_size : + { + _stack = .; + *(.stack) + . = _stack_size; + _estack = .; + } >CPUSRAM + .userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE + .factorypage : { *(.factorypage .factorypage.*) } >FACTORYPAGE AT>FACTORYPAGE + .flashvault_flash_size : { KEEP(*(.flashvault_flash_size .flashvault_flash_size.*)) } > FLASHVAULT_FLASH_SIZE + .flashvault_ram_size : { KEEP(*(.flashvault_ram_size .flashvault_ram_size.*)) } > FLASHVAULT_RAM_SIZE + /DISCARD/ : { *(.note.GNU-stack) } +} |